1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * PS3 Game Console device tree. 3 * PS3 Game Console device tree.
4 * 4 *
5 * Copyright (C) 2007 Sony Computer Entertain 5 * Copyright (C) 2007 Sony Computer Entertainment Inc.
6 * Copyright 2007 Sony Corp. 6 * Copyright 2007 Sony Corp.
7 */ 7 */
8 8
9 /dts-v1/; 9 /dts-v1/;
10 10
11 / { 11 / {
12 model = "SonyPS3"; 12 model = "SonyPS3";
13 compatible = "sony,ps3"; 13 compatible = "sony,ps3";
14 #size-cells = <2>; 14 #size-cells = <2>;
15 #address-cells = <2>; 15 #address-cells = <2>;
16 16
17 chosen { 17 chosen {
18 }; 18 };
19 19
20 /* 20 /*
21 * We'll get the size of the bootmem b 21 * We'll get the size of the bootmem block from lv1 after startup,
22 * so we'll put a null entry here. 22 * so we'll put a null entry here.
23 */ 23 */
24 24
25 memory { 25 memory {
26 device_type = "memory"; 26 device_type = "memory";
27 reg = <0x00000000 0x00000000 0 27 reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
28 }; 28 };
29 29
30 /* 30 /*
31 * The boot cpu is always zero for PS3 31 * The boot cpu is always zero for PS3.
32 * 32 *
33 * dtc expects a clock-frequency and t 33 * dtc expects a clock-frequency and timebase-frequency entries, so
34 * we'll put a null entries here. The 34 * we'll put a null entries here. These will be initialized after
35 * startup with data from lv1. 35 * startup with data from lv1.
36 * 36 *
37 * Seems the only way currently to ind 37 * Seems the only way currently to indicate a processor has multiple
38 * threads is with an ibm,ppc-interrup 38 * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one
39 * here so we can bring up both of our 39 * here so we can bring up both of ours. See smp_setup_cpu_maps().
40 */ 40 */
41 41
42 cpus { 42 cpus {
43 #size-cells = <0>; 43 #size-cells = <0>;
44 #address-cells = <1>; 44 #address-cells = <1>;
45 45
46 cpu@0 { 46 cpu@0 {
47 device_type = "cpu"; 47 device_type = "cpu";
48 reg = <0x00000000>; 48 reg = <0x00000000>;
49 ibm,ppc-interrupt-serv 49 ibm,ppc-interrupt-server#s = <0x0 0x1>;
50 clock-frequency = <0>; 50 clock-frequency = <0>;
51 timebase-frequency = < 51 timebase-frequency = <0>;
52 i-cache-size = <32768> 52 i-cache-size = <32768>;
53 d-cache-size = <32768> 53 d-cache-size = <32768>;
54 i-cache-line-size = <1 54 i-cache-line-size = <128>;
55 d-cache-line-size = <1 55 d-cache-line-size = <128>;
56 }; 56 };
57 }; 57 };
58 }; 58 };
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