1 /* 1 /*
2 * Device Tree Source for PIKA Warp 2 * Device Tree Source for PIKA Warp
3 * 3 *
4 * Copyright (c) 2008-2009 PIKA Technologies 4 * Copyright (c) 2008-2009 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com> 5 * Sean MacLennan <smaclennan@pikatech.com>
6 * 6 *
7 * This file is licensed under the terms of th 7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is license 8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express o 9 * any warranty of any kind, whether express or implied.
10 */ 10 */
11 11
12 /dts-v1/; 12 /dts-v1/;
13 13
14 / { 14 / {
15 #address-cells = <2>; 15 #address-cells = <2>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "pika,warp"; 17 model = "pika,warp";
18 compatible = "pika,warp"; 18 compatible = "pika,warp";
19 dcr-parent = <&{/cpus/cpu@0}>; 19 dcr-parent = <&{/cpus/cpu@0}>;
20 20
21 aliases { 21 aliases {
22 ethernet0 = &EMAC0; 22 ethernet0 = &EMAC0;
23 serial0 = &UART0; 23 serial0 = &UART0;
24 }; 24 };
25 25
26 cpus { 26 cpus {
27 #address-cells = <1>; 27 #address-cells = <1>;
28 #size-cells = <0>; 28 #size-cells = <0>;
29 29
30 cpu@0 { 30 cpu@0 {
31 device_type = "cpu"; 31 device_type = "cpu";
32 model = "PowerPC,440EP 32 model = "PowerPC,440EP";
33 reg = <0x00000000>; 33 reg = <0x00000000>;
34 clock-frequency = <0>; 34 clock-frequency = <0>; /* Filled in by zImage */
35 timebase-frequency = < 35 timebase-frequency = <0>; /* Filled in by zImage */
36 i-cache-line-size = <3 36 i-cache-line-size = <32>;
37 d-cache-line-size = <3 37 d-cache-line-size = <32>;
38 i-cache-size = <32768> 38 i-cache-size = <32768>;
39 d-cache-size = <32768> 39 d-cache-size = <32768>;
40 dcr-controller; 40 dcr-controller;
41 dcr-access-method = "n 41 dcr-access-method = "native";
42 }; 42 };
43 }; 43 };
44 44
45 memory { 45 memory {
46 device_type = "memory"; 46 device_type = "memory";
47 reg = <0x00000000 0x00000000 0 47 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
48 }; 48 };
49 49
50 UIC0: interrupt-controller0 { 50 UIC0: interrupt-controller0 {
51 compatible = "ibm,uic-440ep"," 51 compatible = "ibm,uic-440ep","ibm,uic";
52 interrupt-controller; 52 interrupt-controller;
53 cell-index = <0>; 53 cell-index = <0>;
54 dcr-reg = <0x0c0 0x009>; 54 dcr-reg = <0x0c0 0x009>;
55 #address-cells = <0>; 55 #address-cells = <0>;
56 #size-cells = <0>; 56 #size-cells = <0>;
57 #interrupt-cells = <2>; 57 #interrupt-cells = <2>;
58 }; 58 };
59 59
60 UIC1: interrupt-controller1 { 60 UIC1: interrupt-controller1 {
61 compatible = "ibm,uic-440ep"," 61 compatible = "ibm,uic-440ep","ibm,uic";
62 interrupt-controller; 62 interrupt-controller;
63 cell-index = <1>; 63 cell-index = <1>;
64 dcr-reg = <0x0d0 0x009>; 64 dcr-reg = <0x0d0 0x009>;
65 #address-cells = <0>; 65 #address-cells = <0>;
66 #size-cells = <0>; 66 #size-cells = <0>;
67 #interrupt-cells = <2>; 67 #interrupt-cells = <2>;
68 interrupts = <0x1e 0x4 0x1f 0x 68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
69 interrupt-parent = <&UIC0>; 69 interrupt-parent = <&UIC0>;
70 }; 70 };
71 71
72 SDR0: sdr { 72 SDR0: sdr {
73 compatible = "ibm,sdr-440ep"; 73 compatible = "ibm,sdr-440ep";
74 dcr-reg = <0x00e 0x002>; 74 dcr-reg = <0x00e 0x002>;
75 }; 75 };
76 76
77 CPR0: cpr { 77 CPR0: cpr {
78 compatible = "ibm,cpr-440ep"; 78 compatible = "ibm,cpr-440ep";
79 dcr-reg = <0x00c 0x002>; 79 dcr-reg = <0x00c 0x002>;
80 }; 80 };
81 81
82 plb { 82 plb {
83 compatible = "ibm,plb-440ep", 83 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
84 #address-cells = <2>; 84 #address-cells = <2>;
85 #size-cells = <1>; 85 #size-cells = <1>;
86 ranges; 86 ranges;
87 clock-frequency = <0>; /* Fill 87 clock-frequency = <0>; /* Filled in by zImage */
88 88
89 SDRAM0: sdram { 89 SDRAM0: sdram {
90 compatible = "ibm,sdra 90 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
91 dcr-reg = <0x010 0x002 91 dcr-reg = <0x010 0x002>;
92 }; 92 };
93 93
94 DMA0: dma { 94 DMA0: dma {
95 compatible = "ibm,dma- 95 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
96 dcr-reg = <0x100 0x027 96 dcr-reg = <0x100 0x027>;
97 }; 97 };
98 98
99 MAL0: mcmal { 99 MAL0: mcmal {
100 compatible = "ibm,mcma 100 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
101 dcr-reg = <0x180 0x062 101 dcr-reg = <0x180 0x062>;
102 num-tx-chans = <4>; 102 num-tx-chans = <4>;
103 num-rx-chans = <2>; 103 num-rx-chans = <2>;
104 interrupt-parent = <&M 104 interrupt-parent = <&MAL0>;
105 interrupts = <0x0 0x1 105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
106 #interrupt-cells = <1> 106 #interrupt-cells = <1>;
107 #address-cells = <0>; 107 #address-cells = <0>;
108 #size-cells = <0>; 108 #size-cells = <0>;
109 interrupt-map = </*TXE 109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
110 /*RXEO 110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
111 /*SERR 111 /*SERR*/ 0x2 &UIC1 0x0 0x4
112 /*TXDE 112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
113 /*RXDE 113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
114 }; 114 };
115 115
116 POB0: opb { 116 POB0: opb {
117 compatible = "ibm,opb- 117 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
118 #address-cells = <1>; 118 #address-cells = <1>;
119 #size-cells = <1>; 119 #size-cells = <1>;
120 ranges = <0x00000000 0 120 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
121 0x80000000 0 121 0x80000000 0x00000000 0x80000000 0x80000000>;
122 interrupt-parent = <&U 122 interrupt-parent = <&UIC1>;
123 interrupts = <0x7 0x4> 123 interrupts = <0x7 0x4>;
124 clock-frequency = <0>; 124 clock-frequency = <0>; /* Filled in by zImage */
125 125
126 EBC0: ebc { 126 EBC0: ebc {
127 compatible = " 127 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
128 dcr-reg = <0x0 128 dcr-reg = <0x012 0x002>;
129 #address-cells 129 #address-cells = <2>;
130 #size-cells = 130 #size-cells = <1>;
131 clock-frequenc 131 clock-frequency = <0>; /* Filled in by zImage */
132 interrupts = < 132 interrupts = <0x5 0x1>;
133 interrupt-pare 133 interrupt-parent = <&UIC1>;
134 134
135 fpga@2,0 { 135 fpga@2,0 {
136 compat 136 compatible = "pika,fpga";
137 reg = 137 reg = <0x00000002 0x00000000 0x00001000>;
138 interr 138 interrupts = <0x18 0x8>;
139 interr 139 interrupt-parent = <&UIC0>;
140 }; 140 };
141 141
142 fpga@2,2000 { 142 fpga@2,2000 {
143 compat 143 compatible = "pika,fpga-sgl";
144 reg = 144 reg = <0x00000002 0x00002000 0x00000200>;
145 }; 145 };
146 146
147 fpga@2,4000 { 147 fpga@2,4000 {
148 compat 148 compatible = "pika,fpga-sd";
149 reg = 149 reg = <0x00000002 0x00004000 0x00004000>;
150 }; 150 };
151 151
152 nor@0,0 { 152 nor@0,0 {
153 compat 153 compatible = "amd,s29gl032a", "cfi-flash";
154 bank-w 154 bank-width = <2>;
155 reg = 155 reg = <0x00000000 0x00000000 0x00400000>;
156 #addre 156 #address-cells = <1>;
157 #size- 157 #size-cells = <1>;
158 158
159 partit 159 partition@0 {
160 160 label = "splash";
161 161 reg = <0x00000000 0x00010000>;
162 }; 162 };
163 partit 163 partition@300000 {
164 164 label = "fpga";
165 165 reg = <0x0300000 0x00040000>;
166 }; 166 };
167 partit 167 partition@340000 {
168 168 label = "env";
169 169 reg = <0x0340000 0x00040000>;
170 }; 170 };
171 partit 171 partition@380000 {
172 172 label = "u-boot";
173 173 reg = <0x0380000 0x00080000>;
174 }; 174 };
175 }; 175 };
176 176
177 ndfc@1,0 { 177 ndfc@1,0 {
178 compat 178 compatible = "ibm,ndfc";
179 reg = 179 reg = <0x00000001 0x00000000 0x00002000>;
180 ccr = 180 ccr = <0x00001000>;
181 bank-s 181 bank-settings = <0x80002222>;
182 #addre 182 #address-cells = <1>;
183 #size- 183 #size-cells = <1>;
184 184
185 nand { 185 nand {
186 186 #address-cells = <1>;
187 187 #size-cells = <1>;
188 188
189 189 partition@0 {
190 190 label = "kernel";
191 191 reg = <0x00000000 0x00200000>;
192 192 };
193 193 partition@200000 {
194 194 label = "root";
195 195 reg = <0x00200000 0x03E00000>;
196 196 };
197 197 partition@40000000 {
198 198 label = "persistent";
199 199 reg = <0x04000000 0x04000000>;
200 200 };
201 201 partition@80000000 {
202 202 label = "persistent1";
203 203 reg = <0x08000000 0x04000000>;
204 204 };
205 205 partition@C0000000 {
206 206 label = "persistent2";
207 207 reg = <0x0C000000 0x04000000>;
208 208 };
209 }; 209 };
210 }; 210 };
211 }; 211 };
212 212
213 UART0: serial@ef600300 213 UART0: serial@ef600300 {
214 device_type = 214 device_type = "serial";
215 compatible = " 215 compatible = "ns16550";
216 reg = <0xef600 216 reg = <0xef600300 0x00000008>;
217 virtual-reg = 217 virtual-reg = <0xef600300>;
218 clock-frequenc 218 clock-frequency = <0>; /* Filled in by zImage */
219 current-speed 219 current-speed = <115200>;
220 interrupt-pare 220 interrupt-parent = <&UIC0>;
221 interrupts = < 221 interrupts = <0x0 0x4>;
222 }; 222 };
223 223
224 IIC0: i2c@ef600700 { 224 IIC0: i2c@ef600700 {
225 compatible = " 225 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
226 reg = <0xef600 226 reg = <0xef600700 0x00000014>;
227 interrupt-pare 227 interrupt-parent = <&UIC0>;
228 interrupts = < 228 interrupts = <0x2 0x4>;
229 #address-cells 229 #address-cells = <1>;
230 #size-cells = 230 #size-cells = <0>;
231 231
232 ad7414@4a { 232 ad7414@4a {
233 compat 233 compatible = "adi,ad7414";
234 reg = 234 reg = <0x4a>;
235 interr 235 interrupts = <0x19 0x8>;
236 interr 236 interrupt-parent = <&UIC0>;
237 }; 237 };
238 238
239 /* This will c 239 /* This will create 52 and 53 */
240 at24@52 { 240 at24@52 {
241 compat 241 compatible = "atmel,24c04";
242 reg = 242 reg = <0x52>;
243 }; 243 };
244 }; 244 };
245 245
246 GPIO0: gpio@ef600b00 { 246 GPIO0: gpio@ef600b00 {
247 compatible = " 247 compatible = "ibm,ppc4xx-gpio";
248 reg = <0xef600 248 reg = <0xef600b00 0x00000048>;
249 #gpio-cells = 249 #gpio-cells = <2>;
250 gpio-controlle 250 gpio-controller;
251 }; 251 };
252 252
253 GPIO1: gpio@ef600c00 { 253 GPIO1: gpio@ef600c00 {
254 compatible = " 254 compatible = "ibm,ppc4xx-gpio";
255 reg = <0xef600 255 reg = <0xef600c00 0x00000048>;
256 #gpio-cells = 256 #gpio-cells = <2>;
257 gpio-controlle 257 gpio-controller;
258 }; 258 };
259 259
260 power-leds { 260 power-leds {
261 compatible = " 261 compatible = "warp-power-leds";
262 green { 262 green {
263 gpios 263 gpios = <&GPIO1 0 0>;
264 }; 264 };
265 red { 265 red {
266 gpios 266 gpios = <&GPIO1 1 0>;
267 }; 267 };
268 }; 268 };
269 269
270 ZMII0: emac-zmii@ef600 270 ZMII0: emac-zmii@ef600d00 {
271 compatible = " 271 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
272 reg = <0xef600 272 reg = <0xef600d00 0x0000000c>;
273 }; 273 };
274 274
275 EMAC0: ethernet@ef600e 275 EMAC0: ethernet@ef600e00 {
276 device_type = 276 device_type = "network";
277 compatible = " 277 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
278 interrupt-pare 278 interrupt-parent = <&UIC1>;
279 interrupts = < 279 interrupts = <0x1c 0x4 0x1d 0x4>;
280 reg = <0xef600 280 reg = <0xef600e00 0x00000070>;
281 local-mac-addr 281 local-mac-address = [000000000000];
282 mal-device = < 282 mal-device = <&MAL0>;
283 mal-tx-channel 283 mal-tx-channel = <0 1>;
284 mal-rx-channel 284 mal-rx-channel = <0>;
285 cell-index = < 285 cell-index = <0>;
286 max-frame-size 286 max-frame-size = <1500>;
287 rx-fifo-size = 287 rx-fifo-size = <4096>;
288 tx-fifo-size = 288 tx-fifo-size = <2048>;
289 phy-mode = "rm 289 phy-mode = "rmii";
290 phy-map = <0x0 290 phy-map = <0x00000000>;
291 zmii-device = 291 zmii-device = <&ZMII0>;
292 zmii-channel = 292 zmii-channel = <0>;
293 }; 293 };
294 294
295 usb@ef601000 { 295 usb@ef601000 {
296 compatible = " 296 compatible = "ohci-be";
297 reg = <0xef601 297 reg = <0xef601000 0x00000080>;
298 interrupts = < 298 interrupts = <0x8 0x1 0x9 0x1>;
299 interrupt-pare 299 interrupt-parent = < &UIC1 >;
300 }; 300 };
301 }; 301 };
302 }; 302 };
303 303
304 chosen { 304 chosen {
305 stdout-path = "/plb/opb/serial 305 stdout-path = "/plb/opb/serial@ef600300";
306 }; 306 };
307 }; 307 };
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