1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Original all-in-one devicetree: 3 * Original all-in-one devicetree:
4 * Copyright (C) 2021-2022 - Wolfgang Grandegg< 4 * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de>
5 * Rewritten to use includes: 5 * Rewritten to use includes:
6 * Copyright (C) 2022 - Conor Dooley <conor.doo 6 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>
7 */ 7 */
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include "mpfs.dtsi" 10 #include "mpfs.dtsi"
11 #include "mpfs-m100pfs-fabric.dtsi" 11 #include "mpfs-m100pfs-fabric.dtsi"
12 12
13 / { 13 / {
14 model = "Aries Embedded M100PFEVPS"; 14 model = "Aries Embedded M100PFEVPS";
15 compatible = "aries,m100pfsevp", "micr 15 compatible = "aries,m100pfsevp", "microchip,mpfs";
16 16
17 aliases { 17 aliases {
18 ethernet0 = &mac0; 18 ethernet0 = &mac0;
19 ethernet1 = &mac1; 19 ethernet1 = &mac1;
20 serial0 = &mmuart0; 20 serial0 = &mmuart0;
21 serial1 = &mmuart1; 21 serial1 = &mmuart1;
22 serial2 = &mmuart2; 22 serial2 = &mmuart2;
23 serial3 = &mmuart3; 23 serial3 = &mmuart3;
24 serial4 = &mmuart4; 24 serial4 = &mmuart4;
25 gpio0 = &gpio0; 25 gpio0 = &gpio0;
26 gpio1 = &gpio2; 26 gpio1 = &gpio2;
27 }; 27 };
28 28
29 chosen { 29 chosen {
30 stdout-path = "serial1:115200n 30 stdout-path = "serial1:115200n8";
31 }; 31 };
32 32
33 ddrc_cache_lo: memory@80000000 { 33 ddrc_cache_lo: memory@80000000 {
34 device_type = "memory"; 34 device_type = "memory";
35 reg = <0x0 0x80000000 0x0 0x40 35 reg = <0x0 0x80000000 0x0 0x40000000>;
36 }; 36 };
37 ddrc_cache_hi: memory@1040000000 { 37 ddrc_cache_hi: memory@1040000000 {
38 device_type = "memory"; 38 device_type = "memory";
39 reg = <0x10 0x40000000 0x0 0x4 39 reg = <0x10 0x40000000 0x0 0x40000000>;
40 }; 40 };
41 }; 41 };
42 42
43 &can0 { 43 &can0 {
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 &i2c0 { 47 &i2c0 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 50
51 &i2c1 { 51 &i2c1 {
52 status = "okay"; 52 status = "okay";
53 }; 53 };
54 54
55 &gpio0 { 55 &gpio0 {
56 interrupts = <13>, <14>, <15>, <16>, 56 interrupts = <13>, <14>, <15>, <16>,
57 <17>, <18>, <19>, <20>, 57 <17>, <18>, <19>, <20>,
58 <21>, <22>, <23>, <24>, 58 <21>, <22>, <23>, <24>,
59 <25>, <26>; 59 <25>, <26>;
60 ngpios = <14>; 60 ngpios = <14>;
61 status = "okay"; 61 status = "okay";
62 62
63 pmic-irq-hog { 63 pmic-irq-hog {
64 gpio-hog; 64 gpio-hog;
65 gpios = <13 0>; 65 gpios = <13 0>;
66 input; 66 input;
67 }; 67 };
68 68
69 /* Set to low for eMMC, high for SD-ca 69 /* Set to low for eMMC, high for SD-card */
70 mmc-sel-hog { 70 mmc-sel-hog {
71 gpio-hog; 71 gpio-hog;
72 gpios = <12 0>; 72 gpios = <12 0>;
73 output-high; 73 output-high;
74 }; 74 };
75 }; 75 };
76 76
77 &gpio2 { 77 &gpio2 {
78 interrupts = <13>, <14>, <15>, <16>, 78 interrupts = <13>, <14>, <15>, <16>,
79 <17>, <18>, <19>, <20>, 79 <17>, <18>, <19>, <20>,
80 <21>, <22>, <23>, <24>, 80 <21>, <22>, <23>, <24>,
81 <25>, <26>, <27>, <28>, 81 <25>, <26>, <27>, <28>,
82 <29>, <30>, <31>, <32>, 82 <29>, <30>, <31>, <32>,
83 <33>, <34>, <35>, <36>, 83 <33>, <34>, <35>, <36>,
84 <37>, <38>, <39>, <40>, 84 <37>, <38>, <39>, <40>,
85 <41>, <42>, <43>, <44>; 85 <41>, <42>, <43>, <44>;
86 status = "okay"; 86 status = "okay";
87 }; 87 };
88 88
89 &mac0 { 89 &mac0 {
90 status = "okay"; 90 status = "okay";
91 phy-mode = "gmii"; 91 phy-mode = "gmii";
92 phy-handle = <&phy0>; 92 phy-handle = <&phy0>;
93 phy0: ethernet-phy@0 { 93 phy0: ethernet-phy@0 {
94 reg = <0>; 94 reg = <0>;
95 }; 95 };
96 }; 96 };
97 97
98 &mac1 { 98 &mac1 {
99 status = "okay"; 99 status = "okay";
100 phy-mode = "gmii"; 100 phy-mode = "gmii";
101 phy-handle = <&phy1>; 101 phy-handle = <&phy1>;
102 phy1: ethernet-phy@0 { 102 phy1: ethernet-phy@0 {
103 reg = <0>; 103 reg = <0>;
104 }; 104 };
105 }; 105 };
106 106
107 &mbox { 107 &mbox {
108 status = "okay"; 108 status = "okay";
109 }; 109 };
110 110
111 &mmc { 111 &mmc {
112 max-frequency = <50000000>; 112 max-frequency = <50000000>;
113 bus-width = <4>; 113 bus-width = <4>;
114 cap-mmc-highspeed; 114 cap-mmc-highspeed;
115 cap-sd-highspeed; 115 cap-sd-highspeed;
116 no-1-8-v; 116 no-1-8-v;
117 sd-uhs-sdr12; 117 sd-uhs-sdr12;
118 sd-uhs-sdr25; 118 sd-uhs-sdr25;
119 sd-uhs-sdr50; 119 sd-uhs-sdr50;
120 sd-uhs-sdr104; 120 sd-uhs-sdr104;
121 disable-wp; 121 disable-wp;
122 status = "okay"; 122 status = "okay";
123 }; 123 };
124 124
125 &mmuart1 { 125 &mmuart1 {
126 status = "okay"; 126 status = "okay";
127 }; 127 };
128 128
129 &mmuart2 { 129 &mmuart2 {
130 status = "okay"; 130 status = "okay";
131 }; 131 };
132 132
133 &mmuart3 { 133 &mmuart3 {
134 status = "okay"; 134 status = "okay";
135 }; 135 };
136 136
137 &mmuart4 { 137 &mmuart4 {
138 status = "okay"; 138 status = "okay";
139 }; 139 };
140 140
141 &pcie { 141 &pcie {
142 status = "okay"; 142 status = "okay";
143 }; 143 };
144 144
145 &qspi { 145 &qspi {
146 status = "okay"; 146 status = "okay";
147 }; 147 };
148 148
149 &refclk { 149 &refclk {
150 clock-frequency = <125000000>; 150 clock-frequency = <125000000>;
151 }; 151 };
152 152
153 &rtc { 153 &rtc {
154 status = "okay"; 154 status = "okay";
155 }; 155 };
156 156
157 &spi0 { 157 &spi0 {
158 status = "okay"; 158 status = "okay";
159 }; 159 };
160 160
161 &spi1 { 161 &spi1 {
162 status = "okay"; 162 status = "okay";
163 }; 163 };
164 164
165 &syscontroller { 165 &syscontroller {
166 status = "okay"; 166 status = "okay";
167 }; 167 };
168 168
169 &usb { 169 &usb {
170 status = "okay"; 170 status = "okay";
171 dr_mode = "host"; 171 dr_mode = "host";
172 }; 172 };
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