1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright (C) 2021 StarFive Technology Co.,
4 * Copyright (C) 2021 Emil Renner Berthing <ker
5 */
6
7 /dts-v1/;
8 #include "jh7100.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive
12
13 / {
14 aliases {
15 mmc0 = &sdio0;
16 mmc1 = &sdio1;
17 serial0 = &uart3;
18 };
19
20 chosen {
21 stdout-path = "serial0:115200n
22 };
23
24 cpus {
25 timebase-frequency = <6250000>
26 };
27
28 memory@80000000 {
29 device_type = "memory";
30 reg = <0x0 0x80000000 0x2 0x0>
31 };
32
33 leds {
34 compatible = "gpio-leds";
35
36 led-ack {
37 gpios = <&gpio 43 GPIO
38 color = <LED_COLOR_ID_
39 function = LED_FUNCTIO
40 linux,default-trigger
41 label = "ack";
42 };
43 };
44
45 reserved-memory {
46 #address-cells = <2>;
47 #size-cells = <2>;
48 ranges;
49
50 dma-reserved@fa000000 {
51 reg = <0x0 0xfa000000
52 no-map;
53 };
54
55 linux,dma@107a000000 {
56 compatible = "shared-d
57 reg = <0x10 0x7a000000
58 no-map;
59 linux,dma-default;
60 };
61 };
62
63 soc {
64 dma-ranges = <0x00 0x80000000
65 <0x00 0xfa000000
66 <0x00 0xfb000000
67 };
68
69 wifi_pwrseq: wifi-pwrseq {
70 compatible = "mmc-pwrseq-simpl
71 reset-gpios = <&gpio 37 GPIO_A
72 };
73 };
74
75 &gmac {
76 pinctrl-names = "default";
77 pinctrl-0 = <&gmac_pins>;
78 phy-mode = "rgmii-id";
79 status = "okay";
80
81 mdio: mdio {
82 #address-cells = <1>;
83 #size-cells = <0>;
84 compatible = "snps,dwmac-mdio"
85 };
86 };
87
88 &gpio {
89 gmac_pins: gmac-0 {
90 gtxclk-pins {
91 pins = <PAD_FUNC_SHARE
92 bias-pull-up;
93 drive-strength = <35>;
94 input-enable;
95 input-schmitt-enable;
96 slew-rate = <0>;
97 };
98 miitxclk-pins {
99 pins = <PAD_FUNC_SHARE
100 bias-pull-up;
101 drive-strength = <14>;
102 input-enable;
103 input-schmitt-disable;
104 slew-rate = <0>;
105 };
106 tx-pins {
107 pins = <PAD_FUNC_SHARE
108 <PAD_FUNC_SHARE
109 <PAD_FUNC_SHARE
110 <PAD_FUNC_SHARE
111 <PAD_FUNC_SHARE
112 <PAD_FUNC_SHARE
113 <PAD_FUNC_SHARE
114 <PAD_FUNC_SHARE
115 <PAD_FUNC_SHARE
116 bias-pull-up;
117 drive-strength = <35>;
118 input-disable;
119 input-schmitt-disable;
120 slew-rate = <0>;
121 };
122 rxclk-pins {
123 pins = <PAD_FUNC_SHARE
124 bias-pull-up;
125 drive-strength = <14>;
126 input-enable;
127 input-schmitt-disable;
128 slew-rate = <6>;
129 };
130 rxer-pins {
131 pins = <PAD_FUNC_SHARE
132 bias-pull-up;
133 drive-strength = <14>;
134 input-enable;
135 input-schmitt-disable;
136 slew-rate = <0>;
137 };
138 rx-pins {
139 pins = <PAD_FUNC_SHARE
140 <PAD_FUNC_SHARE
141 <PAD_FUNC_SHARE
142 <PAD_FUNC_SHARE
143 <PAD_FUNC_SHARE
144 <PAD_FUNC_SHARE
145 <PAD_FUNC_SHARE
146 <PAD_FUNC_SHARE
147 <PAD_FUNC_SHARE
148 <PAD_FUNC_SHARE
149 <PAD_FUNC_SHARE
150 <PAD_FUNC_SHARE
151 <PAD_FUNC_SHARE
152 bias-pull-up;
153 drive-strength = <14>;
154 input-enable;
155 input-schmitt-enable;
156 slew-rate = <0>;
157 };
158 };
159
160 i2c0_pins: i2c0-0 {
161 i2c-pins {
162 pinmux = <GPIOMUX(62,
163 GPO_I2C0_PAD
164 GPI_I2C0_PAD
165 <GPIOMUX(61,
166 GPO_I2C0_PAD
167 GPI_I2C0_PAD
168 bias-disable; /* exter
169 input-enable;
170 input-schmitt-enable;
171 };
172 };
173
174 i2c1_pins: i2c1-0 {
175 i2c-pins {
176 pinmux = <GPIOMUX(47,
177 GPO_I2C1_PAD
178 GPI_I2C1_PAD
179 <GPIOMUX(48,
180 GPO_I2C1_PAD
181 GPI_I2C1_PAD
182 bias-pull-up;
183 input-enable;
184 input-schmitt-enable;
185 };
186 };
187
188 i2c2_pins: i2c2-0 {
189 i2c-pins {
190 pinmux = <GPIOMUX(60,
191 GPO_I2C2_PAD
192 GPI_I2C2_PAD
193 <GPIOMUX(59,
194 GPO_I2C2_PAD
195 GPI_I2C2_PAD
196 bias-disable; /* exter
197 input-enable;
198 input-schmitt-enable;
199 };
200 };
201
202 pwm_pins: pwm-0 {
203 pwm-pins {
204 pinmux = <GPIOMUX(7,
205 GPO_PWM_PAD_
206 GPO_PWM_PAD_
207 GPI_NONE)>,
208 <GPIOMUX(5,
209 GPO_PWM_PAD_
210 GPO_PWM_PAD_
211 GPI_NONE)>;
212 bias-disable;
213 drive-strength = <35>;
214 input-disable;
215 input-schmitt-disable;
216 slew-rate = <0>;
217 };
218 };
219
220 sdio0_pins: sdio0-0 {
221 clk-pins {
222 pinmux = <GPIOMUX(54,
223 GPO_ENABLE,
224 bias-disable;
225 input-disable;
226 input-schmitt-disable;
227 };
228 sdio-pins {
229 pinmux = <GPIOMUX(55,
230 GPI_SDIO0_PA
231 <GPIOMUX(53,
232 GPO_SDIO0_PA
233 GPO_SDIO0_PA
234 GPI_SDIO0_PA
235 <GPIOMUX(49,
236 GPO_SDIO0_PA
237 GPO_SDIO0_PA
238 GPI_SDIO0_PA
239 <GPIOMUX(50,
240 GPO_SDIO0_PA
241 GPO_SDIO0_PA
242 GPI_SDIO0_PA
243 <GPIOMUX(51,
244 GPO_SDIO0_PA
245 GPO_SDIO0_PA
246 GPI_SDIO0_PA
247 <GPIOMUX(52,
248 GPO_SDIO0_PA
249 GPO_SDIO0_PA
250 GPI_SDIO0_PA
251 bias-pull-up;
252 input-enable;
253 input-schmitt-enable;
254 };
255 };
256
257 sdio1_pins: sdio1-0 {
258 clk-pins {
259 pinmux = <GPIOMUX(33,
260 GPO_ENABLE,
261 bias-disable;
262 input-disable;
263 input-schmitt-disable;
264 };
265 sdio-pins {
266 pinmux = <GPIOMUX(29,
267 GPO_SDIO1_PA
268 GPO_SDIO1_PA
269 GPI_SDIO1_PA
270 <GPIOMUX(36,
271 GPO_SDIO1_PA
272 GPO_SDIO1_PA
273 GPI_SDIO1_PA
274 <GPIOMUX(30,
275 GPO_SDIO1_PA
276 GPO_SDIO1_PA
277 GPI_SDIO1_PA
278 <GPIOMUX(34,
279 GPO_SDIO1_PA
280 GPO_SDIO1_PA
281 GPI_SDIO1_PA
282 <GPIOMUX(31,
283 GPO_SDIO1_PA
284 GPO_SDIO1_PA
285 GPI_SDIO1_PA
286 bias-pull-up;
287 input-enable;
288 input-schmitt-enable;
289 };
290 };
291
292 uart3_pins: uart3-0 {
293 rx-pins {
294 pinmux = <GPIOMUX(13,
295 GPI_UART3_PA
296 bias-pull-up;
297 drive-strength = <14>;
298 input-enable;
299 input-schmitt-enable;
300 slew-rate = <0>;
301 };
302 tx-pins {
303 pinmux = <GPIOMUX(14,
304 GPO_ENABLE,
305 bias-disable;
306 drive-strength = <35>;
307 input-disable;
308 input-schmitt-disable;
309 slew-rate = <0>;
310 };
311 };
312 };
313
314 &i2c0 {
315 clock-frequency = <100000>;
316 i2c-sda-hold-time-ns = <300>;
317 i2c-sda-falling-time-ns = <500>;
318 i2c-scl-falling-time-ns = <500>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&i2c0_pins>;
321 status = "okay";
322
323 pmic@5e {
324 compatible = "ti,tps65086";
325 reg = <0x5e>;
326 gpio-controller;
327 #gpio-cells = <2>;
328
329 regulators {
330 };
331 };
332 };
333
334 &i2c1 {
335 clock-frequency = <400000>;
336 i2c-sda-hold-time-ns = <300>;
337 i2c-sda-falling-time-ns = <100>;
338 i2c-scl-falling-time-ns = <100>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&i2c1_pins>;
341 status = "okay";
342 };
343
344 &i2c2 {
345 clock-frequency = <100000>;
346 i2c-sda-hold-time-ns = <300>;
347 i2c-sda-falling-time-ns = <500>;
348 i2c-scl-falling-time-ns = <500>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&i2c2_pins>;
351 status = "okay";
352 };
353
354 &osc_sys {
355 clock-frequency = <25000000>;
356 };
357
358 &osc_aud {
359 clock-frequency = <27000000>;
360 };
361
362 &pwm {
363 pinctrl-names = "default";
364 pinctrl-0 = <&pwm_pins>;
365 status = "okay";
366 };
367
368 &sdio0 {
369 broken-cd;
370 bus-width = <4>;
371 cap-sd-highspeed;
372 pinctrl-names = "default";
373 pinctrl-0 = <&sdio0_pins>;
374 status = "okay";
375 };
376
377 &sdio1 {
378 #address-cells = <1>;
379 #size-cells = <0>;
380 bus-width = <4>;
381 cap-sd-highspeed;
382 cap-sdio-irq;
383 cap-power-off-card;
384 mmc-pwrseq = <&wifi_pwrseq>;
385 non-removable;
386 pinctrl-names = "default";
387 pinctrl-0 = <&sdio1_pins>;
388 status = "okay";
389
390 wifi@1 {
391 compatible = "brcm,bcm4329-fma
392 reg = <1>;
393 };
394 };
395
396 &uart3 {
397 pinctrl-names = "default";
398 pinctrl-0 = <&uart3_pins>;
399 status = "okay";
400 };
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