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Linux/scripts/dtc/include-prefixes/riscv/starfive/jh7110-starfive-visionfive-2-v1.2a.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/riscv/starfive/jh7110-starfive-visionfive-2-v1.2a.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/riscv/starfive/jh7110-starfive-visionfive-2-v1.2a.dts (Version linux-6.8.12)


  1 // SPDX-License-Identifier: GPL-2.0 OR MIT          1 // SPDX-License-Identifier: GPL-2.0 OR MIT
  2 /*                                                  2 /*
  3  * Copyright (C) 2022 StarFive Technology Co.,      3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
  4  * Copyright (C) 2022 Emil Renner Berthing <ker      4  * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
  5  */                                                 5  */
  6                                                     6 
  7 /dts-v1/;                                           7 /dts-v1/;
  8 #include "jh7110-starfive-visionfive-2.dtsi"        8 #include "jh7110-starfive-visionfive-2.dtsi"
  9                                                     9 
 10 / {                                                10 / {
 11         model = "StarFive VisionFive 2 v1.2A";     11         model = "StarFive VisionFive 2 v1.2A";
 12         compatible = "starfive,visionfive-2-v1     12         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
 13 };                                                 13 };
 14                                                    14 
 15 &gmac1 {                                           15 &gmac1 {
 16         phy-mode = "rmii";                         16         phy-mode = "rmii";
 17         assigned-clocks = <&syscrg JH7110_SYSC     17         assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
 18                           <&syscrg JH7110_SYSC     18                           <&syscrg JH7110_SYSCLK_GMAC1_RX>;
 19         assigned-clock-parents = <&syscrg JH71     19         assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
 20                                  <&syscrg JH71     20                                  <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
 21 };                                                 21 };
 22                                                    22 
 23 &phy0 {                                            23 &phy0 {
 24         rx-internal-delay-ps = <1900>;             24         rx-internal-delay-ps = <1900>;
 25         tx-internal-delay-ps = <1350>;             25         tx-internal-delay-ps = <1350>;
 26 };                                                 26 };
                                                      

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