1 // SPDX-License-Identifier: GPL-2.0 1
2 // dice-weiss.c - a part of driver for DICE ba
3 //
4 // Copyright (c) 2023 Rolf Anderegg and Michel
5
6 #include "dice.h"
7
8 struct dice_weiss_spec {
9 unsigned int tx_pcm_chs[MAX_STREAMS][S
10 unsigned int rx_pcm_chs[MAX_STREAMS][S
11 };
12
13 // Weiss DAC202: 192kHz 2-channel DAC
14 static const struct dice_weiss_spec dac202 = {
15 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
16 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
17 };
18
19 // Weiss MAN301: 192kHz 2-channel music archiv
20 static const struct dice_weiss_spec man301 = {
21 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
22 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
23 };
24
25 // Weiss INT202: 192kHz unidirectional 2-chann
26 static const struct dice_weiss_spec int202 = {
27 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
28 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
29 };
30
31 // Weiss INT203: 192kHz bidirectional 2-channe
32 static const struct dice_weiss_spec int203 = {
33 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
34 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
35 };
36
37 // Weiss ADC2: 192kHz A/D converter with micro
38 static const struct dice_weiss_spec adc2 = {
39 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
40 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
41 };
42
43 // Weiss DAC2/Minerva: 192kHz 2-channel DAC
44 static const struct dice_weiss_spec dac2_miner
45 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
46 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
47 };
48
49 // Weiss Vesta: 192kHz 2-channel Firewire to A
50 static const struct dice_weiss_spec vesta = {
51 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
52 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
53 };
54
55 // Weiss AFI1: 192kHz 24-channel Firewire to A
56 static const struct dice_weiss_spec afi1 = {
57 .tx_pcm_chs = {{24, 16, 8}, {0, 0, 0}
58 .rx_pcm_chs = {{24, 16, 8}, {0, 0, 0}
59 };
60
61 int snd_dice_detect_weiss_formats(struct snd_d
62 {
63 static const struct {
64 u32 model_id;
65 const struct dice_weiss_spec *
66 } *entry, entries[] = {
67 {0x000007, &dac202},
68 {0x000008, &dac202}, // Maya e
69 {0x000006, &int202},
70 {0x00000a, &int203},
71 {0x00000b, &man301},
72 {0x000001, &adc2},
73 {0x000003, &dac2_minerva},
74 {0x000002, &vesta},
75 {0x000004, &afi1},
76 };
77 struct fw_csr_iterator it;
78 int key, val, model_id;
79 int i;
80
81 model_id = 0;
82 fw_csr_iterator_init(&it, dice->unit->
83 while (fw_csr_iterator_next(&it, &key,
84 if (key == CSR_MODEL) {
85 model_id = val;
86 break;
87 }
88 }
89
90 for (i = 0; i < ARRAY_SIZE(entries); +
91 entry = entries + i;
92 if (entry->model_id == model_i
93 break;
94 }
95 if (i == ARRAY_SIZE(entries))
96 return -ENODEV;
97
98 memcpy(dice->tx_pcm_chs, entry->spec->
99 MAX_STREAMS * SND_DICE_RATE_MOD
100 memcpy(dice->rx_pcm_chs, entry->spec->
101 MAX_STREAMS * SND_DICE_RATE_MOD
102
103 return 0;
104 }
105
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