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TOMOYO Linux Cross Reference
Linux/sound/pci/au88x0/au8820.h

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Diff markup

Differences between /sound/pci/au88x0/au8820.h (Version linux-6.12-rc7) and /sound/pci/au88x0/au8820.h (Version linux-6.6.58)


** Warning: Cannot open xref database.

  1 /* SPDX-License-Identifier: GPL-2.0 */              1 
  2 /*                                                
  3     Aureal Vortex Soundcard driver.               
  4                                                   
  5     IO addr collected from asp4core.vxd:          
  6     function    address                           
  7     0005D5A0    13004                             
  8     00080674    14004                             
  9     00080AFF    12818                             
 10                                                   
 11  */                                               
 12                                                   
 13 #define CHIP_AU8820                               
 14                                                   
 15 #define CARD_NAME "Aureal Vortex"                 
 16 #define CARD_NAME_SHORT "au8820"                  
 17                                                   
 18 /* Number of ADB and WT channels */               
 19 #define NR_ADB          0x10                      
 20 #define NR_WT           0x20                      
 21 #define NR_SRC          0x10                      
 22 #define NR_A3D          0x00                      
 23 #define NR_MIXIN        0x10                      
 24 #define NR_MIXOUT       0x10                      
 25                                                   
 26                                                   
 27 /* ADBDMA */                                      
 28 #define VORTEX_ADBDMA_STAT 0x105c0      /* rea    
 29 #define         POS_MASK 0x00000fff               
 30 #define     POS_SHIFT 0x0                         
 31 #define         ADB_SUBBUF_MASK 0x00003000        
 32 #define     ADB_SUBBUF_SHIFT 0xc        /* ADB    
 33 #define VORTEX_ADBDMA_CTRL 0x10580      /* wri    
 34 #define         OFFSET_MASK 0x00000fff            
 35 #define     OFFSET_SHIFT 0x0                      
 36 #define         IE_MASK 0x00001000      /* int    
 37 #define     IE_SHIFT 0xc                          
 38 #define     DIR_MASK 0x00002000 /* Direction.     
 39 #define     DIR_SHIFT 0xd                         
 40 #define         FMT_MASK 0x0003c000               
 41 #define         FMT_SHIFT 0xe                     
 42 // The masks and shift also work for the wtdma    
 43 #define VORTEX_ADBDMA_BUFCFG0 0x10400             
 44 #define VORTEX_ADBDMA_BUFCFG1 0x10404             
 45 #define VORTEX_ADBDMA_BUFBASE 0x10200             
 46 #define VORTEX_ADBDMA_START 0x106c0     /* Whi    
 47 #define VORTEX_ADBDMA_STATUS 0x10600    /* sto    
 48                                                   
 49 /* ADB */                                         
 50 #define VORTEX_ADB_SR 0x10a00   /* Samplerates    
 51 #define VORTEX_ADB_RTBASE 0x10800                 
 52 #define VORTEX_ADB_RTBASE_COUNT 103               
 53 #define VORTEX_ADB_CHNBASE 0x1099c                
 54 #define VORTEX_ADB_CHNBASE_COUNT 22               
 55 #define         ROUTE_MASK      0x3fff            
 56 #define     ADB_MASK   0x7f                       
 57 #define         ADB_SHIFT 0x7                     
 58 //#define     ADB_MIX_MASK 0xf                    
 59 /* ADB address */                                 
 60 #define         OFFSET_ADBDMA   0x00              
 61 #define         OFFSET_SRCOUT   0x10    /* on     
 62 #define         OFFSET_SRCIN    0x10    /* on     
 63 #define         OFFSET_MIXOUT   0x20    /* sou    
 64 #define         OFFSET_MIXIN    0x30    /* sin    
 65 #define         OFFSET_CODECIN  0x48    /* ADB    
 66 #define         OFFSET_CODECOUT 0x58    /* ADB    
 67 #define         OFFSET_SPORTOUT 0x60    /* sin    
 68 #define         OFFSET_SPORTIN  0x50    /* sou    
 69 #define         OFFSET_EFXOUT   0x50    /* sin    
 70 #define         OFFSET_EFXIN    0x40    /* sou    
 71 #define         OFFSET_A3DOUT   0x00    /* Thi    
 72 #define         OFFSET_A3DIN    0x00              
 73 #define         OFFSET_WTOUT    0x58    /*  */    
 74                                                   
 75 /* ADB route translate helper */                  
 76 #define ADB_DMA(x) (x + OFFSET_ADBDMA)            
 77 #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT)         
 78 #define ADB_SRCIN(x) (x + OFFSET_SRCIN)           
 79 #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT)         
 80 #define ADB_MIXIN(x) (x + OFFSET_MIXIN)           
 81 #define ADB_CODECIN(x) (x + OFFSET_CODECIN)       
 82 #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT)     
 83 #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT)     
 84 #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN)       
 85 #define ADB_A3DOUT(x) (x + OFFSET_A3DOUT)         
 86 #define ADB_A3DIN(x) (x + OFFSET_A3DIN)           
 87 #define ADB_WTOUT(x,y) (y + OFFSET_WTOUT)         
 88                                                   
 89 /* WTDMA */                                       
 90 #define VORTEX_WTDMA_CTRL 0x10500       /* for    
 91 #define VORTEX_WTDMA_STAT 0x10500       /* DMA    
 92 #define     WT_SUBBUF_MASK (0x3 << WT_SUBBUF_S    
 93 #define     WT_SUBBUF_SHIFT 0x15                  
 94 #define VORTEX_WTDMA_BUFBASE 0x10000              
 95 #define VORTEX_WTDMA_BUFCFG0 0x10300              
 96 #define VORTEX_WTDMA_BUFCFG1 0x10304              
 97 #define VORTEX_WTDMA_START 0x10640      /* whi    
 98                                                   
 99 #define VORTEX_WT_BASE 0x9000                     
100                                                   
101 /* MIXER */                                       
102 #define VORTEX_MIXER_SR 0x9f00                    
103 #define VORTEX_MIXER_CLIP 0x9f80                  
104 #define VORTEX_MIXER_CHNBASE 0x9e40               
105 #define VORTEX_MIXER_RTBASE 0x9e00                
106 #define         MIXER_RTBASE_SIZE 0x26            
107 #define VORTEX_MIX_ENIN 0x9a00  /* Input enabl    
108 #define VORTEX_MIX_SMP 0x9c00                     
109                                                   
110 /* MIX */                                         
111 #define VORTEX_MIX_INVOL_A 0x9000       /* in?    
112 #define VORTEX_MIX_INVOL_B 0x8000       /* out    
113 #define VORTEX_MIX_VOL_A 0x9800                   
114 #define VORTEX_MIX_VOL_B 0x8800                   
115                                                   
116 #define         VOL_MIN 0x80    /* Input volum    
117 #define         VOL_MAX 0x7f    /* FIXME: Not     
118                                                   
119 //#define MIX_OUTL    0xe                         
120 //#define MIX_OUTR    0xf                         
121 //#define MIX_INL     0xe                         
122 //#define MIX_INR     0xf                         
123 #define MIX_DEFIGAIN 0x08       /* 0x8 => 6dB     
124 #define MIX_DEFOGAIN 0x08                         
125                                                   
126 /* SRC */                                         
127 #define VORTEX_SRCBLOCK_SR      0xccc0            
128 #define VORTEX_SRC_CHNBASE      0xcc40            
129 #define VORTEX_SRC_RTBASE       0xcc00            
130 #define VORTEX_SRC_SOURCE       0xccc4            
131 #define VORTEX_SRC_SOURCESIZE 0xccc8              
132 #define VORTEX_SRC_U0           0xce00            
133 #define VORTEX_SRC_DRIFT0       0xce80            
134 #define VORTEX_SRC_DRIFT1       0xcec0            
135 #define VORTEX_SRC_U1           0xcf00            
136 #define VORTEX_SRC_DRIFT2       0xcf40            
137 #define VORTEX_SRC_U2           0xcf80            
138 #define VORTEX_SRC_DATA         0xc800            
139 #define VORTEX_SRC_DATA0        0xc000            
140 #define VORTEX_SRC_CONVRATIO 0xce40               
141 //#define     SRC_RATIO(x) ((((x<<15)/48000) +    
142 //#define     SRC_RATIO2(x) ((((48000<<15)/x)     
143                                                   
144 /* FIFO */                                        
145 #define VORTEX_FIFO_ADBCTRL 0xf800      /* Con    
146 #define VORTEX_FIFO_WTCTRL 0xf840                 
147 #define         FIFO_RDONLY     0x00000001        
148 #define         FIFO_CTRL       0x00000002        
149 #define         FIFO_VALID      0x00000010        
150 #define         FIFO_EMPTY      0x00000020        
151 #define         FIFO_U0         0x00001000        
152 #define         FIFO_U1         0x00010000        
153 #define         FIFO_SIZE_BITS 5                  
154 #define         FIFO_SIZE       (1<<FIFO_SIZE_    
155 #define         FIFO_MASK       (FIFO_SIZE-1)     
156 #define VORTEX_FIFO_ADBDATA 0xe000                
157 #define VORTEX_FIFO_WTDATA 0xe800                 
158                                                   
159 /* CODEC */                                       
160 #define VORTEX_CODEC_CTRL 0x11984                 
161 #define VORTEX_CODEC_EN 0x11990                   
162 #define         EN_CODEC        0x00000300        
163 #define         EN_SPORT        0x00030000        
164 #define         EN_SPDIF        0x000c0000        
165 #define VORTEX_CODEC_CHN 0x11880                  
166 #define VORTEX_CODEC_IO 0x11988                   
167                                                   
168 #define VORTEX_SPDIF_FLAGS              0x1005    
169 #define VORTEX_SPDIF_CFG0               0x119D    
170 #define VORTEX_SPDIF_CFG1               0x119D    
171 #define VORTEX_SPDIF_SMPRATE    0x11994           
172                                                   
173 /* Sample timer */                                
174 #define VORTEX_SMP_TIME 0x11998                   
175                                                   
176 /* IRQ */                                         
177 #define VORTEX_IRQ_SOURCE 0x12800       /* Int    
178 #define VORTEX_IRQ_CTRL 0x12804 /* Interrupt s    
179                                                   
180 #define VORTEX_STAT             0x12808 /* ??     
181                                                   
182 #define VORTEX_CTRL 0x1280c                       
183 #define         CTRL_MIDI_EN 0x00000001           
184 #define         CTRL_MIDI_PORT 0x00000060         
185 #define         CTRL_GAME_EN 0x00000008           
186 #define         CTRL_GAME_PORT 0x00000e00         
187 #define         CTRL_IRQ_ENABLE 0x4000            
188                                                   
189 /* write: Timer period config / read: TIMER IR    
190 #define VORTEX_IRQ_STAT 0x1199c                   
191                                                   
192 /* DMA */                                         
193 #define VORTEX_DMA_BUFFER 0x10200                 
194 #define VORTEX_ENGINE_CTRL 0x1060c                
195 #define         ENGINE_INIT 0x0L                  
196                                                   
197                      /* MIDI *//* GAME. */        
198 #define VORTEX_MIDI_DATA 0x11000                  
199 #define VORTEX_MIDI_CMD 0x11004 /* Write comma    
200 #define VORTEX_GAME_LEGACY 0x11008                
201 #define VORTEX_CTRL2 0x1100c                      
202 #define         CTRL2_GAME_ADCMODE 0x40           
203 #define VORTEX_GAME_AXIS 0x11010                  
204 #define         AXIS_SIZE 4                       
205 #define         AXIS_RANGE 0x1fff                 
206                                                   

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