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Linux/sound/pci/au88x0/au88x0_a3d.h

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Diff markup

Differences between /sound/pci/au88x0/au88x0_a3d.h (Architecture sparc64) and /sound/pci/au88x0/au88x0_a3d.h (Architecture ppc)


  1 /* SPDX-License-Identifier: GPL-2.0-or-later *      1 /* SPDX-License-Identifier: GPL-2.0-or-later */
  2 /*********************************************      2 /***************************************************************************
  3  *            au88x0_a3d.h                          3  *            au88x0_a3d.h
  4  *                                                  4  *
  5  *  Fri Jul 18 14:16:03 2003                        5  *  Fri Jul 18 14:16:03 2003
  6  *  Copyright  2003  mjander                        6  *  Copyright  2003  mjander
  7  *  mjander@users.sourceforge.net                   7  *  mjander@users.sourceforge.net
  8  *********************************************      8  ****************************************************************************/
  9                                                     9 
 10 /*                                                 10 /*
 11  */                                                11  */
 12                                                    12 
 13 #ifndef _AU88X0_A3D_H                              13 #ifndef _AU88X0_A3D_H
 14 #define _AU88X0_A3D_H                              14 #define _AU88X0_A3D_H
 15                                                    15 
 16 //#include <openal.h>                              16 //#include <openal.h>
 17                                                    17 
 18 #define HRTF_SZ 0x38                               18 #define HRTF_SZ 0x38
 19 #define DLINE_SZ 0x28                              19 #define DLINE_SZ 0x28
 20                                                    20 
 21 #define CTRLID_HRTF             1                  21 #define CTRLID_HRTF             1
 22 #define CTRLID_ITD              2                  22 #define CTRLID_ITD              2
 23 #define CTRLID_ILD              4                  23 #define CTRLID_ILD              4
 24 #define CTRLID_FILTER   8                          24 #define CTRLID_FILTER   8
 25 #define CTRLID_GAINS    16                         25 #define CTRLID_GAINS    16
 26                                                    26 
 27 /* 3D parameter structs */                         27 /* 3D parameter structs */
 28 typedef unsigned short int a3d_Hrtf_t[HRTF_SZ]     28 typedef unsigned short int a3d_Hrtf_t[HRTF_SZ];
 29 typedef unsigned short int a3d_ItdDline_t[DLIN     29 typedef unsigned short int a3d_ItdDline_t[DLINE_SZ];
 30 typedef unsigned short int a3d_atmos_t[5];         30 typedef unsigned short int a3d_atmos_t[5];
 31 typedef unsigned short int a3d_LRGains_t[2];       31 typedef unsigned short int a3d_LRGains_t[2];
 32 typedef unsigned short int a3d_Itd_t[2];           32 typedef unsigned short int a3d_Itd_t[2];
 33 typedef unsigned short int a3d_Ild_t[2];           33 typedef unsigned short int a3d_Ild_t[2];
 34                                                    34 
 35 typedef struct {                                   35 typedef struct {
 36         void *vortex;           // Formerly CA     36         void *vortex;           // Formerly CAsp4HwIO*, now vortex_t*.
 37         unsigned int source;    /* this_04 */      37         unsigned int source;    /* this_04 */
 38         unsigned int slice;     /* this_08 */      38         unsigned int slice;     /* this_08 */
 39         a3d_Hrtf_t hrtf[2];                        39         a3d_Hrtf_t hrtf[2];
 40         a3d_Itd_t itd;                             40         a3d_Itd_t itd;
 41         a3d_Ild_t ild;                             41         a3d_Ild_t ild;
 42         a3d_ItdDline_t dline;                      42         a3d_ItdDline_t dline;
 43         a3d_atmos_t filter;                        43         a3d_atmos_t filter;
 44 } a3dsrc_t;                                        44 } a3dsrc_t;
 45                                                    45 
 46 /* First Register bank */                          46 /* First Register bank */
 47                                                    47 
 48 #define A3D_A_HrtfCurrent       0x18000 /* 56      48 #define A3D_A_HrtfCurrent       0x18000 /* 56 ULONG */
 49 #define A3D_A_GainCurrent       0x180E0            49 #define A3D_A_GainCurrent       0x180E0
 50 #define A3D_A_GainTarget        0x180E4            50 #define A3D_A_GainTarget        0x180E4
 51 #define A3D_A_A12Current        0x180E8 /* Atm     51 #define A3D_A_A12Current        0x180E8 /* Atmospheric current. */
 52 #define A3D_A_A21Target         0x180EC /* Atm     52 #define A3D_A_A21Target         0x180EC /* Atmospheric target */
 53 #define A3D_A_B01Current        0x180F0 /* Atm     53 #define A3D_A_B01Current        0x180F0 /* Atmospheric current */
 54 #define A3D_A_B10Target         0x180F4 /* Atm     54 #define A3D_A_B10Target         0x180F4 /* Atmospheric target */
 55 #define A3D_A_B2Current         0x180F8 /* Atm     55 #define A3D_A_B2Current         0x180F8 /* Atmospheric current */
 56 #define A3D_A_B2Target          0x180FC /* Atm     56 #define A3D_A_B2Target          0x180FC /* Atmospheric target */
 57 #define A3D_A_HrtfTarget        0x18100 /* 56      57 #define A3D_A_HrtfTarget        0x18100 /* 56 ULONG */
 58 #define A3D_A_ITDCurrent        0x181E0            58 #define A3D_A_ITDCurrent        0x181E0
 59 #define A3D_A_ITDTarget         0x181E4            59 #define A3D_A_ITDTarget         0x181E4
 60 #define A3D_A_HrtfDelayLine     0x181E8 /* 56      60 #define A3D_A_HrtfDelayLine     0x181E8 /* 56 ULONG */
 61 #define A3D_A_ITDDelayLine      0x182C8 /* 40/     61 #define A3D_A_ITDDelayLine      0x182C8 /* 40/45 ULONG */
 62 #define A3D_A_HrtfTrackTC       0x1837C /* Tim     62 #define A3D_A_HrtfTrackTC       0x1837C /* Time Constants */
 63 #define A3D_A_GainTrackTC       0x18380            63 #define A3D_A_GainTrackTC       0x18380
 64 #define A3D_A_CoeffTrackTC      0x18384            64 #define A3D_A_CoeffTrackTC      0x18384
 65 #define A3D_A_ITDTrackTC        0x18388            65 #define A3D_A_ITDTrackTC        0x18388
 66 #define A3D_A_x1                        0x1838     66 #define A3D_A_x1                        0x1838C
 67 #define A3D_A_x2                        0x1839     67 #define A3D_A_x2                        0x18390
 68 #define A3D_A_y1                        0x1839     68 #define A3D_A_y1                        0x18394
 69 #define A3D_A_y2                        0x1839     69 #define A3D_A_y2                        0x18398
 70 #define A3D_A_HrtfOutL          0x1839C            70 #define A3D_A_HrtfOutL          0x1839C
 71 #define A3D_A_HrtfOutR          0x183A0            71 #define A3D_A_HrtfOutR          0x183A0
 72 #define         A3D_A_TAIL              0x183A     72 #define         A3D_A_TAIL              0x183A4
 73                                                    73 
 74 /* Second register bank */                         74 /* Second register bank */
 75 #define A3D_B_HrtfCurrent       0x19000 /* 56      75 #define A3D_B_HrtfCurrent       0x19000 /* 56 ULONG */
 76 #define A3D_B_GainCurrent       0x190E0            76 #define A3D_B_GainCurrent       0x190E0
 77 #define A3D_B_GainTarget        0x190E4            77 #define A3D_B_GainTarget        0x190E4
 78 #define A3D_B_A12Current        0x190E8            78 #define A3D_B_A12Current        0x190E8
 79 #define A3D_B_A21Target         0x190EC            79 #define A3D_B_A21Target         0x190EC
 80 #define A3D_B_B01Current        0x190F0            80 #define A3D_B_B01Current        0x190F0
 81 #define A3D_B_B10Target         0x190F4            81 #define A3D_B_B10Target         0x190F4
 82 #define A3D_B_B2Current         0x190F8            82 #define A3D_B_B2Current         0x190F8
 83 #define A3D_B_B2Target          0x190FC            83 #define A3D_B_B2Target          0x190FC
 84 #define A3D_B_HrtfTarget        0x19100 /* 56      84 #define A3D_B_HrtfTarget        0x19100 /* 56 ULONG */
 85 #define A3D_B_ITDCurrent        0x191E0            85 #define A3D_B_ITDCurrent        0x191E0
 86 #define A3D_B_ITDTarget         0x191E4            86 #define A3D_B_ITDTarget         0x191E4
 87 #define A3D_B_HrtfDelayLine     0x191E8 /* 56      87 #define A3D_B_HrtfDelayLine     0x191E8 /* 56 ULONG */
 88 #define         A3D_B_TAIL              0x192C     88 #define         A3D_B_TAIL              0x192C8
 89                                                    89 
 90 /* There are 4 slices, 4 a3d each = 16 a3d sou     90 /* There are 4 slices, 4 a3d each = 16 a3d sources. */
 91 #define A3D_SLICE_BANK_A                0x1800     91 #define A3D_SLICE_BANK_A                0x18000 /* 4 sources */
 92 #define A3D_SLICE_BANK_B                0x1900     92 #define A3D_SLICE_BANK_B                0x19000 /* 4 sources */
 93 #define A3D_SLICE_VDBDest               0x19C0     93 #define A3D_SLICE_VDBDest               0x19C00 /* 8 ULONG */
 94 #define A3D_SLICE_VDBSource             0x19C2     94 #define A3D_SLICE_VDBSource             0x19C20 /* 4 ULONG */
 95 #define A3D_SLICE_ABReg                 0x19C3     95 #define A3D_SLICE_ABReg                 0x19C30
 96 #define A3D_SLICE_CReg                  0x19C3     96 #define A3D_SLICE_CReg                  0x19C34
 97 #define A3D_SLICE_Control               0x19C3     97 #define A3D_SLICE_Control               0x19C38
 98 #define A3D_SLICE_DebugReserved 0x19C3c /* Dan     98 #define A3D_SLICE_DebugReserved 0x19C3c /* Dangerous! */
 99 #define A3D_SLICE_Pointers              0x19C4     99 #define A3D_SLICE_Pointers              0x19C40
100 #define         A3D_SLICE_TAIL          0x1A00    100 #define         A3D_SLICE_TAIL          0x1A000
101                                                   101 
102 // Slice size: 0x2000                             102 // Slice size: 0x2000
103 // Source size: 0x3A4, 0x2C8                      103 // Source size: 0x3A4, 0x2C8
104                                                   104 
105 /* Address generator macro. */                    105 /* Address generator macro. */
106 #define a3d_addrA(slice,source,reg) (((slice)<    106 #define a3d_addrA(slice,source,reg) (((slice)<<0xd)+((source)*0x3A4)+(reg))
107 #define a3d_addrB(slice,source,reg) (((slice)<    107 #define a3d_addrB(slice,source,reg) (((slice)<<0xd)+((source)*0x2C8)+(reg))
108 #define a3d_addrS(slice,reg) (((slice)<<0xd)+(    108 #define a3d_addrS(slice,reg) (((slice)<<0xd)+(reg))
109 //#define a3d_addr(slice,source,reg) (((reg)>=    109 //#define a3d_addr(slice,source,reg) (((reg)>=0x19000) ? a3d_addr2((slice),(source),(reg)) : a3d_addr1((slice),(source),(reg)))
110                                                   110 
111 #endif                          /* _AU88X0_A3D    111 #endif                          /* _AU88X0_A3D_H */
112                                                   112 

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