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TOMOYO Linux Cross Reference
Linux/sound/pci/echoaudio/darla20_dsp.c

Version: ~ [ linux-6.11.5 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.58 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.114 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.169 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.228 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.284 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.322 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.9 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /sound/pci/echoaudio/darla20_dsp.c (Architecture m68k) and /sound/pci/echoaudio/darla20_dsp.c (Architecture sparc64)


  1 /*********************************************      1 /***************************************************************************
  2                                                     2 
  3    Copyright Echo Digital Audio Corporation (c      3    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
  4    All rights reserved                              4    All rights reserved
  5    www.echoaudio.com                                5    www.echoaudio.com
  6                                                     6 
  7    This file is part of Echo Digital Audio's g      7    This file is part of Echo Digital Audio's generic driver library.
  8                                                     8 
  9    Echo Digital Audio's generic driver library      9    Echo Digital Audio's generic driver library is free software;
 10    you can redistribute it and/or modify it un     10    you can redistribute it and/or modify it under the terms of
 11    the GNU General Public License as published     11    the GNU General Public License as published by the Free Software
 12    Foundation.                                     12    Foundation.
 13                                                    13 
 14    This program is distributed in the hope tha     14    This program is distributed in the hope that it will be useful,
 15    but WITHOUT ANY WARRANTY; without even the      15    but WITHOUT ANY WARRANTY; without even the implied warranty of
 16    MERCHANTABILITY or FITNESS FOR A PARTICULAR     16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17    GNU General Public License for more details     17    GNU General Public License for more details.
 18                                                    18 
 19    You should have received a copy of the GNU      19    You should have received a copy of the GNU General Public License
 20    along with this program; if not, write to t     20    along with this program; if not, write to the Free Software
 21    Foundation, Inc., 59 Temple Place - Suite 3     21    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
 22    MA  02111-1307, USA.                            22    MA  02111-1307, USA.
 23                                                    23 
 24    *******************************************     24    *************************************************************************
 25                                                    25 
 26  Translation from C++ and adaptation for use i     26  Translation from C++ and adaptation for use in ALSA-Driver
 27  were made by Giuliano Pochini <pochini@shiny.     27  were made by Giuliano Pochini <pochini@shiny.it>
 28                                                    28 
 29 **********************************************     29 ****************************************************************************/
 30                                                    30 
 31                                                    31 
 32 static int init_hw(struct echoaudio *chip, u16     32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
 33 {                                                  33 {
 34         int err;                                   34         int err;
 35                                                    35 
 36         if (snd_BUG_ON((subdevice_id & 0xfff0)     36         if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
 37                 return -ENODEV;                    37                 return -ENODEV;
 38                                                    38 
 39         err = init_dsp_comm_page(chip);            39         err = init_dsp_comm_page(chip);
 40         if (err) {                                 40         if (err) {
 41                 dev_err(chip->card->dev,           41                 dev_err(chip->card->dev,
 42                         "init_hw: could not in     42                         "init_hw: could not initialize DSP comm page\n");
 43                 return err;                        43                 return err;
 44         }                                          44         }
 45                                                    45 
 46         chip->device_id = device_id;               46         chip->device_id = device_id;
 47         chip->subdevice_id = subdevice_id;         47         chip->subdevice_id = subdevice_id;
 48         chip->bad_board = true;                    48         chip->bad_board = true;
 49         chip->dsp_code_to_load = FW_DARLA20_DS     49         chip->dsp_code_to_load = FW_DARLA20_DSP;
 50         chip->spdif_status = GD_SPDIF_STATUS_U     50         chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
 51         chip->clock_state = GD_CLOCK_UNDEF;        51         chip->clock_state = GD_CLOCK_UNDEF;
 52         /* Since this card has no ASIC, mark i     52         /* Since this card has no ASIC, mark it as loaded so everything
 53            works OK */                             53            works OK */
 54         chip->asic_loaded = true;                  54         chip->asic_loaded = true;
 55         chip->input_clock_types = ECHO_CLOCK_B     55         chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
 56                                                    56 
 57         err = load_firmware(chip);                 57         err = load_firmware(chip);
 58         if (err < 0)                               58         if (err < 0)
 59                 return err;                        59                 return err;
 60         chip->bad_board = false;                   60         chip->bad_board = false;
 61                                                    61 
 62         return err;                                62         return err;
 63 }                                                  63 }
 64                                                    64 
 65                                                    65 
 66                                                    66 
 67 static int set_mixer_defaults(struct echoaudio     67 static int set_mixer_defaults(struct echoaudio *chip)
 68 {                                                  68 {
 69         return init_line_levels(chip);             69         return init_line_levels(chip);
 70 }                                                  70 }
 71                                                    71 
 72                                                    72 
 73                                                    73 
 74 /* The Darla20 has no external clock sources *     74 /* The Darla20 has no external clock sources */
 75 static u32 detect_input_clocks(const struct ec     75 static u32 detect_input_clocks(const struct echoaudio *chip)
 76 {                                                  76 {
 77         return ECHO_CLOCK_BIT_INTERNAL;            77         return ECHO_CLOCK_BIT_INTERNAL;
 78 }                                                  78 }
 79                                                    79 
 80                                                    80 
 81                                                    81 
 82 /* The Darla20 has no ASIC. Just do nothing */     82 /* The Darla20 has no ASIC. Just do nothing */
 83 static int load_asic(struct echoaudio *chip)       83 static int load_asic(struct echoaudio *chip)
 84 {                                                  84 {
 85         return 0;                                  85         return 0;
 86 }                                                  86 }
 87                                                    87 
 88                                                    88 
 89                                                    89 
 90 static int set_sample_rate(struct echoaudio *c     90 static int set_sample_rate(struct echoaudio *chip, u32 rate)
 91 {                                                  91 {
 92         u8 clock_state, spdif_status;              92         u8 clock_state, spdif_status;
 93                                                    93 
 94         if (wait_handshake(chip))                  94         if (wait_handshake(chip))
 95                 return -EIO;                       95                 return -EIO;
 96                                                    96 
 97         switch (rate) {                            97         switch (rate) {
 98         case 44100:                                98         case 44100:
 99                 clock_state = GD_CLOCK_44;         99                 clock_state = GD_CLOCK_44;
100                 spdif_status = GD_SPDIF_STATUS    100                 spdif_status = GD_SPDIF_STATUS_44;
101                 break;                            101                 break;
102         case 48000:                               102         case 48000:
103                 clock_state = GD_CLOCK_48;        103                 clock_state = GD_CLOCK_48;
104                 spdif_status = GD_SPDIF_STATUS    104                 spdif_status = GD_SPDIF_STATUS_48;
105                 break;                            105                 break;
106         default:                                  106         default:
107                 clock_state = GD_CLOCK_NOCHANG    107                 clock_state = GD_CLOCK_NOCHANGE;
108                 spdif_status = GD_SPDIF_STATUS    108                 spdif_status = GD_SPDIF_STATUS_NOCHANGE;
109                 break;                            109                 break;
110         }                                         110         }
111                                                   111 
112         if (chip->clock_state == clock_state)     112         if (chip->clock_state == clock_state)
113                 clock_state = GD_CLOCK_NOCHANG    113                 clock_state = GD_CLOCK_NOCHANGE;
114         if (spdif_status == chip->spdif_status    114         if (spdif_status == chip->spdif_status)
115                 spdif_status = GD_SPDIF_STATUS    115                 spdif_status = GD_SPDIF_STATUS_NOCHANGE;
116                                                   116 
117         chip->comm_page->sample_rate = cpu_to_    117         chip->comm_page->sample_rate = cpu_to_le32(rate);
118         chip->comm_page->gd_clock_state = cloc    118         chip->comm_page->gd_clock_state = clock_state;
119         chip->comm_page->gd_spdif_status = spd    119         chip->comm_page->gd_spdif_status = spdif_status;
120         chip->comm_page->gd_resampler_state =     120         chip->comm_page->gd_resampler_state = 3;        /* magic number - should always be 3 */
121                                                   121 
122         /* Save the new audio state if it chan    122         /* Save the new audio state if it changed */
123         if (clock_state != GD_CLOCK_NOCHANGE)     123         if (clock_state != GD_CLOCK_NOCHANGE)
124                 chip->clock_state = clock_stat    124                 chip->clock_state = clock_state;
125         if (spdif_status != GD_SPDIF_STATUS_NO    125         if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
126                 chip->spdif_status = spdif_sta    126                 chip->spdif_status = spdif_status;
127         chip->sample_rate = rate;                 127         chip->sample_rate = rate;
128                                                   128 
129         clear_handshake(chip);                    129         clear_handshake(chip);
130         return send_vector(chip, DSP_VC_SET_GD    130         return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
131 }                                                 131 }
132                                                   132 

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