1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 2 /* 3 * Copyright (c) by James Courtier-Dutton <Ja 3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk> 4 * Driver p16v chips 4 * Driver p16v chips 5 * 5 * 6 * This code was initially based on code from 6 * This code was initially based on code from ALSA's emu10k1x.c which is: 7 * Copyright (c) by Francisco Moraes <fmoraes 7 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com> 8 */ 8 */ 9 9 10 /********************************************* 10 /********************************************************************************************************/ 11 /* Audigy2 P16V pointer-offset register set, a 11 /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers */ 12 /********************************************* 12 /********************************************************************************************************/ 13 13 14 /* The sample rate of the SPDIF outputs is set 14 /* The sample rate of the SPDIF outputs is set by modifying a register in the EMU10K2 PTR register A_SPDIF_SAMPLERATE. 15 * The sample rate is also controlled by the s 15 * The sample rate is also controlled by the same registers that control the rate of the EMU10K2 sample rate converters. 16 */ 16 */ 17 17 18 /* Initially all registers from 0x00 to 0x3f h 18 /* Initially all registers from 0x00 to 0x3f have zero contents. */ 19 #define PLAYBACK_LIST_ADDR 0x00 19 #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */ 20 20 /* One list entry: 4 bytes for DMA address, 21 21 * 4 bytes for period_size << 16. 22 22 * One list entry is 8 bytes long. 23 23 * One list entry for each period in the buffer. 24 24 */ 25 #define PLAYBACK_LIST_SIZE 0x01 25 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ 26 #define PLAYBACK_LIST_PTR 0x02 26 #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ 27 #define PLAYBACK_UNKNOWN3 0x03 27 #define PLAYBACK_UNKNOWN3 0x03 /* Not used */ 28 #define PLAYBACK_DMA_ADDR 0x04 28 #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ 29 #define PLAYBACK_PERIOD_SIZE 0x05 29 #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */ 30 #define PLAYBACK_POINTER 0x06 30 #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Used with PLAYBACK_LIST_PTR to determine buffer position currently in DAC */ 31 #define PLAYBACK_FIFO_END_ADDRESS 0x07 31 #define PLAYBACK_FIFO_END_ADDRESS 0x07 /* Playback FIFO end address */ 32 #define PLAYBACK_FIFO_POINTER 0x08 32 #define PLAYBACK_FIFO_POINTER 0x08 /* Playback FIFO pointer and number of valid sound samples in cache */ 33 #define PLAYBACK_UNKNOWN9 0x09 33 #define PLAYBACK_UNKNOWN9 0x09 /* Not used */ 34 #define CAPTURE_DMA_ADDR 0x10 34 #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */ 35 #define CAPTURE_BUFFER_SIZE 0x11 35 #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */ 36 #define CAPTURE_POINTER 0x12 36 #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */ 37 #define CAPTURE_FIFO_POINTER 0x13 37 #define CAPTURE_FIFO_POINTER 0x13 /* Capture FIFO pointer and number of valid sound samples in cache */ 38 #define CAPTURE_P16V_VOLUME1 0x14 38 #define CAPTURE_P16V_VOLUME1 0x14 /* Low: Capture volume 0xXXXX3030 */ 39 #define CAPTURE_P16V_VOLUME2 0x15 39 #define CAPTURE_P16V_VOLUME2 0x15 /* High:Has no effect on capture volume */ 40 #define CAPTURE_P16V_SOURCE 0x16 40 #define CAPTURE_P16V_SOURCE 0x16 /* P16V source select. Set to 0x0700E4E5 for AC97 CAPTURE */ 41 41 /* [0:1] Capture input 0 channel select. 0 = Capture output 0. 42 42 * 1 = Capture output 1. 43 43 * 2 = Capture output 2. 44 44 * 3 = Capture output 3. 45 45 * [3:2] Capture input 1 channel select. 0 = Capture output 0. 46 46 * 1 = Capture output 1. 47 47 * 2 = Capture output 2. 48 48 * 3 = Capture output 3. 49 49 * [5:4] Capture input 2 channel select. 0 = Capture output 0. 50 50 * 1 = Capture output 1. 51 51 * 2 = Capture output 2. 52 52 * 3 = Capture output 3. 53 53 * [7:6] Capture input 3 channel select. 0 = Capture output 0. 54 54 * 1 = Capture output 1. 55 55 * 2 = Capture output 2. 56 56 * 3 = Capture output 3. 57 57 * [9:8] Playback input 0 channel select. 0 = Play output 0. 58 58 * 1 = Play output 1. 59 59 * 2 = Play output 2. 60 60 * 3 = Play output 3. 61 61 * [11:10] Playback input 1 channel select. 0 = Play output 0. 62 62 * 1 = Play output 1. 63 63 * 2 = Play output 2. 64 64 * 3 = Play output 3. 65 65 * [13:12] Playback input 2 channel select. 0 = Play output 0. 66 66 * 1 = Play output 1. 67 67 * 2 = Play output 2. 68 68 * 3 = Play output 3. 69 69 * [15:14] Playback input 3 channel select. 0 = Play output 0. 70 70 * 1 = Play output 1. 71 71 * 2 = Play output 2. 72 72 * 3 = Play output 3. 73 73 * [19:16] Playback mixer output enable. 1 bit per channel. 74 74 * [23:20] Capture mixer output enable. 1 bit per channel. 75 75 * [26:24] FX engine channel capture 0 = 0x60-0x67. 76 76 * 1 = 0x68-0x6f. 77 77 * 2 = 0x70-0x77. 78 78 * 3 = 0x78-0x7f. 79 79 * 4 = 0x80-0x87. 80 80 * 5 = 0x88-0x8f. 81 81 * 6 = 0x90-0x97. 82 82 * 7 = 0x98-0x9f. 83 83 * [31:27] Not used. 84 84 */ 85 85 86 86 /* 0x1 = capture on. 87 87 * 0x100 = capture off. 88 88 * 0x200 = capture off. 89 89 * 0x1000 = capture off. 90 90 */ 91 #define CAPTURE_RATE_STATUS 0x17 91 #define CAPTURE_RATE_STATUS 0x17 /* Capture sample rate. Read only */ 92 92 /* [15:0] Not used. 93 93 * [18:16] Channel 0 Detected sample rate. 0 - 44.1khz 94 94 * 1 - 48 khz 95 95 * 2 - 96 khz 96 96 * 3 - 192 khz 97 97 * 7 - undefined rate. 98 98 * [19] Channel 0. 1 - Valid, 0 - Not Valid. 99 99 * [22:20] Channel 1 Detected sample rate. 100 100 * [23] Channel 1. 1 - Valid, 0 - Not Valid. 101 101 * [26:24] Channel 2 Detected sample rate. 102 102 * [27] Channel 2. 1 - Valid, 0 - Not Valid. 103 103 * [30:28] Channel 3 Detected sample rate. 104 104 * [31] Channel 3. 1 - Valid, 0 - Not Valid. 105 105 */ 106 /* 0x18 - 0x1f unused */ 106 /* 0x18 - 0x1f unused */ 107 #define PLAYBACK_LAST_SAMPLE 0x20 107 #define PLAYBACK_LAST_SAMPLE 0x20 /* The sample currently being played. Read only */ 108 /* 0x21 - 0x3f unused */ 108 /* 0x21 - 0x3f unused */ 109 #define BASIC_INTERRUPT 0x40 109 #define BASIC_INTERRUPT 0x40 /* Used by both playback and capture interrupt handler */ 110 110 /* Playback (0x1<<channel_id) Don't touch high 16bits. */ 111 111 /* Capture (0x100<<channel_id). not tested */ 112 112 /* Start Playback [3:0] (one bit per channel) 113 113 * Start Capture [11:8] (one bit per channel) 114 114 * Record source select for channel 0 [18:16] 115 115 * Record source select for channel 1 [22:20] 116 116 * Record source select for channel 2 [26:24] 117 117 * Record source select for channel 3 [30:28] 118 118 * 0 - SPDIF channel. 119 119 * 1 - I2S channel. 120 120 * 2 - SRC48 channel. 121 121 * 3 - SRCMulti_SPDIF channel. 122 122 * 4 - SRCMulti_I2S channel. 123 123 * 5 - SPDIF channel. 124 124 * 6 - fxengine capture. 125 125 * 7 - AC97 capture. 126 126 */ 127 127 /* Default 41110000. 128 128 * Writing 0xffffffff hangs the PC. 129 129 * Writing 0xffff0000 -> 77770000 so it must be some sort of route. 130 130 * bit 0x1 starts DMA playback on channel_id 0 131 131 */ 132 /* 0x41,42 take values from 0 - 0xffffffff, bu 132 /* 0x41,42 take values from 0 - 0xffffffff, but have no effect on playback */ 133 /* 0x43,0x48 do not remember settings */ 133 /* 0x43,0x48 do not remember settings */ 134 /* 0x41-45 unused */ 134 /* 0x41-45 unused */ 135 #define WATERMARK 0x46 135 #define WATERMARK 0x46 /* Test bit to indicate cache level usage */ 136 136 /* Values it can have while playing on channel 0. 137 137 * 0000f000, 0000f004, 0000f008, 0000f00c. 138 138 * Readonly. 139 139 */ 140 /* 0x47-0x4f unused */ 140 /* 0x47-0x4f unused */ 141 /* 0x50-0x5f Capture cache data */ 141 /* 0x50-0x5f Capture cache data */ 142 #define SRCSel 0x60 142 #define SRCSel 0x60 /* SRCSel. Default 0x4. Bypass P16V 0x14 */ 143 143 /* [0] 0 = 10K2 audio, 1 = SRC48 mixer output. 144 144 * [2] 0 = 10K2 audio, 1 = SRCMulti SPDIF mixer output. 145 145 * [4] 0 = 10K2 audio, 1 = SRCMulti I2S mixer output. 146 146 */ 147 147 /* SRC48 converts samples rates 44.1, 48, 96, 192 to 48 khz. */ 148 148 /* SRCMulti converts 48khz samples rates to 44.1, 48, 96, 192 to 48. */ 149 149 /* SRC48 and SRCMULTI sample rate select and output select. */ 150 150 /* 0xffffffff -> 0xC0000015 151 151 * 0xXXXXXXX4 = Enable Front Left/Right 152 152 * Enable PCMs 153 153 */ 154 154 155 /* 0x61 -> 0x6c are Volume controls */ 155 /* 0x61 -> 0x6c are Volume controls */ 156 #define PLAYBACK_VOLUME_MIXER1 0x61 156 #define PLAYBACK_VOLUME_MIXER1 0x61 /* SRC48 Low to mixer input volume control. */ 157 #define PLAYBACK_VOLUME_MIXER2 0x62 157 #define PLAYBACK_VOLUME_MIXER2 0x62 /* SRC48 High to mixer input volume control. */ 158 #define PLAYBACK_VOLUME_MIXER3 0x63 158 #define PLAYBACK_VOLUME_MIXER3 0x63 /* SRCMULTI SPDIF Low to mixer input volume control. */ 159 #define PLAYBACK_VOLUME_MIXER4 0x64 159 #define PLAYBACK_VOLUME_MIXER4 0x64 /* SRCMULTI SPDIF High to mixer input volume control. */ 160 #define PLAYBACK_VOLUME_MIXER5 0x65 160 #define PLAYBACK_VOLUME_MIXER5 0x65 /* SRCMULTI I2S Low to mixer input volume control. */ 161 #define PLAYBACK_VOLUME_MIXER6 0x66 161 #define PLAYBACK_VOLUME_MIXER6 0x66 /* SRCMULTI I2S High to mixer input volume control. */ 162 #define PLAYBACK_VOLUME_MIXER7 0x67 162 #define PLAYBACK_VOLUME_MIXER7 0x67 /* P16V Low to SRCMULTI SPDIF mixer input volume control. */ 163 #define PLAYBACK_VOLUME_MIXER8 0x68 163 #define PLAYBACK_VOLUME_MIXER8 0x68 /* P16V High to SRCMULTI SPDIF mixer input volume control. */ 164 #define PLAYBACK_VOLUME_MIXER9 0x69 164 #define PLAYBACK_VOLUME_MIXER9 0x69 /* P16V Low to SRCMULTI I2S mixer input volume control. */ 165 165 /* 0xXXXX3030 = PCM0 Volume (Front). 166 166 * 0x3030XXXX = PCM1 Volume (Center) 167 167 */ 168 #define PLAYBACK_VOLUME_MIXER10 0x6a 168 #define PLAYBACK_VOLUME_MIXER10 0x6a /* P16V High to SRCMULTI I2S mixer input volume control. */ 169 169 /* 0x3030XXXX = PCM3 Volume (Rear). */ 170 #define PLAYBACK_VOLUME_MIXER11 0x6b 170 #define PLAYBACK_VOLUME_MIXER11 0x6b /* E10K2 Low to SRC48 mixer input volume control. */ 171 #define PLAYBACK_VOLUME_MIXER12 0x6c 171 #define PLAYBACK_VOLUME_MIXER12 0x6c /* E10K2 High to SRC48 mixer input volume control. */ 172 172 173 #define SRC48_ENABLE 0x6d 173 #define SRC48_ENABLE 0x6d /* SRC48 input audio enable */ 174 174 /* SRC48 converts samples rates 44.1, 48, 96, 192 to 48 khz. */ 175 175 /* [23:16] The corresponding P16V channel to SRC48 enabled if == 1. 176 176 * [31:24] The corresponding E10K2 channel to SRC48 enabled. 177 177 */ 178 #define SRCMULTI_ENABLE 0x6e 178 #define SRCMULTI_ENABLE 0x6e /* SRCMulti input audio enable. Default 0xffffffff */ 179 179 /* SRCMulti converts 48khz samples rates to 44.1, 48, 96, 192 to 48. */ 180 180 /* [7:0] The corresponding P16V channel to SRCMulti_I2S enabled if == 1. 181 181 * [15:8] The corresponding E10K2 channel to SRCMulti I2S enabled. 182 182 * [23:16] The corresponding P16V channel to SRCMulti SPDIF enabled. 183 183 * [31:24] The corresponding E10K2 channel to SRCMulti SPDIF enabled. 184 184 */ 185 185 /* Bypass P16V 0xff00ff00 186 186 * Bitmap. 0 = Off, 1 = On. 187 187 * P16V playback outputs: 188 188 * 0xXXXXXXX1 = PCM0 Left. (Front) 189 189 * 0xXXXXXXX2 = PCM0 Right. 190 190 * 0xXXXXXXX4 = PCM1 Left. (Center/LFE) 191 191 * 0xXXXXXXX8 = PCM1 Right. 192 192 * 0xXXXXXX1X = PCM2 Left. (Unknown) 193 193 * 0xXXXXXX2X = PCM2 Right. 194 194 * 0xXXXXXX4X = PCM3 Left. (Rear) 195 195 * 0xXXXXXX8X = PCM3 Right. 196 196 */ 197 #define AUDIO_OUT_ENABLE 0x6f 197 #define AUDIO_OUT_ENABLE 0x6f /* Default: 000100FF */ 198 198 /* [3:0] Does something, but not documented. Probably capture enable. 199 199 * [7:4] Playback channels enable. not documented. 200 200 * [16] AC97 output enable if == 1 201 201 * [30] 0 = SRCMulti_I2S input from fxengine 0x68-0x6f. 202 202 * 1 = SRCMulti_I2S input from SRC48 output. 203 203 * [31] 0 = SRCMulti_SPDIF input from fxengine 0x60-0x67. 204 204 * 1 = SRCMulti_SPDIF input from SRC48 output. 205 205 */ 206 206 /* 0xffffffff -> C00100FF */ 207 207 /* 0 -> Not playback sound, irq still running */ 208 208 /* 0xXXXXXX10 = PCM0 Left/Right On. (Front) 209 209 * 0xXXXXXX20 = PCM1 Left/Right On. (Center/LFE) 210 210 * 0xXXXXXX40 = PCM2 Left/Right On. (Unknown) 211 211 * 0xXXXXXX80 = PCM3 Left/Right On. (Rear) 212 212 */ 213 #define PLAYBACK_SPDIF_SELECT 0x70 213 #define PLAYBACK_SPDIF_SELECT 0x70 /* Default: 12030F00 */ 214 214 /* 0xffffffff -> 3FF30FFF */ 215 215 /* 0x00000001 pauses stream/irq fail. */ 216 216 /* All other bits do not effect playback */ 217 #define PLAYBACK_SPDIF_SRC_SELECT 0x71 217 #define PLAYBACK_SPDIF_SRC_SELECT 0x71 /* Default: 0000E4E4 */ 218 218 /* 0xffffffff -> F33FFFFF */ 219 219 /* All bits do not effect playback */ 220 #define PLAYBACK_SPDIF_USER_DATA0 0x72 220 #define PLAYBACK_SPDIF_USER_DATA0 0x72 /* SPDIF out user data 0 */ 221 #define PLAYBACK_SPDIF_USER_DATA1 0x73 221 #define PLAYBACK_SPDIF_USER_DATA1 0x73 /* SPDIF out user data 1 */ 222 /* 0x74-0x75 unknown */ 222 /* 0x74-0x75 unknown */ 223 #define CAPTURE_SPDIF_CONTROL 0x76 223 #define CAPTURE_SPDIF_CONTROL 0x76 /* SPDIF in control setting */ 224 #define CAPTURE_SPDIF_STATUS 0x77 224 #define CAPTURE_SPDIF_STATUS 0x77 /* SPDIF in status */ 225 #define CAPURE_SPDIF_USER_DATA0 0x78 225 #define CAPURE_SPDIF_USER_DATA0 0x78 /* SPDIF in user data 0 */ 226 #define CAPURE_SPDIF_USER_DATA1 0x79 226 #define CAPURE_SPDIF_USER_DATA1 0x79 /* SPDIF in user data 1 */ 227 #define CAPURE_SPDIF_USER_DATA2 0x7a 227 #define CAPURE_SPDIF_USER_DATA2 0x7a /* SPDIF in user data 2 */ 228 228 229 229
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