1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * helper functions for HDMI models (Xonar HDA 3 * helper functions for HDMI models (Xonar HDAV1.3/HDAV1.3 Slim)
4 * 4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladi 5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 */ 6 */
7 7
8 #include <linux/pci.h> 8 #include <linux/pci.h>
9 #include <linux/delay.h> 9 #include <linux/delay.h>
10 #include <sound/asoundef.h> 10 #include <sound/asoundef.h>
11 #include <sound/control.h> 11 #include <sound/control.h>
12 #include <sound/core.h> 12 #include <sound/core.h>
13 #include <sound/pcm.h> 13 #include <sound/pcm.h>
14 #include <sound/pcm_params.h> 14 #include <sound/pcm_params.h>
15 #include <sound/tlv.h> 15 #include <sound/tlv.h>
16 #include "xonar.h" 16 #include "xonar.h"
17 17
18 static void hdmi_write_command(struct oxygen * 18 static void hdmi_write_command(struct oxygen *chip, u8 command,
19 unsigned int co 19 unsigned int count, const u8 *params)
20 { 20 {
21 unsigned int i; 21 unsigned int i;
22 u8 checksum; 22 u8 checksum;
23 23
24 oxygen_write_uart(chip, 0xfb); 24 oxygen_write_uart(chip, 0xfb);
25 oxygen_write_uart(chip, 0xef); 25 oxygen_write_uart(chip, 0xef);
26 oxygen_write_uart(chip, command); 26 oxygen_write_uart(chip, command);
27 oxygen_write_uart(chip, count); 27 oxygen_write_uart(chip, count);
28 for (i = 0; i < count; ++i) 28 for (i = 0; i < count; ++i)
29 oxygen_write_uart(chip, params 29 oxygen_write_uart(chip, params[i]);
30 checksum = 0xfb + 0xef + command + cou 30 checksum = 0xfb + 0xef + command + count;
31 for (i = 0; i < count; ++i) 31 for (i = 0; i < count; ++i)
32 checksum += params[i]; 32 checksum += params[i];
33 oxygen_write_uart(chip, checksum); 33 oxygen_write_uart(chip, checksum);
34 } 34 }
35 35
36 static void xonar_hdmi_init_commands(struct ox 36 static void xonar_hdmi_init_commands(struct oxygen *chip,
37 struct xo 37 struct xonar_hdmi *hdmi)
38 { 38 {
39 u8 param; 39 u8 param;
40 40
41 oxygen_reset_uart(chip); 41 oxygen_reset_uart(chip);
42 param = 0; 42 param = 0;
43 hdmi_write_command(chip, 0x61, 1, &par 43 hdmi_write_command(chip, 0x61, 1, ¶m);
44 param = 1; 44 param = 1;
45 hdmi_write_command(chip, 0x74, 1, &par 45 hdmi_write_command(chip, 0x74, 1, ¶m);
46 hdmi_write_command(chip, 0x54, 5, hdmi 46 hdmi_write_command(chip, 0x54, 5, hdmi->params);
47 } 47 }
48 48
49 void xonar_hdmi_init(struct oxygen *chip, stru 49 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi)
50 { 50 {
51 hdmi->params[1] = IEC958_AES3_CON_FS_4 51 hdmi->params[1] = IEC958_AES3_CON_FS_48000;
52 hdmi->params[4] = 1; 52 hdmi->params[4] = 1;
53 xonar_hdmi_init_commands(chip, hdmi); 53 xonar_hdmi_init_commands(chip, hdmi);
54 } 54 }
55 55
56 void xonar_hdmi_cleanup(struct oxygen *chip) 56 void xonar_hdmi_cleanup(struct oxygen *chip)
57 { 57 {
58 u8 param = 0; 58 u8 param = 0;
59 59
60 hdmi_write_command(chip, 0x74, 1, &par 60 hdmi_write_command(chip, 0x74, 1, ¶m);
61 } 61 }
62 62
63 void xonar_hdmi_resume(struct oxygen *chip, st 63 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi)
64 { 64 {
65 xonar_hdmi_init_commands(chip, hdmi); 65 xonar_hdmi_init_commands(chip, hdmi);
66 } 66 }
67 67
68 void xonar_hdmi_pcm_hardware_filter(unsigned i 68 void xonar_hdmi_pcm_hardware_filter(unsigned int channel,
69 struct snd 69 struct snd_pcm_hardware *hardware)
70 { 70 {
71 if (channel == PCM_MULTICH) { 71 if (channel == PCM_MULTICH) {
72 hardware->rates = SNDRV_PCM_RA 72 hardware->rates = SNDRV_PCM_RATE_44100 |
73 SNDRV_PCM_RA 73 SNDRV_PCM_RATE_48000 |
74 SNDRV_PCM_RA 74 SNDRV_PCM_RATE_96000 |
75 SNDRV_PCM_RA 75 SNDRV_PCM_RATE_192000;
76 hardware->rate_min = 44100; 76 hardware->rate_min = 44100;
77 } 77 }
78 } 78 }
79 79
80 void xonar_set_hdmi_params(struct oxygen *chip 80 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
81 struct snd_pcm_hw_p 81 struct snd_pcm_hw_params *params)
82 { 82 {
83 hdmi->params[0] = 0; /* 1 = non-audio 83 hdmi->params[0] = 0; /* 1 = non-audio */
84 switch (params_rate(params)) { 84 switch (params_rate(params)) {
85 case 44100: 85 case 44100:
86 hdmi->params[1] = IEC958_AES3_ 86 hdmi->params[1] = IEC958_AES3_CON_FS_44100;
87 break; 87 break;
88 case 48000: 88 case 48000:
89 hdmi->params[1] = IEC958_AES3_ 89 hdmi->params[1] = IEC958_AES3_CON_FS_48000;
90 break; 90 break;
91 default: /* 96000 */ 91 default: /* 96000 */
92 hdmi->params[1] = IEC958_AES3_ 92 hdmi->params[1] = IEC958_AES3_CON_FS_96000;
93 break; 93 break;
94 case 192000: 94 case 192000:
95 hdmi->params[1] = IEC958_AES3_ 95 hdmi->params[1] = IEC958_AES3_CON_FS_192000;
96 break; 96 break;
97 } 97 }
98 hdmi->params[2] = params_channels(para 98 hdmi->params[2] = params_channels(params) / 2 - 1;
99 if (params_format(params) == SNDRV_PCM 99 if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE)
100 hdmi->params[3] = 0; 100 hdmi->params[3] = 0;
101 else 101 else
102 hdmi->params[3] = 0xc0; 102 hdmi->params[3] = 0xc0;
103 hdmi->params[4] = 1; /* ? */ 103 hdmi->params[4] = 1; /* ? */
104 hdmi_write_command(chip, 0x54, 5, hdmi 104 hdmi_write_command(chip, 0x54, 5, hdmi->params);
105 } 105 }
106 106
107 void xonar_hdmi_uart_input(struct oxygen *chip 107 void xonar_hdmi_uart_input(struct oxygen *chip)
108 { 108 {
109 if (chip->uart_input_count >= 2 && 109 if (chip->uart_input_count >= 2 &&
110 chip->uart_input[chip->uart_input_ 110 chip->uart_input[chip->uart_input_count - 2] == 'O' &&
111 chip->uart_input[chip->uart_input_ 111 chip->uart_input[chip->uart_input_count - 1] == 'K') {
112 dev_dbg(chip->card->dev, "mess 112 dev_dbg(chip->card->dev, "message from HDMI chip received:\n");
113 print_hex_dump_bytes("", DUMP_ 113 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
114 chip->uar 114 chip->uart_input, chip->uart_input_count);
115 chip->uart_input_count = 0; 115 chip->uart_input_count = 0;
116 } 116 }
117 } 117 }
118 118
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