1 /* SPDX-License-Identifier: GPL-2.0-or-later * <<
2 /* 1 /*
3 * File: sound/soc/codec/ad73311.h 2 * File: sound/soc/codec/ad73311.h
4 * Based on: 3 * Based on:
5 * Author: Cliff Cai <cliff.cai@analog.c 4 * Author: Cliff Cai <cliff.cai@analog.com>
6 * 5 *
7 * Created: Thur Sep 25, 2008 6 * Created: Thur Sep 25, 2008
8 * Description: definitions for AD73311 regis 7 * Description: definitions for AD73311 registers
9 * 8 *
>> 9 *
10 * Modified: 10 * Modified:
11 * Copyright 2006 Analog Devices 11 * Copyright 2006 Analog Devices Inc.
12 * 12 *
13 * Bugs: Enter bugs at http://blackfin 13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
>> 14 *
>> 15 * This program is free software; you can redistribute it and/or modify
>> 16 * it under the terms of the GNU General Public License as published by
>> 17 * the Free Software Foundation; either version 2 of the License, or
>> 18 * (at your option) any later version.
>> 19 *
>> 20 * This program is distributed in the hope that it will be useful,
>> 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 23 * GNU General Public License for more details.
>> 24 *
>> 25 * You should have received a copy of the GNU General Public License
>> 26 * along with this program; if not, see the file COPYING, or write
>> 27 * to the Free Software Foundation, Inc.,
>> 28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
14 */ 29 */
15 30
16 #ifndef __AD73311_H__ 31 #ifndef __AD73311_H__
17 #define __AD73311_H__ 32 #define __AD73311_H__
18 33
19 #define AD_CONTROL 0x8000 34 #define AD_CONTROL 0x8000
20 #define AD_DATA 0x0000 35 #define AD_DATA 0x0000
21 #define AD_READ 0x4000 36 #define AD_READ 0x4000
22 #define AD_WRITE 0x0000 37 #define AD_WRITE 0x0000
23 38
24 /* Control register A */ 39 /* Control register A */
25 #define CTRL_REG_A (0 << 8) 40 #define CTRL_REG_A (0 << 8)
26 41
27 #define REGA_MODE_PRO 0x00 42 #define REGA_MODE_PRO 0x00
28 #define REGA_MODE_DATA 0x01 43 #define REGA_MODE_DATA 0x01
29 #define REGA_MODE_MIXED 0x03 44 #define REGA_MODE_MIXED 0x03
30 #define REGA_DLB 0x04 45 #define REGA_DLB 0x04
31 #define REGA_SLB 0x08 46 #define REGA_SLB 0x08
32 #define REGA_DEVC(x) ((x & 0x7) << 47 #define REGA_DEVC(x) ((x & 0x7) << 4)
33 #define REGA_RESET 0x80 48 #define REGA_RESET 0x80
34 49
35 /* Control register B */ 50 /* Control register B */
36 #define CTRL_REG_B (1 << 8) 51 #define CTRL_REG_B (1 << 8)
37 52
38 #define REGB_DIRATE(x) (x & 0x3) 53 #define REGB_DIRATE(x) (x & 0x3)
39 #define REGB_SCDIV(x) ((x & 0x3) << 2) 54 #define REGB_SCDIV(x) ((x & 0x3) << 2)
40 #define REGB_MCDIV(x) ((x & 0x7) << 4) 55 #define REGB_MCDIV(x) ((x & 0x7) << 4)
41 #define REGB_CEE (1 << 7) 56 #define REGB_CEE (1 << 7)
42 57
43 /* Control register C */ 58 /* Control register C */
44 #define CTRL_REG_C (2 << 8) 59 #define CTRL_REG_C (2 << 8)
45 60
46 #define REGC_PUDEV (1 << 0) 61 #define REGC_PUDEV (1 << 0)
47 #define REGC_PUADC (1 << 3) 62 #define REGC_PUADC (1 << 3)
48 #define REGC_PUDAC (1 << 4) 63 #define REGC_PUDAC (1 << 4)
49 #define REGC_PUREF (1 << 5) 64 #define REGC_PUREF (1 << 5)
50 #define REGC_REFUSE (1 << 6) 65 #define REGC_REFUSE (1 << 6)
51 66
52 /* Control register D */ 67 /* Control register D */
53 #define CTRL_REG_D (3 << 8) 68 #define CTRL_REG_D (3 << 8)
54 69
55 #define REGD_IGS(x) (x & 0x7) 70 #define REGD_IGS(x) (x & 0x7)
56 #define REGD_RMOD (1 << 3) 71 #define REGD_RMOD (1 << 3)
57 #define REGD_OGS(x) ((x & 0x7) << 72 #define REGD_OGS(x) ((x & 0x7) << 4)
58 #define REGD_MUTE (1 << 7) 73 #define REGD_MUTE (1 << 7)
59 74
60 /* Control register E */ 75 /* Control register E */
61 #define CTRL_REG_E (4 << 8) 76 #define CTRL_REG_E (4 << 8)
62 77
63 #define REGE_DA(x) (x & 0x1f) 78 #define REGE_DA(x) (x & 0x1f)
64 #define REGE_IBYP (1 << 5) 79 #define REGE_IBYP (1 << 5)
65 80
66 /* Control register F */ 81 /* Control register F */
67 #define CTRL_REG_F (5 << 8) 82 #define CTRL_REG_F (5 << 8)
68 83
69 #define REGF_SEEN (1 << 5) 84 #define REGF_SEEN (1 << 5)
70 #define REGF_INV (1 << 6) 85 #define REGF_INV (1 << 6)
71 #define REGF_ALB (1 << 7) 86 #define REGF_ALB (1 << 7)
72 87
73 #endif 88 #endif
74 89
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