1 /* SPDX-License-Identifier: GPL-2.0 1 /* SPDX-License-Identifier: GPL-2.0 2 * 2 * 3 * Audio driver header for AK5558 3 * Audio driver header for AK5558 4 * 4 * 5 * Copyright (C) 2016 Asahi Kasei Microdevices 5 * Copyright (C) 2016 Asahi Kasei Microdevices Corporation 6 * Copyright 2018 NXP 6 * Copyright 2018 NXP 7 */ 7 */ 8 8 9 #ifndef _AK5558_H 9 #ifndef _AK5558_H 10 #define _AK5558_H 10 #define _AK5558_H 11 11 12 #define AK5558_00_POWER_MANAGEMENT1 0x00 12 #define AK5558_00_POWER_MANAGEMENT1 0x00 13 #define AK5558_01_POWER_MANAGEMENT2 0x01 13 #define AK5558_01_POWER_MANAGEMENT2 0x01 14 #define AK5558_02_CONTROL1 0x02 14 #define AK5558_02_CONTROL1 0x02 15 #define AK5558_03_CONTROL2 0x03 15 #define AK5558_03_CONTROL2 0x03 16 #define AK5558_04_CONTROL3 0x04 16 #define AK5558_04_CONTROL3 0x04 17 #define AK5558_05_DSD 0x05 17 #define AK5558_05_DSD 0x05 18 18 19 /* AK5558_02_CONTROL1 fields */ 19 /* AK5558_02_CONTROL1 fields */ 20 #define AK5558_DIF GENMAS 20 #define AK5558_DIF GENMASK(1, 1) 21 #define AK5558_DIF_MSB_MODE (0 << 21 #define AK5558_DIF_MSB_MODE (0 << 1) 22 #define AK5558_DIF_I2S_MODE (1 << 22 #define AK5558_DIF_I2S_MODE (1 << 1) 23 23 24 #define AK5558_BITS GENMAS 24 #define AK5558_BITS GENMASK(2, 2) 25 #define AK5558_DIF_24BIT_MODE (0 << 25 #define AK5558_DIF_24BIT_MODE (0 << 2) 26 #define AK5558_DIF_32BIT_MODE (1 << 26 #define AK5558_DIF_32BIT_MODE (1 << 2) 27 27 28 #define AK5558_CKS GENMAS 28 #define AK5558_CKS GENMASK(6, 3) 29 #define AK5558_CKS_128FS_192KHZ (0 << 29 #define AK5558_CKS_128FS_192KHZ (0 << 3) 30 #define AK5558_CKS_192FS_192KHZ (1 << 30 #define AK5558_CKS_192FS_192KHZ (1 << 3) 31 #define AK5558_CKS_256FS_48KHZ (2 << 31 #define AK5558_CKS_256FS_48KHZ (2 << 3) 32 #define AK5558_CKS_256FS_96KHZ (3 << 32 #define AK5558_CKS_256FS_96KHZ (3 << 3) 33 #define AK5558_CKS_384FS_96KHZ (4 << 33 #define AK5558_CKS_384FS_96KHZ (4 << 3) 34 #define AK5558_CKS_384FS_48KHZ (5 << 34 #define AK5558_CKS_384FS_48KHZ (5 << 3) 35 #define AK5558_CKS_512FS_48KHZ (6 << 35 #define AK5558_CKS_512FS_48KHZ (6 << 3) 36 #define AK5558_CKS_768FS_48KHZ (7 << 36 #define AK5558_CKS_768FS_48KHZ (7 << 3) 37 #define AK5558_CKS_64FS_384KHZ (8 << 37 #define AK5558_CKS_64FS_384KHZ (8 << 3) 38 #define AK5558_CKS_32FS_768KHZ (9 << 38 #define AK5558_CKS_32FS_768KHZ (9 << 3) 39 #define AK5558_CKS_96FS_384KHZ (10 << 39 #define AK5558_CKS_96FS_384KHZ (10 << 3) 40 #define AK5558_CKS_48FS_768KHZ (11 << 40 #define AK5558_CKS_48FS_768KHZ (11 << 3) 41 #define AK5558_CKS_64FS_768KHZ (12 << 41 #define AK5558_CKS_64FS_768KHZ (12 << 3) 42 #define AK5558_CKS_1024FS_16KHZ (13 << 42 #define AK5558_CKS_1024FS_16KHZ (13 << 3) 43 #define AK5558_CKS_AUTO (15 << 43 #define AK5558_CKS_AUTO (15 << 3) 44 44 45 /* AK5558_03_CONTROL2 fields */ 45 /* AK5558_03_CONTROL2 fields */ 46 #define AK5558_MODE_BITS GENMASK(6, 5) 46 #define AK5558_MODE_BITS GENMASK(6, 5) 47 #define AK5558_MODE_NORMAL (0 << 5) 47 #define AK5558_MODE_NORMAL (0 << 5) 48 #define AK5558_MODE_TDM128 (1 << 5) 48 #define AK5558_MODE_TDM128 (1 << 5) 49 #define AK5558_MODE_TDM256 (2 << 5) 49 #define AK5558_MODE_TDM256 (2 << 5) 50 #define AK5558_MODE_TDM512 (3 << 5) 50 #define AK5558_MODE_TDM512 (3 << 5) 51 51 52 #endif 52 #endif 53 53
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