1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 2 /* 3 * max98095.h -- MAX98095 ALSA SoC Audio drive 4 * 5 * Copyright 2011 Maxim Integrated Products 6 */ 7 8 #ifndef _MAX98095_H 9 #define _MAX98095_H 10 11 /* 12 * MAX98095 Registers Definition 13 */ 14 15 #define M98095_000_HOST_DATA 0x 16 #define M98095_001_HOST_INT_STS 0x 17 #define M98095_002_HOST_RSP_STS 0x 18 #define M98095_003_HOST_CMD_STS 0x 19 #define M98095_004_CODEC_STS 0x 20 #define M98095_005_DAI1_ALC_STS 0x 21 #define M98095_006_DAI2_ALC_STS 0x 22 #define M98095_007_JACK_AUTO_STS 0x 23 #define M98095_008_JACK_MANUAL_STS 0x 24 #define M98095_009_JACK_VBAT_STS 0x 25 #define M98095_00A_ACC_ADC_STS 0x 26 #define M98095_00B_MIC_NG_AGC_STS 0x 27 #define M98095_00C_SPK_L_VOLT_STS 0x 28 #define M98095_00D_SPK_R_VOLT_STS 0x 29 #define M98095_00E_TEMP_SENSOR_STS 0x 30 #define M98095_00F_HOST_CFG 0x 31 #define M98095_010_HOST_INT_CFG 0x 32 #define M98095_011_HOST_INT_EN 0x 33 #define M98095_012_CODEC_INT_EN 0x 34 #define M98095_013_JACK_INT_EN 0x 35 #define M98095_014_JACK_INT_EN 0x 36 #define M98095_015_DEC 0x 37 #define M98095_016_RESERVED 0x 38 #define M98095_017_RESERVED 0x 39 #define M98095_018_KEYCODE3 0x 40 #define M98095_019_KEYCODE2 0x 41 #define M98095_01A_KEYCODE1 0x 42 #define M98095_01B_KEYCODE0 0x 43 #define M98095_01C_OEMCODE1 0x 44 #define M98095_01D_OEMCODE0 0x 45 #define M98095_01E_XCFG1 0x 46 #define M98095_01F_XCFG2 0x 47 #define M98095_020_XCFG3 0x 48 #define M98095_021_XCFG4 0x 49 #define M98095_022_XCFG5 0x 50 #define M98095_023_XCFG6 0x 51 #define M98095_024_XGPIO 0x 52 #define M98095_025_XCLKCFG 0x 53 #define M98095_026_SYS_CLK 0x 54 #define M98095_027_DAI1_CLKMODE 0x 55 #define M98095_028_DAI1_CLKCFG_HI 0x 56 #define M98095_029_DAI1_CLKCFG_LO 0x 57 #define M98095_02A_DAI1_FORMAT 0x 58 #define M98095_02B_DAI1_CLOCK 0x 59 #define M98095_02C_DAI1_IOCFG 0x 60 #define M98095_02D_DAI1_TDM 0x 61 #define M98095_02E_DAI1_FILTERS 0x 62 #define M98095_02F_DAI1_LVL1 0x 63 #define M98095_030_DAI1_LVL2 0x 64 #define M98095_031_DAI2_CLKMODE 0x 65 #define M98095_032_DAI2_CLKCFG_HI 0x 66 #define M98095_033_DAI2_CLKCFG_LO 0x 67 #define M98095_034_DAI2_FORMAT 0x 68 #define M98095_035_DAI2_CLOCK 0x 69 #define M98095_036_DAI2_IOCFG 0x 70 #define M98095_037_DAI2_TDM 0x 71 #define M98095_038_DAI2_FILTERS 0x 72 #define M98095_039_DAI2_LVL1 0x 73 #define M98095_03A_DAI2_LVL2 0x 74 #define M98095_03B_DAI3_CLKMODE 0x 75 #define M98095_03C_DAI3_CLKCFG_HI 0x 76 #define M98095_03D_DAI3_CLKCFG_LO 0x 77 #define M98095_03E_DAI3_FORMAT 0x 78 #define M98095_03F_DAI3_CLOCK 0x 79 #define M98095_040_DAI3_IOCFG 0x 80 #define M98095_041_DAI3_TDM 0x 81 #define M98095_042_DAI3_FILTERS 0x 82 #define M98095_043_DAI3_LVL1 0x 83 #define M98095_044_DAI3_LVL2 0x 84 #define M98095_045_CFG_DSP 0x 85 #define M98095_046_DAC_CTRL1 0x 86 #define M98095_047_DAC_CTRL2 0x 87 #define M98095_048_MIX_DAC_LR 0x 88 #define M98095_049_MIX_DAC_M 0x 89 #define M98095_04A_MIX_ADC_LEFT 0x 90 #define M98095_04B_MIX_ADC_RIGHT 0x 91 #define M98095_04C_MIX_HP_LEFT 0x 92 #define M98095_04D_MIX_HP_RIGHT 0x 93 #define M98095_04E_CFG_HP 0x 94 #define M98095_04F_MIX_RCV 0x 95 #define M98095_050_MIX_SPK_LEFT 0x 96 #define M98095_051_MIX_SPK_RIGHT 0x 97 #define M98095_052_MIX_SPK_CFG 0x 98 #define M98095_053_MIX_LINEOUT1 0x 99 #define M98095_054_MIX_LINEOUT2 0x 100 #define M98095_055_MIX_LINEOUT_CFG 0x 101 #define M98095_056_LVL_SIDETONE_DAI12 0x 102 #define M98095_057_LVL_SIDETONE_DAI3 0x 103 #define M98095_058_LVL_DAI1_PLAY 0x 104 #define M98095_059_LVL_DAI1_EQ 0x 105 #define M98095_05A_LVL_DAI2_PLAY 0x 106 #define M98095_05B_LVL_DAI2_EQ 0x 107 #define M98095_05C_LVL_DAI3_PLAY 0x 108 #define M98095_05D_LVL_ADC_L 0x 109 #define M98095_05E_LVL_ADC_R 0x 110 #define M98095_05F_LVL_MIC1 0x 111 #define M98095_060_LVL_MIC2 0x 112 #define M98095_061_LVL_LINEIN 0x 113 #define M98095_062_LVL_LINEOUT1 0x 114 #define M98095_063_LVL_LINEOUT2 0x 115 #define M98095_064_LVL_HP_L 0x 116 #define M98095_065_LVL_HP_R 0x 117 #define M98095_066_LVL_RCV 0x 118 #define M98095_067_LVL_SPK_L 0x 119 #define M98095_068_LVL_SPK_R 0x 120 #define M98095_069_MICAGC_CFG 0x 121 #define M98095_06A_MICAGC_THRESH 0x 122 #define M98095_06B_SPK_NOISEGATE 0x 123 #define M98095_06C_DAI1_ALC1_TIME 0x 124 #define M98095_06D_DAI1_ALC1_COMP 0x 125 #define M98095_06E_DAI1_ALC1_EXPN 0x 126 #define M98095_06F_DAI1_ALC1_GAIN 0x 127 #define M98095_070_DAI1_ALC2_TIME 0x 128 #define M98095_071_DAI1_ALC2_COMP 0x 129 #define M98095_072_DAI1_ALC2_EXPN 0x 130 #define M98095_073_DAI1_ALC2_GAIN 0x 131 #define M98095_074_DAI1_ALC3_TIME 0x 132 #define M98095_075_DAI1_ALC3_COMP 0x 133 #define M98095_076_DAI1_ALC3_EXPN 0x 134 #define M98095_077_DAI1_ALC3_GAIN 0x 135 #define M98095_078_DAI2_ALC1_TIME 0x 136 #define M98095_079_DAI2_ALC1_COMP 0x 137 #define M98095_07A_DAI2_ALC1_EXPN 0x 138 #define M98095_07B_DAI2_ALC1_GAIN 0x 139 #define M98095_07C_DAI2_ALC2_TIME 0x 140 #define M98095_07D_DAI2_ALC2_COMP 0x 141 #define M98095_07E_DAI2_ALC2_EXPN 0x 142 #define M98095_07F_DAI2_ALC2_GAIN 0x 143 #define M98095_080_DAI2_ALC3_TIME 0x 144 #define M98095_081_DAI2_ALC3_COMP 0x 145 #define M98095_082_DAI2_ALC3_EXPN 0x 146 #define M98095_083_DAI2_ALC3_GAIN 0x 147 #define M98095_084_HP_NOISE_GATE 0x 148 #define M98095_085_AUX_ADC 0x 149 #define M98095_086_CFG_LINE 0x 150 #define M98095_087_CFG_MIC 0x 151 #define M98095_088_CFG_LEVEL 0x 152 #define M98095_089_JACK_DET_AUTO 0x 153 #define M98095_08A_JACK_DET_MANUAL 0x 154 #define M98095_08B_JACK_KEYSCAN_DBC 0x 155 #define M98095_08C_JACK_KEYSCAN_DLY 0x 156 #define M98095_08D_JACK_KEY_THRESH 0x 157 #define M98095_08E_JACK_DC_SLEW 0x 158 #define M98095_08F_JACK_TEST_CFG 0x 159 #define M98095_090_PWR_EN_IN 0x 160 #define M98095_091_PWR_EN_OUT 0x 161 #define M98095_092_PWR_EN_OUT 0x 162 #define M98095_093_BIAS_CTRL 0x 163 #define M98095_094_PWR_DAC_21 0x 164 #define M98095_095_PWR_DAC_03 0x 165 #define M98095_096_PWR_DAC_CK 0x 166 #define M98095_097_PWR_SYS 0x 167 168 #define M98095_0FF_REV_ID 0x 169 170 #define M98095_REG_CNT (0 171 #define M98095_REG_MAX_CACHED 0X 172 173 /* MAX98095 Registers Bit Fields */ 174 175 /* M98095_007_JACK_AUTO_STS */ 176 #define M98095_MIC_IN 177 #define M98095_LO_IN 178 #define M98095_HP_IN 179 #define M98095_DDONE 180 181 /* M98095_00F_HOST_CFG */ 182 #define M98095_SEG 183 #define M98095_XTEN 184 #define M98095_MDLLEN 185 186 /* M98095_013_JACK_INT_EN */ 187 #define M98095_IMIC_IN 188 #define M98095_ILO_IN 189 #define M98095_IHP_IN 190 #define M98095_IDDONE 191 192 /* M98095_027_DAI1_CLKMODE, M98095_031_DAI2_CL 193 #define M98095_CLKMODE_MASK 194 195 /* M98095_02A_DAI1_FORMAT, M98095_034_DAI2_FOR 196 #define M98095_DAI_MAS 197 #define M98095_DAI_WCI 198 #define M98095_DAI_BCI 199 #define M98095_DAI_DLY 200 #define M98095_DAI_TDM 201 #define M98095_DAI_FSW 202 #define M98095_DAI_WS 203 204 /* M98095_02B_DAI1_CLOCK, M98095_035_DAI2_CLOC 205 #define M98095_DAI_BSEL64 206 #define M98095_DAI_DOSR_DIV2 207 #define M98095_DAI_DOSR_DIV4 208 209 /* M98095_02C_DAI1_IOCFG, M98095_036_DAI2_IOCF 210 #define M98095_S1NORMAL 211 #define M98095_S2NORMAL 212 #define M98095_S3NORMAL 213 #define M98095_SDATA 214 215 /* M98095_02E_DAI1_FILTERS, M98095_038_DAI2_FI 216 #define M98095_DAI_DHF 217 218 /* M98095_045_DSP_CFG */ 219 #define M98095_DSPNORMAL 220 221 /* M98095_048_MIX_DAC_LR */ 222 #define M98095_DAI1L_TO_DACR 223 #define M98095_DAI1R_TO_DACR 224 #define M98095_DAI2M_TO_DACR 225 #define M98095_DAI1L_TO_DACL 226 #define M98095_DAI1R_TO_DACL 227 #define M98095_DAI2M_TO_DACL 228 #define M98095_DAI3M_TO_DACL 229 230 /* M98095_049_MIX_DAC_M */ 231 #define M98095_DAI1L_TO_DACM 232 #define M98095_DAI1R_TO_DACM 233 #define M98095_DAI2M_TO_DACM 234 #define M98095_DAI3M_TO_DACM 235 236 /* M98095_04E_MIX_HP_CFG */ 237 #define M98095_HPNORMAL 238 239 /* M98095_05F_LVL_MIC1, M98095_060_LVL_MIC2 */ 240 #define M98095_MICPRE_MASK 241 #define M98095_MICPRE_SHIFT 242 243 /* M98095_064_LVL_HP_L, M98095_065_LVL_HP_R */ 244 #define M98095_HP_MUTE 245 246 /* M98095_066_LVL_RCV */ 247 #define M98095_REC_MUTE 248 249 /* M98095_067_LVL_SPK_L, M98095_068_LVL_SPK_R 250 #define M98095_SP_MUTE 251 252 /* M98095_087_CFG_MIC */ 253 #define M98095_MICSEL_MASK 254 #define M98095_DIGMIC_L 255 #define M98095_DIGMIC_R 256 #define M98095_DIGMIC2L 257 #define M98095_DIGMIC2R 258 259 /* M98095_088_CFG_LEVEL */ 260 #define M98095_VSEN 261 #define M98095_ZDEN 262 #define M98095_BQ2EN 263 #define M98095_BQ1EN 264 #define M98095_EQ2EN 265 #define M98095_EQ1EN 266 267 /* M98095_089_JACK_DET_AUTO */ 268 #define M98095_PIN5EN 269 #define M98095_JDEN 270 271 /* M98095_090_PWR_EN_IN */ 272 #define M98095_INEN 273 #define M98095_MB2EN 274 #define M98095_MB1EN 275 #define M98095_MBEN 276 #define M98095_ADREN 277 #define M98095_ADLEN 278 279 /* M98095_091_PWR_EN_OUT */ 280 #define M98095_HPLEN 281 #define M98095_HPREN 282 #define M98095_SPLEN 283 #define M98095_SPREN 284 #define M98095_RECEN 285 #define M98095_DALEN 286 #define M98095_DAREN 287 288 /* M98095_092_PWR_EN_OUT */ 289 #define M98095_SPK_FIXEDSPECTRUM 290 #define M98095_SPK_SPREADSPECTRUM 291 292 /* M98095_097_PWR_SYS */ 293 #define M98095_SHDNRUN 294 #define M98095_PERFMODE 295 #define M98095_HPPLYBACK 296 #define M98095_PWRSV8K 297 #define M98095_PWRSV 298 299 #define M98095_COEFS_PER_BAND 5 300 301 #define M98095_BYTE1(w) ((w >> 8) & 0xff) 302 #define M98095_BYTE0(w) (w & 0xff) 303 304 /* Equalizer filter coefficients */ 305 #define M98095_110_DAI1_EQ_BASE 0x 306 #define M98095_142_DAI2_EQ_BASE 0x 307 308 /* Biquad filter coefficients */ 309 #define M98095_174_DAI1_BQ_BASE 0x 310 #define M98095_17E_DAI2_BQ_BASE 0x 311 312 /* Default Delay used in Slew Rate Calculation 313 #define M98095_DEFAULT_SLEW_DELAY 314 315 extern int max98095_jack_detect(struct snd_soc 316 struct snd_soc_jack *hp_jack, struct s 317 318 #endif 319
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.