1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 /*
3 * mt6357.h -- mt6357 ALSA SoC audio codec d
4 *
5 * Copyright (c) 2024 Baylibre
6 * Author: Nicolas Belin <nbelin@baylibre.com>
7 */
8
9 #ifndef __MT6357_H__
10 #define __MT6357_H__
11
12 #include <linux/types.h>
13
14 /* Reg bit defines */
15 /* MT6357_GPIO_DIR0 */
16 #define MT6357_GPIO8_DIR_MASK
17 #define MT6357_GPIO8_DIR_INPUT
18 #define MT6357_GPIO8_DIR_OUTPUT
19 #define MT6357_GPIO9_DIR_MASK
20 #define MT6357_GPIO9_DIR_INPUT
21 #define MT6357_GPIO9_DIR_OUTPUT
22 #define MT6357_GPIO10_DIR_MASK
23 #define MT6357_GPIO10_DIR_INPUT
24 #define MT6357_GPIO10_DIR_OUTPUT
25 #define MT6357_GPIO11_DIR_MASK
26 #define MT6357_GPIO11_DIR_INPUT
27 #define MT6357_GPIO11_DIR_OUTPUT
28 #define MT6357_GPIO12_DIR_MASK
29 #define MT6357_GPIO12_DIR_INPUT
30 #define MT6357_GPIO12_DIR_OUTPUT
31 #define MT6357_GPIO13_DIR_MASK
32 #define MT6357_GPIO13_DIR_INPUT
33 #define MT6357_GPIO13_DIR_OUTPUT
34 #define MT6357_GPIO14_DIR_MASK
35 #define MT6357_GPIO14_DIR_INPUT
36 #define MT6357_GPIO14_DIR_OUTPUT
37 #define MT6357_GPIO15_DIR_MASK
38 #define MT6357_GPIO15_DIR_INPUT
39 #define MT6357_GPIO15_DIR_OUTPUT
40
41 /* MT6357_GPIO_MODE2 */
42 #define MT6357_GPIO8_MODE_MASK
43 #define MT6357_GPIO8_MODE_AUD_CLK_MOSI
44 #define MT6357_GPIO8_MODE_GPIO
45 #define MT6357_GPIO9_MODE_MASK
46 #define MT6357_GPIO9_MODE_AUD_DAT_MOSI0
47 #define MT6357_GPIO9_MODE_GPIO
48 #define MT6357_GPIO10_MODE_MASK
49 #define MT6357_GPIO10_MODE_AUD_DAT_MOSI1
50 #define MT6357_GPIO10_MODE_GPIO
51 #define MT6357_GPIO11_MODE_MASK
52 #define MT6357_GPIO11_MODE_AUD_SYNC_MOSI
53 #define MT6357_GPIO11_MODE_GPIO
54
55 /* MT6357_GPIO_MODE2_SET */
56 #define MT6357_GPIO8_MODE_SET_MASK
57 #define MT6357_GPIO8_MODE_SET_AUD_CLK_MOSI
58 #define MT6357_GPIO9_MODE_SET_MASK
59 #define MT6357_GPIO9_MODE_SET_AUD_DAT_MOSI0
60 #define MT6357_GPIO10_MODE_SET_MASK
61 #define MT6357_GPIO10_MODE_SET_AUD_DAT_MOSI1
62 #define MT6357_GPIO11_MODE_SET_MASK
63 #define MT6357_GPIO11_MODE_SET_AUD_SYNC_MOSI
64
65 /* MT6357_GPIO_MODE2_CLR */
66 #define MT6357_GPIO_MODE2_CLEAR_ALL
67
68 /* MT6357_GPIO_MODE3 */
69 #define MT6357_GPIO12_MODE_MASK
70 #define MT6357_GPIO12_MODE_AUD_CLK_MISO
71 #define MT6357_GPIO12_MODE_GPIO
72 #define MT6357_GPIO13_MODE_MASK
73 #define MT6357_GPIO13_MODE_AUD_DAT_MISO0
74 #define MT6357_GPIO13_MODE_GPIO
75 #define MT6357_GPIO14_MODE_MASK
76 #define MT6357_GPIO14_MODE_AUD_DAT_MISO1
77 #define MT6357_GPIO14_MODE_GPIO
78 #define MT6357_GPIO15_MODE_MASK
79 #define MT6357_GPIO15_MODE_AUD_SYNC_MISO
80 #define MT6357_GPIO15_MODE_GPIO
81
82 /* MT6357_GPIO_MODE3_SET */
83 #define MT6357_GPIO12_MODE_SET_MASK
84 #define MT6357_GPIO12_MODE_SET_AUD_CLK_MISO
85 #define MT6357_GPIO13_MODE_SET_MASK
86 #define MT6357_GPIO13_MODE_SET_AUD_DAT_MISO0
87 #define MT6357_GPIO14_MODE_SET_MASK
88 #define MT6357_GPIO14_MODE_SET_AUD_DAT_MISO1
89 #define MT6357_GPIO15_MODE_SET_MASK
90 #define MT6357_GPIO15_MODE_SET_AUD_SYNC_MISO
91
92 /* MT6357_GPIO_MODE3_CLR */
93 #define MT6357_GPIO_MODE3_CLEAR_ALL
94
95 /* MT6357_DCXO_CW14 */
96 #define MT6357_XO_AUDIO_EN_M_SFT
97 #define MT6357_XO_AUDIO_EN_M_MASK
98 #define MT6357_XO_AUDIO_EN_M_ENABLE
99 #define MT6357_XO_AUDIO_EN_M_DISABLE
100
101 /* MT6357_AUD_TOP_CKPDN_CON0 */
102 #define MT6357_AUDNCP_CK_PDN_SFT
103 #define MT6357_ZCD13M_CK_PDN_SFT
104 #define MT6357_AUDIF_CK_PDN_SFT
105 #define MT6357_AUD_CK_PDN_SFT
106
107 /* MT6357_AUDNCP_CLKDIV_CON0 */
108 #define MT6357_DIVCKS_CHG
109
110 /* MT6357_AUDNCP_CLKDIV_CON1 */
111 #define MT6357_DIVCKS_ON
112
113 /* MT6357_AUDNCP_CLKDIV_CON3 */
114 #define MT6357_DIVCKS_PWD_NCP_MASK
115 #define MT6357_DIVCKS_PWD_NCP_DISABLE
116 #define MT6357_DIVCKS_PWD_NCP_ENABLE
117
118 /* MT6357_AUDNCP_CLKDIV_CON4 */
119 #define MT6357_DIVCKS_PWD_NCP_ST_SEL_MASK
120 #define MT6357_DIVCKS_PWD_NCP_ST_50US
121 #define MT6357_DIVCKS_PWD_NCP_ST_100US
122 #define MT6357_DIVCKS_PWD_NCP_ST_150US
123 #define MT6357_DIVCKS_PWD_NCP_ST_200US
124
125 /* MT6357_AFE_UL_DL_CON0 */
126 #define MT6357_AFE_UL_LR_SWAP_SFT
127 #define MT6357_AFE_ON_SFT
128
129 /* MT6357_AFE_DL_SRC2_CON0_L */
130 #define MT6357_DL_2_SRC_ON_TMP_CTL_PRE_SFT
131
132 /* MT6357_AFE_UL_SRC_CON0_H */
133 #define MT6357_C_TWO_DIGITAL_MIC_CTL_MASK
134 #define MT6357_C_TWO_DIGITAL_MIC_ENABLE
135 #define MT6357_C_TWO_DIGITAL_MIC_DISABLE
136
137 /* MT6357_AFE_UL_SRC_CON0_L */
138 #define MT6357_UL_SDM_3_LEVEL_CTL_MASK
139 #define MT6357_UL_SDM_3_LEVEL_SELECT
140 #define MT6357_UL_SDM_3_LEVEL_DESELECT
141 #define MT6357_UL_SRC_ON_TMP_CTL_MASK
142 #define MT6357_UL_SRC_ENABLE
143 #define MT6357_UL_SRC_DISABLE
144
145 /* MT6357_AFE_TOP_CON0 */
146 #define MT6357_UL_SINE_ON_SFT
147 #define MT6357_UL_SINE_ON_MASK
148 #define MT6357_DL_SINE_ON_SFT
149 #define MT6357_DL_SINE_ON_MASK
150
151 /* MT6357_AUDIO_TOP_CON0 */
152 #define MT6357_PDN_LPBK_CTL_SFT
153 #define MT6357_PDN_AFE_CTL_SFT
154 #define MT6357_PDN_DAC_CTL_SFT
155 #define MT6357_PDN_ADC_CTL_SFT
156 #define MT6357_PDN_I2S_DL_CTL_SFT
157 #define MT6357_PWR_CLK_DIS_CTL_SFT
158 #define MT6357_PDN_AFE_TESTMODEL_CTL_SFT
159 #define MT6357_PDN_RESERVED_SFT
160
161 /* MT6357_AFUNC_AUD_CON0 */
162 #define MT6357_CCI_AUD_ANACK_INVERT
163 #define MT6357_CCI_AUD_ANACK_NORMAL
164 #define MT6357_CCI_AUDIO_FIFO_WPTR_SFT
165 #define MT6357_CCI_SCRAMBLER_CG_ENABLE
166 #define MT6357_CCI_SCRAMBLER_CG_DISABLE
167 #define MT6357_CCI_LCK_INV_OUT_OF_PHASE
168 #define MT6357_CCI_LCK_INV_IN_PHASE
169 #define MT6357_CCI_RAND_ENABLE
170 #define MT6357_CCI_RAND_DISABLE
171 #define MT6357_CCI_SPLT_SCRMB_CLK_ON
172 #define MT6357_CCI_SPLT_SCRMB_CLK_OFF
173 #define MT6357_CCI_SPLT_SCRMB_ON
174 #define MT6357_CCI_SPLT_SCRMB_OFF
175 #define MT6357_CCI_AUD_IDAC_TEST_EN_FROM_TEST_
176 #define MT6357_CCI_AUD_IDAC_TEST_EN_NORMAL_PAT
177 #define MT6357_CCI_ZERO_PADDING_DISABLE
178 #define MT6357_CCI_ZERO_PADDING_ENABLE
179 #define MT6357_CCI_AUD_SPLIT_TEST_EN_FROM_TEST
180 #define MT6357_CCI_AUD_SPLIT_TEST_EN_NORMAL_PA
181 #define MT6357_CCI_AUD_SDM_MUTE_L_REG_CTL
182 #define MT6357_CCI_AUD_SDM_MUTE_L_NO_CTL
183 #define MT6357_CCI_AUD_SDM_MUTE_R_REG_CTL
184 #define MT6357_CCI_AUD_SDM_MUTE_R_NO_CTL
185 #define MT6357_CCI_AUD_SDM_7BIT_FROM_SPLITTER3
186 #define MT6357_CCI_AUD_SDM_7BIT_FROM_SPLITTER1
187 #define MT6357_CCI_SCRAMBLER_ENABLE
188 #define MT6357_CCI_SCRAMBLER_DISABLE
189
190 /* MT6357_AFUNC_AUD_CON2 */
191 #define MT6357_CCI_AUDIO_FIFO_ENABLE
192 #define MT6357_CCI_AUDIO_FIFO_DISABLE
193 #define MT6357_CCI_ACD_MODE_NORMAL_PATH
194 #define MT6357_CCI_ACD_MODE_TEST_PATH
195 #define MT6357_CCI_AFIFO_CLK_PWDB_ON
196 #define MT6357_CCI_AFIFO_CLK_PWDB_DOWN
197 #define MT6357_CCI_ACD_FUNC_RSTB_RELEASE
198 #define MT6357_CCI_ACD_FUNC_RSTB_RESET
199
200 /* MT6357_AFE_ADDA_MTKAIF_CFG0 */
201 #define MT6357_ADDA_MTKAIF_LPBK_CTL_MASK
202 #define MT6357_ADDA_MTKAIF_LPBK_ENABLE
203 #define MT6357_ADDA_MTKAIF_LPBK_DISABLE
204
205 /* MT6357_AFE_SGEN_CFG0 */
206 #define MT6357_SGEN_DAC_EN_CTL_SFT
207 #define MT6357_SGEN_DAC_ENABLE
208 #define MT6357_SGEN_MUTE_SW_CTL_SFT
209 #define MT6357_SGEN_MUTE_SW_DISABLE
210
211 /* MT6357_AFE_DCCLK_CFG0 */
212 #define MT6357_DCCLK_DIV_MASK
213 #define MT6357_DCCLK_DIV_SFT
214 #define MT6357_DCCLK_DIV_RUN_VALUE
215 #define MT6357_DCCLK_DIV_STOP_VALUE
216 #define MT6357_DCCLK_PDN_MASK
217 #define MT6357_DCCLK_PDN
218 #define MT6357_DCCLK_OUTPUT
219 #define MT6357_DCCLK_GEN_ON_MASK
220 #define MT6357_DCCLK_GEN_ON
221 #define MT6357_DCCLK_GEN_OFF
222
223 /* MT6357_AFE_DCCLK_CFG1 */
224 #define MT6357_DCCLK_RESYNC_BYPASS_MASK
225 #define MT6357_DCCLK_RESYNC_BYPASS
226
227 /* MT6357_AFE_AUD_PAD_TOP */
228 #define MT6357_AUD_PAD_TX_FIFO_NORMAL_PATH_MAS
229 #define MT6357_AUD_PAD_TX_FIFO_NORMAL_PATH_ENA
230 #define MT6357_AUD_PAD_TX_FIFO_NORMAL_PATH_DIS
231 #define MT6357_AUD_PAD_TX_FIFO_LPBK_MASK
232 #define MT6357_AUD_PAD_TX_FIFO_LPBK_ENABLE
233 #define MT6357_AUD_PAD_TX_FIFO_LPBK_DISABLE
234
235 /* MT6357_AUDENC_ANA_CON0 */
236 #define MT6357_AUDADCLINPUTSEL_MASK
237 #define MT6357_AUDADCLINPUTSEL_PREAMPLIFIER
238 #define MT6357_AUDADCLINPUTSEL_IDLE
239 #define MT6357_AUDADCLPWRUP_SFT
240 #define MT6357_AUDADCLPWRUP_MASK
241 #define MT6357_AUDADCLPWRUP
242 #define MT6357_AUDADCLPWRDOWN
243 #define MT6357_AUDPREAMPLGAIN_SFT
244 #define MT6357_AUDPREAMPLGAIN_MASK
245 #define MT6357_AUDPREAMPLGAIN_MAX
246 #define MT6357_AUDPREAMPLINPUTSEL_SFT
247 #define MT6357_AUDPREAMPLINPUTSEL_MASK_NOSFT
248 #define MT6357_AUDPREAMPLDCPRECHARGE_MASK
249 #define MT6357_AUDPREAMPLDCPRECHARGE_ENABLE
250 #define MT6357_AUDPREAMPLDCPRECHARGE_DISABLE
251 #define MT6357_AUDPREAMPLDCCEN_MASK
252 #define MT6357_AUDPREAMPLDCCEN_DC
253 #define MT6357_AUDPREAMPLDCCEN_AC
254 #define MT6357_AUDPREAMPLON_MASK
255 #define MT6357_AUDPREAMPLON_ENABLE
256 #define MT6357_AUDPREAMPLON_DISABLE
257
258 /* MT6357_AUDENC_ANA_CON1 */
259 #define MT6357_AUDADCRINPUTSEL_MASK
260 #define MT6357_AUDADCRINPUTSEL_PREAMPLIFIER
261 #define MT6357_AUDADCRINPUTSEL_IDLE
262 #define MT6357_AUDADCRPWRUP_SFT
263 #define MT6357_AUDADCRPWRUP_MASK
264 #define MT6357_AUDADCRPWRUP
265 #define MT6357_AUDADCRPWRDOWN
266 #define MT6357_AUDPREAMPRGAIN_SFT
267 #define MT6357_AUDPREAMPRGAIN_MASK
268 #define MT6357_AUDPREAMPRGAIN_MAX
269 #define MT6357_AUDPREAMPRINPUTSEL_SFT
270 #define MT6357_AUDPREAMPRINPUTSEL_MASK_NOSFT
271 #define MT6357_AUDPREAMPRDCPRECHARGE_MASK
272 #define MT6357_AUDPREAMPRDCPRECHARGE_ENABLE
273 #define MT6357_AUDPREAMPRDCPRECHARGE_DISABLE
274 #define MT6357_AUDPREAMPRDCCEN_MASK
275 #define MT6357_AUDPREAMPRDCCEN_DC
276 #define MT6357_AUDPREAMPRDCCEN_AC
277 #define MT6357_AUDPREAMPRON_MASK
278 #define MT6357_AUDPREAMPRON_ENABLE
279 #define MT6357_AUDPREAMPRON_DISABLE
280
281 /* MT6357_AUDENC_ANA_CON6 */
282 #define MT6357_CLKSQ_EN_SFT
283
284 /* MT6357_AUDENC_ANA_CON7 */
285 #define MT6357_AUDDIGMICBIAS_MASK
286 #define MT6357_AUDDIGMICBIAS_DEFAULT_VALUE
287 #define MT6357_AUDDIGMICBIAS_OFF
288 #define MT6357_AUDDIGMICEN_MASK
289 #define MT6357_AUDDIGMICEN_ENABLE
290 #define MT6357_AUDDIGMICEN_DISABLE
291
292 /* MT6357_AUDENC_ANA_CON8 */
293 #define MT6357_AUD_MICBIAS0_DCSW2N_EN_MASK
294 #define MT6357_AUD_MICBIAS0_DCSW2N_ENABLE
295 #define MT6357_AUD_MICBIAS0_DCSW2N_DISABLE
296 #define MT6357_AUD_MICBIAS0_DCSW2P2_EN_MASK
297 #define MT6357_AUD_MICBIAS0_DCSW2P2_ENABLE
298 #define MT6357_AUD_MICBIAS0_DCSW2P2_DISABLE
299 #define MT6357_AUD_MICBIAS0_DCSW2P1_EN_MASK
300 #define MT6357_AUD_MICBIAS0_DCSW2P1_ENABLE
301 #define MT6357_AUD_MICBIAS0_DCSW2P1_DISABLE
302 #define MT6357_AUD_MICBIAS0_DCSW0N_EN_MASK
303 #define MT6357_AUD_MICBIAS0_DCSW0N_ENABLE
304 #define MT6357_AUD_MICBIAS0_DCSWN_DISABLE
305 #define MT6357_AUD_MICBIAS0_DCSW0P2_EN_MASK
306 #define MT6357_AUD_MICBIAS0_DCSW0P2_ENABLE
307 #define MT6357_AUD_MICBIAS0_DCSW0P2_DISABLE
308 #define MT6357_AUD_MICBIAS0_DCSW0P1_EN_MASK
309 #define MT6357_AUD_MICBIAS0_DCSW0P1_ENABLE
310 #define MT6357_AUD_MICBIAS0_DCSW0P1_DISABLE
311 #define MT6357_AUD_MICBIAS0_VREF_MASK
312 #define MT6357_AUD_MICBIAS0_VREF_SFT
313 #define MT6357_AUD_MICBIAS0_PWD_SFT
314
315 #define MT6357_AUD_MICBIAS0_DC_MASK
316
317
318
319
320
321
322 #define MT6357_AUD_MICBIAS0_DC_ENABLE_ALL
323
324
325
326
327
328
329 #define MT6357_AUD_MICBIAS0_DC_ENABLE_P1
330
331
332 #define MT6357_AUD_MICBIAS0_DC_DISABLE_ALL
333
334 /* MT6357_AUDENC_ANA_CON9 */
335 #define MT6357_AUD_MICBIAS1_DCSW1P_EN_MASK
336 #define MT6357_AUD_MICBIAS1_DCSW1P_ENABLE
337 #define MT6357_AUD_MICBIAS1_DCSW1P_DISABLE
338 #define MT6357_AUD_MICBIAS1_VREF_MASK
339 #define MT6357_AUD_MICBIAS1_VREF_SFT
340 #define MT6357_AUD_MICBIAS1_PWD_SFT
341
342 /* MT6357_AUDDEC_ANA_CON0 */
343 #define MT6357_AUD_HPR_SC_VAUDP15_MASK
344 #define MT6357_AUD_HPR_SC_VAUDP15_DISABLE
345 #define MT6357_AUD_HPR_SC_VAUDP15_ENABLE
346 #define MT6357_AUD_HPL_SC_VAUDP15_MASK
347 #define MT6357_AUD_HPL_SC_VAUDP15_DISABLE
348 #define MT6357_AUD_HPL_SC_VAUDP15_ENABLE
349 #define MT6357_AUD_HPR_MUX_INPUT_VAUDP15_MASK_
350 #define MT6357_AUD_HPR_MUX_INPUT_VAUDP15_SFT
351 #define MT6357_AUD_HPL_MUX_INPUT_VAUDP15_MASK_
352 #define MT6357_AUD_HPL_MUX_INPUT_VAUDP15_SFT
353 #define MT6357_AUD_HPR_BIAS_VAUDP15_MASK
354 #define MT6357_AUD_HPR_BIAS_VAUDP15_ENABLE
355 #define MT6357_AUD_HPR_BIAS_VAUDP15_DISABLE
356 #define MT6357_AUD_HPL_BIAS_VAUDP15_MASK
357 #define MT6357_AUD_HPL_BIAS_VAUDP15_ENABLE
358 #define MT6357_AUD_HPL_BIAS_VAUDP15_DISABLE
359 #define MT6357_AUD_HPR_PWRUP_VAUDP15_MASK
360 #define MT6357_AUD_HPR_PWRUP_VAUDP15_ENABLE
361 #define MT6357_AUD_HPR_PWRUP_VAUDP15_DISABLE
362 #define MT6357_AUD_HPL_PWRUP_VAUDP15_MASK
363 #define MT6357_AUD_HPL_PWRUP_VAUDP15_ENABLE
364 #define MT6357_AUD_HPL_PWRUP_VAUDP15_DISABLE
365 #define MT6357_AUD_DACL_PWRUP_VA28_MASK
366 #define MT6357_AUD_DACL_PWRUP_VA28_ENABLE
367 #define MT6357_AUD_DACL_PWRUP_VA28_DISABLE
368 #define MT6357_AUD_DACR_PWRUP_VA28_MASK
369 #define MT6357_AUD_DACR_PWRUP_VA28_ENABLE
370 #define MT6357_AUD_DACR_PWRUP_VA28_DISABLE
371 #define MT6357_AUD_DACR_PWRUP_VAUDP15_MASK
372 #define MT6357_AUD_DACR_PWRUP_VAUDP15_ENABLE
373 #define MT6357_AUD_DACR_PWRUP_VAUDP15_DISABLE
374 #define MT6357_AUD_DACL_PWRUP_VAUDP15_MASK
375 #define MT6357_AUD_DACL_PWRUP_VAUDP15_ENABLE
376 #define MT6357_AUD_DACL_PWRUP_VAUDP15_DISABLE
377
378 /* MT6357_AUDDEC_ANA_CON1 */
379 #define MT6357_HPROUT_STG_CTRL_VAUDP15_MASK
380 #define MT6357_HPROUT_STG_CTRL_VAUDP15_SFT
381 #define MT6357_HPLOUT_STG_CTRL_VAUDP15_MASK
382 #define MT6357_HPLOUT_STG_CTRL_VAUDP15_SFT
383 #define MT6357_HPLOUT_STG_CTRL_VAUDP15_MAX
384 #define MT6357_HPR_SHORT2HPR_AUX_VAUDP15_MASK
385 #define MT6357_HPR_SHORT2HPR_AUX_VAUDP15_ENABL
386 #define MT6357_HPR_SHORT2HPR_AUX_VAUDP15_DISAB
387 #define MT6357_HPL_SHORT2HPR_AUX_VAUDP15_MASK
388 #define MT6357_HPL_SHORT2HPR_AUX_VAUDP15_ENABL
389 #define MT6357_HPL_SHORT2HPR_AUX_VAUDP15_DISAB
390 #define MT6357_HPR_AUX_FBRSW_VAUDP15_MASK
391 #define MT6357_HPR_AUX_FBRSW_VAUDP15_ENABLE
392 #define MT6357_HPR_AUX_FBRSW_VAUDP15_DISABLE
393 #define MT6357_HPL_AUX_FBRSW_VAUDP15_MASK
394 #define MT6357_HPL_AUX_FBRSW_VAUDP15_ENABLE
395 #define MT6357_HPL_AUX_FBRSW_VAUDP15_DISABLE
396 #define MT6357_HPROUT_AUX_PWRUP_VAUDP15_MASK
397 #define MT6357_HPROUT_AUX_PWRUP_VAUDP15_ENABLE
398 #define MT6357_HPROUT_AUX_PWRUP_VAUDP15_DISABL
399 #define MT6357_HPLOUT_AUX_PWRUP_VAUDP15_MASK
400 #define MT6357_HPLOUT_AUX_PWRUP_VAUDP15_ENABLE
401 #define MT6357_HPLOUT_AUX_PWRUP_VAUDP15_DISABL
402 #define MT6357_HPROUT_PWRUP_VAUDP15_MASK
403 #define MT6357_HPROUT_PWRUP_VAUDP15_ENABLE
404 #define MT6357_HPROUT_PWRUP_VAUDP15_DISABLE
405 #define MT6357_HPLOUT_PWRUP_VAUDP15_MASK
406 #define MT6357_HPLOUT_PWRUP_VAUDP15_ENABLE
407 #define MT6357_HPLOUT_PWRUP_VAUDP15_DISABLE
408
409 /* MT6357_AUDDEC_ANA_CON2 */
410 #define MT6357_HPP_SHORT_2VCM_VAUDP15_MASK
411 #define MT6357_HPP_SHORT_2VCM_VAUDP15_ENABLE
412 #define MT6357_HPP_SHORT_2VCM_VAUDP15_DISABLE
413 #define MT6357_AUD_REFN_DERES_VAUDP15_MASK
414 #define MT6357_AUD_REFN_DERES_VAUDP15_ENABLE
415 #define MT6357_AUD_REFN_DERES_VAUDP15_DISABLE
416 #define MT6357_HPROUT_STB_ENH_VAUDP15_MASK
417 #define MT6357_HPROUT_STB_ENH_VAUDP15_OPEN
418 #define MT6357_HPROUT_STB_ENH_VAUDP15_NOPEN_P2
419 #define MT6357_HPROUT_STB_ENH_VAUDP15_N470_POP
420 #define MT6357_HPROUT_STB_ENH_VAUDP15_N470_P25
421 #define MT6357_HPROUT_STB_ENH_VAUDP15_NOPEN_P4
422 #define MT6357_HPROUT_STB_ENH_VAUDP15_N470_P47
423 #define MT6357_HPLOUT_STB_ENH_VAUDP15_MASK
424 #define MT6357_HPLOUT_STB_ENH_VAUDP15_OPEN
425 #define MT6357_HPLOUT_STB_ENH_VAUDP15_NOPEN_P2
426 #define MT6357_HPLOUT_STB_ENH_VAUDP15_N470_POP
427 #define MT6357_HPLOUT_STB_ENH_VAUDP15_N470_P25
428 #define MT6357_HPLOUT_STB_ENH_VAUDP15_NOPEN_P4
429 #define MT6357_HPLOUT_STB_ENH_VAUDP15_N470_P47
430
431 /* MT6357_AUDDEC_ANA_CON3 */
432 #define MT6357_AUD_HSOUT_STB_ENH_VAUDP15_MASK
433 #define MT6357_AUD_HSOUT_STB_ENH_VAUDP15_ENABL
434 #define MT6357_AUD_HSOUT_STB_ENH_VAUDP15_DISAB
435 #define MT6357_AUD_HS_SC_VAUDP15_MASK
436 #define MT6357_AUD_HS_SC_VAUDP15_DISABLE
437 #define MT6357_AUD_HS_SC_VAUDP15_ENABLE
438 #define MT6357_AUD_HS_MUX_INPUT_VAUDP15_MASK_N
439 #define MT6357_AUD_HS_MUX_INPUT_VAUDP15_SFT
440 #define MT6357_AUD_HS_PWRUP_BIAS_VAUDP15_MASK
441 #define MT6357_AUD_HS_PWRUP_BIAS_VAUDP15_ENABL
442 #define MT6357_AUD_HS_PWRUP_BIAS_VAUDP15_DISAB
443 #define MT6357_AUD_HS_PWRUP_VAUDP15_MASK
444 #define MT6357_AUD_HS_PWRUP_VAUDP15_ENABLE
445 #define MT6357_AUD_HS_PWRUP_VAUDP15_DISABLE
446
447 /* MT6357_AUDDEC_ANA_CON4 */
448 #define MT6357_AUD_LOLOUT_STB_ENH_VAUDP15_MASK
449 #define MT6357_AUD_LOLOUT_STB_ENH_VAUDP15_ENAB
450 #define MT6357_AUD_LOLOUT_STB_ENH_VAUDP15_DISA
451 #define MT6357_AUD_LOL_SC_VAUDP15_MASK
452 #define MT6357_AUD_LOL_SC_VAUDP15_DISABLE
453 #define MT6357_AUD_LOL_SC_VAUDP15_ENABLE
454 #define MT6357_AUD_LOL_MUX_INPUT_VAUDP15_MASK_
455 #define MT6357_AUD_LOL_MUX_INPUT_VAUDP15_SFT
456 #define MT6357_AUD_LOL_PWRUP_BIAS_VAUDP15_MASK
457 #define MT6357_AUD_LOL_PWRUP_BIAS_VAUDP15_ENAB
458 #define MT6357_AUD_LOL_PWRUP_BIAS_VAUDP15_DISA
459 #define MT6357_AUD_LOL_PWRUP_VAUDP15_MASK
460 #define MT6357_AUD_LOL_PWRUP_VAUDP15_ENABLE
461 #define MT6357_AUD_LOL_PWRUP_VAUDP15_DISABLE
462
463 /* MT6357_AUDDEC_ANA_CON6 */
464 #define MT6357_HP_AUX_LOOP_GAIN_MASK
465 #define MT6357_HP_AUX_LOOP_GAIN_SFT
466 #define MT6357_HP_AUX_LOOP_GAIN_MAX
467 #define MT6357_HPR_AUX_CMFB_LOOP_MASK
468 #define MT6357_HPR_AUX_CMFB_LOOP_ENABLE
469 #define MT6357_HPR_AUX_CMFB_LOOP_DISABLE
470 #define MT6357_HPL_AUX_CMFB_LOOP_MASK
471 #define MT6357_HPL_AUX_CMFB_LOOP_ENABLE
472 #define MT6357_HPL_AUX_CMFB_LOOP_DISABLE
473 #define MT6357_HPRL_MAIN_CMFB_LOOP_MASK
474 #define MT6357_HPRL_MAIN_CMFB_LOOP_ENABLE
475 #define MT6357_HPRL_MAIN_CMFB_LOOP_DISABLE
476 #define MT6357_HP_CMFB_RST_MASK
477 #define MT6357_HP_CMFB_RST_NORMAL
478 #define MT6357_HP_CMFB_RST_RESET
479 #define MT6357_DAC_LOW_NOISE_MODE_MASK
480 #define MT6357_DAC_LOW_NOISE_MODE_ENABLE
481 #define MT6357_DAC_LOW_NOISE_MODE_DISABLE
482
483 /* MT6357_AUDDEC_ANA_CON7 */
484 #define MT6357_HP_IVBUF_DEGAIN_SFT
485 #define MT6357_HP_IVBUF_DEGAIN_MAX
486
487 /* MT6357_AUDDEC_ANA_CON10 */
488 #define MT6357_AUD_IBIAS_PWRDN_VAUDP15_MASK
489 #define MT6357_AUD_IBIAS_PWRDN_VAUDP15_DISABLE
490 #define MT6357_AUD_IBIAS_PWRDN_VAUDP15_ENABLE
491
492 /* MT6357_AUDDEC_ANA_CON11 */
493 #define MT6357_RSTB_ENCODER_VA28_MASK
494 #define MT6357_RSTB_ENCODER_VA28_ENABLE
495 #define MT6357_RSTB_ENCODER_VA28_DISABLE
496 #define MT6357_AUDGLB_PWRDN_VA28_SFT
497 #define MT6357_RSTB_DECODER_VA28_MASK
498 #define MT6357_RSTB_DECODER_VA28_ENABLE
499 #define MT6357_RSTB_DECODER_VA28_DISABLE
500
501 /* MT6357_AUDDEC_ANA_CON12 */
502 #define MT6357_VA28REFGEN_EN_VA28_MASK
503 #define MT6357_VA28REFGEN_EN_VA28_ENABLE
504 #define MT6357_VA28REFGEN_EN_VA28_DISABLE
505 #define MT6357_VA33REFGEN_EN_VA18_MASK
506 #define MT6357_VA33REFGEN_EN_VA18_ENABLE
507 #define MT6357_VA33REFGEN_EN_VA18_DISABLE
508 #define MT6357_LCLDO_ENC_REMOTE_SENSE_VA28_MAS
509 #define MT6357_LCLDO_ENC_REMOTE_SENSE_VA28_ENA
510 #define MT6357_LCLDO_ENC_REMOTE_SENSE_VA28_DIS
511 #define MT6357_LCLDO_ENC_EN_VA28_MASK
512 #define MT6357_LCLDO_ENC_EN_VA28_ENABLE
513 #define MT6357_LCLDO_ENC_EN_VA28_DISABLE
514 #define MT6357_LCLDO_REMOTE_SENSE_VA18_MASK
515 #define MT6357_LCLDO_REMOTE_SENSE_VA18_ENABLE
516 #define MT6357_LCLDO_REMOTE_SENSE_VA18_DISABLE
517 #define MT6357_LCLDO_EN_VA18_MASK
518 #define MT6357_LCLDO_EN_VA18_ENABLE
519 #define MT6357_LCLDO_EN_VA18_DISABLE
520 #define MT6357_HCLDO_REMOTE_SENSE_VA18_MASK
521 #define MT6357_HCLDO_REMOTE_SENSE_VA18_ENABLE
522 #define MT6357_HCLDO_REMOTE_SENSE_VA18_DISABLE
523 #define MT6357_HCLDO_EN_VA18_MASK
524 #define MT6357_HCLDO_EN_VA18_ENABLE
525 #define MT6357_HCLDO_EN_VA18_DISABLE
526
527 /* MT6357_AUDDEC_ANA_CON13 */
528 #define MT6357_NVREG_EN_VAUDP15_MASK
529 #define MT6357_NVREG_EN_VAUDP15_ENABLE
530 #define MT6357_NVREG_EN_VAUDP15_DISABLE
531
532 /* MT6357_AUDDEC_ELR_0 */
533 #define MT6357_AUD_HP_TRIM_EN_VAUDP15_MASK
534 #define MT6357_AUD_HP_TRIM_EN_VAUDP15_ENABLE
535 #define MT6357_AUD_HP_TRIM_EN_VAUDP15_DISABLE
536
537 /* MT6357_ZCD_CON1 */
538 #define MT6357_AUD_LOL_GAIN_MASK
539 #define MT6357_AUD_LOL_GAIN_SFT
540 #define MT6357_AUD_LOR_GAIN_MASK
541 #define MT6357_AUD_LOR_GAIN_SFT
542 #define MT6357_AUD_LO_GAIN_MAX
543
544 /* MT6357_ZCD_CON2 */
545 #define MT6357_AUD_HPL_GAIN_MASK
546 #define MT6357_AUD_HPL_GAIN_SFT
547 #define MT6357_AUD_HPR_GAIN_MASK
548 #define MT6357_AUD_HPR_GAIN_SFT
549 #define MT6357_AUD_HP_GAIN_MAX
550
551 /* MT6357_ZCD_CON3 */
552 #define MT6357_AUD_HS_GAIN_MASK
553 #define MT6357_AUD_HS_GAIN_SFT
554 #define MT6357_AUD_HS_GAIN_MAX
555
556 /* Registers list */
557 /* gpio direction */
558 #define MT6357_GPIO_DIR0
559 /* mosi */
560 #define MT6357_GPIO_MODE2
561 #define MT6357_GPIO_MODE2_SET
562 #define MT6357_GPIO_MODE2_CLR
563 /* miso */
564 #define MT6357_GPIO_MODE3
565 #define MT6357_GPIO_MODE3_SET
566 #define MT6357_GPIO_MODE3_CLR
567
568 #define MT6357_DCXO_CW14
569
570 #define MT6357_AUD_TOP_CKPDN_CON0
571 #define MT6357_AUDNCP_CLKDIV_CON0
572 #define MT6357_AUDNCP_CLKDIV_CON1
573 #define MT6357_AUDNCP_CLKDIV_CON2
574 #define MT6357_AUDNCP_CLKDIV_CON3
575 #define MT6357_AUDNCP_CLKDIV_CON4
576 #define MT6357_AFE_UL_DL_CON0
577 #define MT6357_AFE_DL_SRC2_CON0_L
578 #define MT6357_AFE_UL_SRC_CON0_H
579 #define MT6357_AFE_UL_SRC_CON0_L
580 #define MT6357_AFE_TOP_CON0
581 #define MT6357_AUDIO_TOP_CON0
582 #define MT6357_AFUNC_AUD_CON0
583 #define MT6357_AFUNC_AUD_CON2
584 #define MT6357_AFE_ADDA_MTKAIF_CFG0
585 #define MT6357_AFE_SGEN_CFG0
586 #define MT6357_AFE_DCCLK_CFG0
587 #define MT6357_AFE_DCCLK_CFG1
588 #define MT6357_AFE_AUD_PAD_TOP
589 #define MT6357_AUDENC_ANA_CON0
590 #define MT6357_AUDENC_ANA_CON1
591 #define MT6357_AUDENC_ANA_CON6
592 #define MT6357_AUDENC_ANA_CON7
593 #define MT6357_AUDENC_ANA_CON8
594 #define MT6357_AUDENC_ANA_CON9
595 #define MT6357_AUDDEC_ANA_CON0
596 #define MT6357_AUDDEC_ANA_CON1
597 #define MT6357_AUDDEC_ANA_CON2
598 #define MT6357_AUDDEC_ANA_CON3
599 #define MT6357_AUDDEC_ANA_CON4
600 #define MT6357_AUDDEC_ANA_CON6
601 #define MT6357_AUDDEC_ANA_CON7
602 #define MT6357_AUDDEC_ANA_CON10
603 #define MT6357_AUDDEC_ANA_CON11
604 #define MT6357_AUDDEC_ANA_CON12
605 #define MT6357_AUDDEC_ANA_CON13
606 #define MT6357_AUDDEC_ELR_0
607 #define MT6357_ZCD_CON1
608 #define MT6357_ZCD_CON2
609 #define MT6357_ZCD_CON3
610
611 enum {
612 DL_GAIN_8DB = 0,
613 DL_GAIN_0DB = 8,
614 DL_GAIN_N_1DB = 9,
615 DL_GAIN_N_10DB = 18,
616 DL_GAIN_N_12DB = 20,
617 DL_GAIN_N_40DB = 0x1f,
618 };
619
620 enum {
621 UL_GAIN_0DB = 0,
622 UL_GAIN_6DB,
623 UL_GAIN_12DB,
624 UL_GAIN_18DB,
625 UL_GAIN_24DB,
626 };
627
628 #define MT6357_DL_GAIN_N_40DB_REG
629 #define MT6357_DL_GAIN_REG_LEFT_MASK
630 #define MT6357_DL_GAIN_REG_LEFT_SHIFT
631 #define MT6357_DL_GAIN_REG_RIGHT_MASK
632 #define MT6357_DL_GAIN_REG_RIGHT_SHIFT
633 #define MT6357_DL_GAIN_REG_MASK
634
635 #define MT6357_SND_SOC_ADV_MT_FMTS (\
636 SNDRV_PCM_FMTB
637 SNDRV_PCM_FMTB
638 SNDRV_PCM_FMTB
639 SNDRV_PCM_FMTB
640 SNDRV_PCM_FMTB
641 SNDRV_PCM_FMTB
642 SNDRV_PCM_FMTB
643 SNDRV_PCM_FMTB
644 SNDRV_PCM_FMTB
645 SNDRV_PCM_FMTB
646 SNDRV_PCM_FMTB
647 SNDRV_PCM_FMTB
648
649 #define MT6357_SOC_HIGH_USE_RATE (\
650 SNDRV_PCM_RATE
651 SNDRV_PCM_RATE
652
653 /* codec private structure */
654 struct mt6357_priv {
655 struct device *dev;
656 struct regmap *regmap;
657 bool pull_down_needed;
658 int hp_channel_number;
659 };
660 #endif
661
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.