1 /* SPDX-License-Identifier: GPL-2.0-only */ 1
2 /*
3 * rt1318-sdw.h -- RT1318 SDCA ALSA SoC audio
4 *
5 * Copyright(c) 2022 Realtek Semiconductor Cor
6 */
7
8 #ifndef __RT1318_SDW_H__
9 #define __RT1318_SDW_H__
10
11 #include <linux/regmap.h>
12 #include <linux/soundwire/sdw.h>
13 #include <linux/soundwire/sdw_type.h>
14 #include <linux/soundwire/sdw_registers.h>
15 #include <sound/soc.h>
16
17 /* imp-defined registers */
18 #define RT1318_SAPU_SM 0x3203
19
20 #define R1318_TCON 0xc203
21 #define R1318_TCON_RELATED_1 0xc206
22
23 #define R1318_SPK_TEMPERATRUE_PROTECTION_0
24 #define R1318_SPK_TEMPERATRUE_PROTECTION_L_4
25 #define R1318_SPK_TEMPERATRUE_PROTECTION_R_4
26
27 #define R1318_SPK_TEMPERATRUE_PROTECTION_L_6
28 #define R1318_SPK_TEMPERATRUE_PROTECTION_R_6
29
30 #define RT1318_INIT_RECIPROCAL_REG_L_24
31 #define RT1318_INIT_RECIPROCAL_REG_L_23_16
32 #define RT1318_INIT_RECIPROCAL_REG_L_15_8
33 #define RT1318_INIT_RECIPROCAL_REG_L_7_0
34 #define RT1318_INIT_RECIPROCAL_REG_R_24
35 #define RT1318_INIT_RECIPROCAL_REG_R_23_16
36 #define RT1318_INIT_RECIPROCAL_REG_R_15_8
37 #define RT1318_INIT_RECIPROCAL_REG_R_7_0
38
39 #define RT1318_INIT_R0_RECIPROCAL_SYN_L_24 0xd
40 #define RT1318_INIT_R0_RECIPROCAL_SYN_L_23_16
41 #define RT1318_INIT_R0_RECIPROCAL_SYN_L_15_8 0
42 #define RT1318_INIT_R0_RECIPROCAL_SYN_L_7_0 0x
43 #define RT1318_INIT_R0_RECIPROCAL_SYN_R_24 0xd
44 #define RT1318_INIT_R0_RECIPROCAL_SYN_R_23_16
45 #define RT1318_INIT_R0_RECIPROCAL_SYN_R_15_8 0
46 #define RT1318_INIT_R0_RECIPROCAL_SYN_R_7_0 0x
47
48 #define RT1318_R0_COMPARE_FLAG_L 0xdb35
49 #define RT1318_R0_COMPARE_FLAG_R 0xdd35
50
51 #define RT1318_STP_INITIAL_RS_TEMP_H 0xdd93
52 #define RT1318_STP_INITIAL_RS_TEMP_L 0xdd94
53
54 /* RT1318 SDCA Control - function number */
55 #define FUNC_NUM_SMART_AMP 0x04
56
57 /* RT1318 SDCA entity */
58 #define RT1318_SDCA_ENT_PDE23 0x31
59 #define RT1318_SDCA_ENT_XU24 0x24
60 #define RT1318_SDCA_ENT_FU21 0x03
61 #define RT1318_SDCA_ENT_UDMPU21 0x02
62 #define RT1318_SDCA_ENT_CS21 0x21
63 #define RT1318_SDCA_ENT_SAPU 0x29
64
65 /* RT1318 SDCA control */
66 #define RT1318_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
67 #define RT1318_SDCA_CTL_REQ_POWER_STATE 0x01
68 #define RT1318_SDCA_CTL_FU_MUTE 0x01
69 #define RT1318_SDCA_CTL_FU_VOLUME 0x02
70 #define RT1318_SDCA_CTL_UDMPU_CLUSTER 0x10
71 #define RT1318_SDCA_CTL_SAPU_PROTECTION_MODE 0
72 #define RT1318_SDCA_CTL_SAPU_PROTECTION_STATUS
73
74 /* RT1318 SDCA channel */
75 #define CH_L 0x01
76 #define CH_R 0x02
77
78 /* sample frequency index */
79 #define RT1318_SDCA_RATE_16000HZ
80 #define RT1318_SDCA_RATE_32000HZ
81 #define RT1318_SDCA_RATE_44100HZ
82 #define RT1318_SDCA_RATE_48000HZ
83 #define RT1318_SDCA_RATE_96000HZ
84 #define RT1318_SDCA_RATE_192000HZ
85
86
87 struct rt1318_sdw_priv {
88 struct snd_soc_component *component;
89 struct regmap *regmap;
90 struct sdw_slave *sdw_slave;
91 struct sdw_bus_params params;
92 bool hw_init;
93 bool first_hw_init;
94 };
95
96 #endif /* __RT1318_SDW_H__ */
97
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