1 /* SPDX-License-Identifier: GPL-2.0-only */ 1
2 /*
3 * rt5660.h -- RT5660 ALSA SoC audio driver
4 *
5 * Copyright 2016 Realtek Semiconductor Corp.
6 * Author: Oder Chiou <oder_chiou@realtek.com>
7 */
8
9 #ifndef _RT5660_H
10 #define _RT5660_H
11
12 #include <linux/clk.h>
13 #include <sound/rt5660.h>
14
15 /* Info */
16 #define RT5660_RESET
17 #define RT5660_VENDOR_ID
18 #define RT5660_VENDOR_ID1
19 #define RT5660_VENDOR_ID2
20 /* I/O - Output */
21 #define RT5660_SPK_VOL
22 #define RT5660_LOUT_VOL
23 /* I/O - Input */
24 #define RT5660_IN1_IN2
25 #define RT5660_IN3_IN4
26 /* I/O - ADC/DAC/DMIC */
27 #define RT5660_DAC1_DIG_VOL
28 #define RT5660_STO1_ADC_DIG_VOL
29 #define RT5660_ADC_BST_VOL1
30 /* Mixer - D-D */
31 #define RT5660_STO1_ADC_MIXER
32 #define RT5660_AD_DA_MIXER
33 #define RT5660_STO_DAC_MIXER
34 #define RT5660_DIG_INF1_DATA
35 /* Mixer - ADC */
36 #define RT5660_REC_L1_MIXER
37 #define RT5660_REC_L2_MIXER
38 #define RT5660_REC_R1_MIXER
39 #define RT5660_REC_R2_MIXER
40 /* Mixer - DAC */
41 #define RT5660_LOUT_MIXER
42 #define RT5660_SPK_MIXER
43 #define RT5660_SPO_MIXER
44 #define RT5660_SPO_CLSD_RATIO
45 #define RT5660_OUT_L_GAIN1
46 #define RT5660_OUT_L_GAIN2
47 #define RT5660_OUT_L1_MIXER
48 #define RT5660_OUT_R_GAIN1
49 #define RT5660_OUT_R_GAIN2
50 #define RT5660_OUT_R1_MIXER
51 /* Power */
52 #define RT5660_PWR_DIG1
53 #define RT5660_PWR_DIG2
54 #define RT5660_PWR_ANLG1
55 #define RT5660_PWR_ANLG2
56 #define RT5660_PWR_MIXER
57 #define RT5660_PWR_VOL
58 /* Private Register Control */
59 #define RT5660_PRIV_INDEX
60 #define RT5660_PRIV_DATA
61 /* Format - ADC/DAC */
62 #define RT5660_I2S1_SDP
63 #define RT5660_ADDA_CLK1
64 #define RT5660_ADDA_CLK2
65 #define RT5660_DMIC_CTRL1
66 /* Function - Analog */
67 #define RT5660_GLB_CLK
68 #define RT5660_PLL_CTRL1
69 #define RT5660_PLL_CTRL2
70 #define RT5660_CLSD_AMP_OC_CTRL
71 #define RT5660_CLSD_AMP_CTRL
72 #define RT5660_LOUT_AMP_CTRL
73 #define RT5660_SPK_AMP_SPKVDD
74 #define RT5660_MICBIAS
75 #define RT5660_CLSD_OUT_CTRL1
76 #define RT5660_CLSD_OUT_CTRL2
77 #define RT5660_DIPOLE_MIC_CTRL1
78 #define RT5660_DIPOLE_MIC_CTRL2
79 #define RT5660_DIPOLE_MIC_CTRL3
80 #define RT5660_DIPOLE_MIC_CTRL4
81 #define RT5660_DIPOLE_MIC_CTRL5
82 #define RT5660_DIPOLE_MIC_CTRL6
83 #define RT5660_DIPOLE_MIC_CTRL7
84 #define RT5660_DIPOLE_MIC_CTRL8
85 #define RT5660_DIPOLE_MIC_CTRL9
86 #define RT5660_DIPOLE_MIC_CTRL10
87 #define RT5660_DIPOLE_MIC_CTRL11
88 #define RT5660_DIPOLE_MIC_CTRL12
89 /* Function - Digital */
90 #define RT5660_EQ_CTRL1
91 #define RT5660_EQ_CTRL2
92 #define RT5660_DRC_AGC_CTRL1
93 #define RT5660_DRC_AGC_CTRL2
94 #define RT5660_DRC_AGC_CTRL3
95 #define RT5660_DRC_AGC_CTRL4
96 #define RT5660_DRC_AGC_CTRL5
97 #define RT5660_JD_CTRL
98 #define RT5660_IRQ_CTRL1
99 #define RT5660_IRQ_CTRL2
100 #define RT5660_INT_IRQ_ST
101 #define RT5660_GPIO_CTRL1
102 #define RT5660_GPIO_CTRL2
103 #define RT5660_WIND_FILTER_CTRL1
104 #define RT5660_SV_ZCD1
105 #define RT5660_SV_ZCD2
106 #define RT5660_DRC1_LM_CTRL1
107 #define RT5660_DRC1_LM_CTRL2
108 #define RT5660_DRC2_LM_CTRL1
109 #define RT5660_DRC2_LM_CTRL2
110 #define RT5660_MULTI_DRC_CTRL
111 #define RT5660_DRC2_CTRL1
112 #define RT5660_DRC2_CTRL2
113 #define RT5660_DRC2_CTRL3
114 #define RT5660_DRC2_CTRL4
115 #define RT5660_DRC2_CTRL5
116 #define RT5660_ALC_PGA_CTRL1
117 #define RT5660_ALC_PGA_CTRL2
118 #define RT5660_ALC_PGA_CTRL3
119 #define RT5660_ALC_PGA_CTRL4
120 #define RT5660_ALC_PGA_CTRL5
121 #define RT5660_ALC_PGA_CTRL6
122 #define RT5660_ALC_PGA_CTRL7
123
124 /* General Control */
125 #define RT5660_GEN_CTRL1
126 #define RT5660_GEN_CTRL2
127 #define RT5660_GEN_CTRL3
128
129 /* Index of Codec Private Register definition
130 #define RT5660_CHOP_DAC_ADC
131
132 /* Global Definition */
133 #define RT5660_L_MUTE
134 #define RT5660_L_MUTE_SFT
135 #define RT5660_VOL_L_MUTE
136 #define RT5660_VOL_L_SFT
137 #define RT5660_R_MUTE
138 #define RT5660_R_MUTE_SFT
139 #define RT5660_VOL_R_MUTE
140 #define RT5660_VOL_R_SFT
141 #define RT5660_L_VOL_MASK
142 #define RT5660_L_VOL_SFT
143 #define RT5660_R_VOL_MASK
144 #define RT5660_R_VOL_SFT
145
146 /* IN1 and IN2 Control (0x0d) */
147 #define RT5660_IN_DF1
148 #define RT5660_IN_SFT1
149 #define RT5660_BST_MASK1
150 #define RT5660_BST_SFT1
151 #define RT5660_IN_DF2
152 #define RT5660_IN_SFT2
153 #define RT5660_BST_MASK2
154 #define RT5660_BST_SFT2
155
156 /* IN3 and IN4 Control (0x0e) */
157 #define RT5660_IN_DF3
158 #define RT5660_IN_SFT3
159 #define RT5660_BST_MASK3
160 #define RT5660_BST_SFT3
161 #define RT5660_IN_DF4
162 #define RT5660_IN_SFT4
163 #define RT5660_BST_MASK4
164 #define RT5660_BST_SFT4
165
166 /* DAC1 Digital Volume (0x19) */
167 #define RT5660_DAC_L1_VOL_MASK
168 #define RT5660_DAC_L1_VOL_SFT
169 #define RT5660_DAC_R1_VOL_MASK
170 #define RT5660_DAC_R1_VOL_SFT
171
172 /* ADC Digital Volume Control (0x1c) */
173 #define RT5660_ADC_L_VOL_MASK
174 #define RT5660_ADC_L_VOL_SFT
175 #define RT5660_ADC_R_VOL_MASK
176 #define RT5660_ADC_R_VOL_SFT
177
178 /* ADC Boost Volume Control (0x1e) */
179 #define RT5660_STO1_ADC_L_BST_MASK
180 #define RT5660_STO1_ADC_L_BST_SFT
181 #define RT5660_STO1_ADC_R_BST_MASK
182 #define RT5660_STO1_ADC_R_BST_SFT
183
184 /* Stereo ADC Mixer Control (0x27) */
185 #define RT5660_M_ADC_L1
186 #define RT5660_M_ADC_L1_SFT
187 #define RT5660_M_ADC_L2
188 #define RT5660_M_ADC_L2_SFT
189 #define RT5660_M_ADC_R1
190 #define RT5660_M_ADC_R1_SFT
191 #define RT5660_M_ADC_R2
192 #define RT5660_M_ADC_R2_SFT
193
194 /* ADC Mixer to DAC Mixer Control (0x29) */
195 #define RT5660_M_ADCMIX_L
196 #define RT5660_M_ADCMIX_L_SFT
197 #define RT5660_M_DAC1_L
198 #define RT5660_M_DAC1_L_SFT
199 #define RT5660_M_ADCMIX_R
200 #define RT5660_M_ADCMIX_R_SFT
201 #define RT5660_M_DAC1_R
202 #define RT5660_M_DAC1_R_SFT
203
204 /* Stereo DAC Mixer Control (0x2a) */
205 #define RT5660_M_DAC_L1
206 #define RT5660_M_DAC_L1_SFT
207 #define RT5660_DAC_L1_STO_L_VOL_MASK
208 #define RT5660_DAC_L1_STO_L_VOL_SFT
209 #define RT5660_M_DAC_R1_STO_L
210 #define RT5660_M_DAC_R1_STO_L_SFT
211 #define RT5660_DAC_R1_STO_L_VOL_MASK
212 #define RT5660_DAC_R1_STO_L_VOL_SFT
213 #define RT5660_M_DAC_R1
214 #define RT5660_M_DAC_R1_SFT
215 #define RT5660_DAC_R1_STO_R_VOL_MASK
216 #define RT5660_DAC_R1_STO_R_VOL_SFT
217 #define RT5660_M_DAC_L1_STO_R
218 #define RT5660_M_DAC_L1_STO_R_SFT
219 #define RT5660_DAC_L1_STO_R_VOL_MASK
220 #define RT5660_DAC_L1_STO_R_VOL_SFT
221
222 /* Digital Interface Data Control (0x2f) */
223 #define RT5660_IF1_DAC_IN_SEL
224 #define RT5660_IF1_DAC_IN_SFT
225 #define RT5660_IF1_ADC_IN_SEL
226 #define RT5660_IF1_ADC_IN_SFT
227
228 /* REC Left Mixer Control 1 (0x3b) */
229 #define RT5660_G_BST3_RM_L_MASK
230 #define RT5660_G_BST3_RM_L_SFT
231 #define RT5660_G_BST2_RM_L_MASK
232 #define RT5660_G_BST2_RM_L_SFT
233
234 /* REC Left Mixer Control 2 (0x3c) */
235 #define RT5660_G_BST1_RM_L_MASK
236 #define RT5660_G_BST1_RM_L_SFT
237 #define RT5660_G_OM_L_RM_L_MASK
238 #define RT5660_G_OM_L_RM_L_SFT
239 #define RT5660_M_BST3_RM_L
240 #define RT5660_M_BST3_RM_L_SFT
241 #define RT5660_M_BST2_RM_L
242 #define RT5660_M_BST2_RM_L_SFT
243 #define RT5660_M_BST1_RM_L
244 #define RT5660_M_BST1_RM_L_SFT
245 #define RT5660_M_OM_L_RM_L
246 #define RT5660_M_OM_L_RM_L_SFT
247
248 /* REC Right Mixer Control 1 (0x3d) */
249 #define RT5660_G_BST3_RM_R_MASK
250 #define RT5660_G_BST3_RM_R_SFT
251 #define RT5660_G_BST2_RM_R_MASK
252 #define RT5660_G_BST2_RM_R_SFT
253
254 /* REC Right Mixer Control 2 (0x3e) */
255 #define RT5660_G_BST1_RM_R_MASK
256 #define RT5660_G_BST1_RM_R_SFT
257 #define RT5660_G_OM_R_RM_R_MASK
258 #define RT5660_G_OM_R_RM_R_SFT
259 #define RT5660_M_BST3_RM_R
260 #define RT5660_M_BST3_RM_R_SFT
261 #define RT5660_M_BST2_RM_R
262 #define RT5660_M_BST2_RM_R_SFT
263 #define RT5660_M_BST1_RM_R
264 #define RT5660_M_BST1_RM_R_SFT
265 #define RT5660_M_OM_R_RM_R
266 #define RT5660_M_OM_R_RM_R_SFT
267
268 /* LOUTMIX Control (0x45) */
269 #define RT5660_M_DAC1_LM
270 #define RT5660_M_DAC1_LM_SFT
271 #define RT5660_M_LOVOL_M
272 #define RT5660_M_LOVOL_LM_SFT
273
274 /* SPK Mixer Control (0x46) */
275 #define RT5660_G_BST3_SM_MASK
276 #define RT5660_G_BST3_SM_SFT
277 #define RT5660_G_BST1_SM_MASK
278 #define RT5660_G_BST1_SM_SFT
279 #define RT5660_G_DACl_SM_MASK
280 #define RT5660_G_DACl_SM_SFT
281 #define RT5660_G_DACR_SM_MASK
282 #define RT5660_G_DACR_SM_SFT
283 #define RT5660_G_OM_L_SM_MASK
284 #define RT5660_G_OM_L_SM_SFT
285 #define RT5660_M_DACR_SM
286 #define RT5660_M_DACR_SM_SFT
287 #define RT5660_M_BST1_SM
288 #define RT5660_M_BST1_SM_SFT
289 #define RT5660_M_BST3_SM
290 #define RT5660_M_BST3_SM_SFT
291 #define RT5660_M_DACL_SM
292 #define RT5660_M_DACL_SM_SFT
293 #define RT5660_M_OM_L_SM
294 #define RT5660_M_OM_L_SM_SFT
295
296 /* SPOMIX Control (0x48) */
297 #define RT5660_M_DAC_R_SPM
298 #define RT5660_M_DAC_R_SPM_SFT
299 #define RT5660_M_DAC_L_SPM
300 #define RT5660_M_DAC_L_SPM_SFT
301 #define RT5660_M_SV_SPM
302 #define RT5660_M_SV_SPM_SFT
303 #define RT5660_M_BST1_SPM
304 #define RT5660_M_BST1_SPM_SFT
305
306 /* Output Left Mixer Control 1 (0x4d) */
307 #define RT5660_G_BST3_OM_L_MASK
308 #define RT5660_G_BST3_OM_L_SFT
309 #define RT5660_G_BST2_OM_L_MASK
310 #define RT5660_G_BST2_OM_L_SFT
311 #define RT5660_G_BST1_OM_L_MASK
312 #define RT5660_G_BST1_OM_L_SFT
313 #define RT5660_G_RM_L_OM_L_MASK
314 #define RT5660_G_RM_L_OM_L_SFT
315
316 /* Output Left Mixer Control 2 (0x4e) */
317 #define RT5660_G_DAC_R1_OM_L_MASK
318 #define RT5660_G_DAC_R1_OM_L_SFT
319 #define RT5660_G_DAC_L1_OM_L_MASK
320 #define RT5660_G_DAC_L1_OM_L_SFT
321
322 /* Output Left Mixer Control 3 (0x4f) */
323 #define RT5660_M_BST3_OM_L
324 #define RT5660_M_BST3_OM_L_SFT
325 #define RT5660_M_BST2_OM_L
326 #define RT5660_M_BST2_OM_L_SFT
327 #define RT5660_M_BST1_OM_L
328 #define RT5660_M_BST1_OM_L_SFT
329 #define RT5660_M_RM_L_OM_L
330 #define RT5660_M_RM_L_OM_L_SFT
331 #define RT5660_M_DAC_R_OM_L
332 #define RT5660_M_DAC_R_OM_L_SFT
333 #define RT5660_M_DAC_L_OM_L
334 #define RT5660_M_DAC_L_OM_L_SFT
335
336 /* Output Right Mixer Control 1 (0x50) */
337 #define RT5660_G_BST2_OM_R_MASK
338 #define RT5660_G_BST2_OM_R_SFT
339 #define RT5660_G_BST1_OM_R_MASK
340 #define RT5660_G_BST1_OM_R_SFT
341 #define RT5660_G_RM_R_OM_R_MASK
342 #define RT5660_G_RM_R_OM_R_SFT
343
344 /* Output Right Mixer Control 2 (0x51) */
345 #define RT5660_G_DAC_L_OM_R_MASK
346 #define RT5660_G_DAC_L_OM_R_SFT
347 #define RT5660_G_DAC_R_OM_R_MASK
348 #define RT5660_G_DAC_R_OM_R_SFT
349
350 /* Output Right Mixer Control 3 (0x52) */
351 #define RT5660_M_BST2_OM_R
352 #define RT5660_M_BST2_OM_R_SFT
353 #define RT5660_M_BST1_OM_R
354 #define RT5660_M_BST1_OM_R_SFT
355 #define RT5660_M_RM_R_OM_R
356 #define RT5660_M_RM_R_OM_R_SFT
357 #define RT5660_M_DAC_L_OM_R
358 #define RT5660_M_DAC_L_OM_R_SFT
359 #define RT5660_M_DAC_R_OM_R
360 #define RT5660_M_DAC_R_OM_R_SFT
361
362 /* Power Management for Digital 1 (0x61) */
363 #define RT5660_PWR_I2S1
364 #define RT5660_PWR_I2S1_BIT
365 #define RT5660_PWR_DAC_L1
366 #define RT5660_PWR_DAC_L1_BIT
367 #define RT5660_PWR_DAC_R1
368 #define RT5660_PWR_DAC_R1_BIT
369 #define RT5660_PWR_ADC_L
370 #define RT5660_PWR_ADC_L_BIT
371 #define RT5660_PWR_ADC_R
372 #define RT5660_PWR_ADC_R_BIT
373 #define RT5660_PWR_CLS_D
374 #define RT5660_PWR_CLS_D_BIT
375
376 /* Power Management for Digital 2 (0x62) */
377 #define RT5660_PWR_ADC_S1F
378 #define RT5660_PWR_ADC_S1F_BIT
379 #define RT5660_PWR_DAC_S1F
380 #define RT5660_PWR_DAC_S1F_BIT
381
382 /* Power Management for Analog 1 (0x63) */
383 #define RT5660_PWR_VREF1
384 #define RT5660_PWR_VREF1_BIT
385 #define RT5660_PWR_FV1
386 #define RT5660_PWR_FV1_BIT
387 #define RT5660_PWR_MB
388 #define RT5660_PWR_MB_BIT
389 #define RT5660_PWR_BG
390 #define RT5660_PWR_BG_BIT
391 #define RT5660_PWR_HP_L
392 #define RT5660_PWR_HP_L_BIT
393 #define RT5660_PWR_HP_R
394 #define RT5660_PWR_HP_R_BIT
395 #define RT5660_PWR_HA
396 #define RT5660_PWR_HA_BIT
397 #define RT5660_PWR_VREF2
398 #define RT5660_PWR_VREF2_BIT
399 #define RT5660_PWR_FV2
400 #define RT5660_PWR_FV2_BIT
401 #define RT5660_PWR_LDO2
402 #define RT5660_PWR_LDO2_BIT
403
404 /* Power Management for Analog 2 (0x64) */
405 #define RT5660_PWR_BST1
406 #define RT5660_PWR_BST1_BIT
407 #define RT5660_PWR_BST2
408 #define RT5660_PWR_BST2_BIT
409 #define RT5660_PWR_BST3
410 #define RT5660_PWR_BST3_BIT
411 #define RT5660_PWR_MB1
412 #define RT5660_PWR_MB1_BIT
413 #define RT5660_PWR_MB2
414 #define RT5660_PWR_MB2_BIT
415 #define RT5660_PWR_PLL
416 #define RT5660_PWR_PLL_BIT
417
418 /* Power Management for Mixer (0x65) */
419 #define RT5660_PWR_OM_L
420 #define RT5660_PWR_OM_L_BIT
421 #define RT5660_PWR_OM_R
422 #define RT5660_PWR_OM_R_BIT
423 #define RT5660_PWR_SM
424 #define RT5660_PWR_SM_BIT
425 #define RT5660_PWR_RM_L
426 #define RT5660_PWR_RM_L_BIT
427 #define RT5660_PWR_RM_R
428 #define RT5660_PWR_RM_R_BIT
429
430 /* Power Management for Volume (0x66) */
431 #define RT5660_PWR_SV
432 #define RT5660_PWR_SV_BIT
433 #define RT5660_PWR_LV_L
434 #define RT5660_PWR_LV_L_BIT
435 #define RT5660_PWR_LV_R
436 #define RT5660_PWR_LV_R_BIT
437
438 /* I2S1 Audio Serial Data Port Control (0x70)
439 #define RT5660_I2S_MS_MASK
440 #define RT5660_I2S_MS_SFT
441 #define RT5660_I2S_MS_M
442 #define RT5660_I2S_MS_S
443 #define RT5660_I2S_O_CP_MASK
444 #define RT5660_I2S_O_CP_SFT
445 #define RT5660_I2S_O_CP_OFF
446 #define RT5660_I2S_O_CP_U_LAW
447 #define RT5660_I2S_O_CP_A_LAW
448 #define RT5660_I2S_I_CP_MASK
449 #define RT5660_I2S_I_CP_SFT
450 #define RT5660_I2S_I_CP_OFF
451 #define RT5660_I2S_I_CP_U_LAW
452 #define RT5660_I2S_I_CP_A_LAW
453 #define RT5660_I2S_BP_MASK
454 #define RT5660_I2S_BP_SFT
455 #define RT5660_I2S_BP_NOR
456 #define RT5660_I2S_BP_INV
457 #define RT5660_I2S_DL_MASK
458 #define RT5660_I2S_DL_SFT
459 #define RT5660_I2S_DL_16
460 #define RT5660_I2S_DL_20
461 #define RT5660_I2S_DL_24
462 #define RT5660_I2S_DL_8
463 #define RT5660_I2S_DF_MASK
464 #define RT5660_I2S_DF_SFT
465 #define RT5660_I2S_DF_I2S
466 #define RT5660_I2S_DF_LEFT
467 #define RT5660_I2S_DF_PCM_A
468 #define RT5660_I2S_DF_PCM_B
469
470 /* ADC/DAC Clock Control 1 (0x73) */
471 #define RT5660_I2S_BCLK_MS1_MASK
472 #define RT5660_I2S_BCLK_MS1_SFT
473 #define RT5660_I2S_BCLK_MS1_32
474 #define RT5660_I2S_BCLK_MS1_64
475 #define RT5660_I2S_PD1_MASK
476 #define RT5660_I2S_PD1_SFT
477 #define RT5660_I2S_PD1_1
478 #define RT5660_I2S_PD1_2
479 #define RT5660_I2S_PD1_3
480 #define RT5660_I2S_PD1_4
481 #define RT5660_I2S_PD1_6
482 #define RT5660_I2S_PD1_8
483 #define RT5660_I2S_PD1_12
484 #define RT5660_I2S_PD1_16
485 #define RT5660_DAC_OSR_MASK
486 #define RT5660_DAC_OSR_SFT
487 #define RT5660_DAC_OSR_128
488 #define RT5660_DAC_OSR_64
489 #define RT5660_DAC_OSR_32
490 #define RT5660_DAC_OSR_16
491 #define RT5660_ADC_OSR_MASK
492 #define RT5660_ADC_OSR_SFT
493 #define RT5660_ADC_OSR_128
494 #define RT5660_ADC_OSR_64
495 #define RT5660_ADC_OSR_32
496 #define RT5660_ADC_OSR_16
497
498 /* ADC/DAC Clock Control 2 (0x74) */
499 #define RT5660_RESET_ADF
500 #define RT5660_RESET_ADF_SFT
501 #define RT5660_RESET_DAF
502 #define RT5660_RESET_DAF_SFT
503 #define RT5660_DAHPF_EN
504 #define RT5660_DAHPF_EN_SFT
505 #define RT5660_ADHPF_EN
506 #define RT5660_ADHPF_EN_SFT
507
508 /* Digital Microphone Control (0x75) */
509 #define RT5660_DMIC_1_EN_MASK
510 #define RT5660_DMIC_1_EN_SFT
511 #define RT5660_DMIC_1_DIS
512 #define RT5660_DMIC_1_EN
513 #define RT5660_DMIC_1L_LH_MASK
514 #define RT5660_DMIC_1L_LH_SFT
515 #define RT5660_DMIC_1L_LH_RISING
516 #define RT5660_DMIC_1L_LH_FALLING
517 #define RT5660_DMIC_1R_LH_MASK
518 #define RT5660_DMIC_1R_LH_SFT
519 #define RT5660_DMIC_1R_LH_RISING
520 #define RT5660_DMIC_1R_LH_FALLING
521 #define RT5660_SEL_DMIC_DATA_MASK
522 #define RT5660_SEL_DMIC_DATA_SFT
523 #define RT5660_SEL_DMIC_DATA_GPIO2
524 #define RT5660_SEL_DMIC_DATA_IN1P
525 #define RT5660_DMIC_CLK_MASK
526 #define RT5660_DMIC_CLK_SFT
527
528 /* Global Clock Control (0x80) */
529 #define RT5660_SCLK_SRC_MASK
530 #define RT5660_SCLK_SRC_SFT
531 #define RT5660_SCLK_SRC_MCLK
532 #define RT5660_SCLK_SRC_PLL1
533 #define RT5660_SCLK_SRC_RCCLK
534 #define RT5660_PLL1_SRC_MASK
535 #define RT5660_PLL1_SRC_SFT
536 #define RT5660_PLL1_SRC_MCLK
537 #define RT5660_PLL1_SRC_BCLK1
538 #define RT5660_PLL1_SRC_RCCLK
539 #define RT5660_PLL1_PD_MASK
540 #define RT5660_PLL1_PD_SFT
541 #define RT5660_PLL1_PD_1
542 #define RT5660_PLL1_PD_2
543
544 #define RT5660_PLL_INP_MAX
545 #define RT5660_PLL_INP_MIN
546 /* PLL M/N/K Code Control 1 (0x81) */
547 #define RT5660_PLL_N_MAX
548 #define RT5660_PLL_N_MASK
549 #define RT5660_PLL_N_SFT
550 #define RT5660_PLL_K_MAX
551 #define RT5660_PLL_K_MASK
552 #define RT5660_PLL_K_SFT
553
554 /* PLL M/N/K Code Control 2 (0x82) */
555 #define RT5660_PLL_M_MAX
556 #define RT5660_PLL_M_MASK
557 #define RT5660_PLL_M_SFT
558 #define RT5660_PLL_M_BP
559 #define RT5660_PLL_M_BP_SFT
560
561 /* Class D Over Current Control (0x8c) */
562 #define RT5660_CLSD_OC_MASK
563 #define RT5660_CLSD_OC_SFT
564 #define RT5660_CLSD_OC_PU
565 #define RT5660_CLSD_OC_PD
566 #define RT5660_AUTO_PD_MASK
567 #define RT5660_AUTO_PD_SFT
568 #define RT5660_AUTO_PD_DIS
569 #define RT5660_AUTO_PD_EN
570 #define RT5660_CLSD_OC_TH_MASK
571 #define RT5660_CLSD_OC_TH_SFT
572
573 /* Class D Output Control (0x8d) */
574 #define RT5660_CLSD_RATIO_MASK
575 #define RT5660_CLSD_RATIO_SFT
576
577 /* Lout Amp Control 1 (0x8e) */
578 #define RT5660_LOUT_CO_MASK
579 #define RT5660_LOUT_CO_SFT
580 #define RT5660_LOUT_CO_DIS
581 #define RT5660_LOUT_CO_EN
582 #define RT5660_LOUT_CB_MASK
583 #define RT5660_LOUT_CB_SFT
584 #define RT5660_LOUT_CB_PD
585 #define RT5660_LOUT_CB_PU
586
587 /* SPKVDD detection control (0x92) */
588 #define RT5660_SPKVDD_DET_MASK
589 #define RT5660_SPKVDD_DET_SFT
590 #define RT5660_SPKVDD_DET_DIS
591 #define RT5660_SPKVDD_DET_EN
592 #define RT5660_SPK_AG_MASK
593 #define RT5660_SPK_AG_SFT
594 #define RT5660_SPK_AG_DIS
595 #define RT5660_SPK_AG_EN
596
597 /* Micbias Control (0x93) */
598 #define RT5660_MIC1_BS_MASK
599 #define RT5660_MIC1_BS_SFT
600 #define RT5660_MIC1_BS_9AV
601 #define RT5660_MIC1_BS_75AV
602 #define RT5660_MIC2_BS_MASK
603 #define RT5660_MIC2_BS_SFT
604 #define RT5660_MIC2_BS_9AV
605 #define RT5660_MIC2_BS_75AV
606 #define RT5660_MIC1_OVCD_MASK
607 #define RT5660_MIC1_OVCD_SFT
608 #define RT5660_MIC1_OVCD_DIS
609 #define RT5660_MIC1_OVCD_EN
610 #define RT5660_MIC1_OVTH_MASK
611 #define RT5660_MIC1_OVTH_SFT
612 #define RT5660_MIC1_OVTH_600UA
613 #define RT5660_MIC1_OVTH_1500UA
614 #define RT5660_MIC1_OVTH_2000UA
615 #define RT5660_MIC2_OVCD_MASK
616 #define RT5660_MIC2_OVCD_SFT
617 #define RT5660_MIC2_OVCD_DIS
618 #define RT5660_MIC2_OVCD_EN
619 #define RT5660_MIC2_OVTH_MASK
620 #define RT5660_MIC2_OVTH_SFT
621 #define RT5660_MIC2_OVTH_600UA
622 #define RT5660_MIC2_OVTH_1500UA
623 #define RT5660_MIC2_OVTH_2000UA
624 #define RT5660_PWR_CLK25M_MASK
625 #define RT5660_PWR_CLK25M_SFT
626 #define RT5660_PWR_CLK25M_PD
627 #define RT5660_PWR_CLK25M_PU
628
629 /* EQ Control 1 (0xb0) */
630 #define RT5660_EQ_SRC_MASK
631 #define RT5660_EQ_SRC_SFT
632 #define RT5660_EQ_SRC_DAC
633 #define RT5660_EQ_SRC_ADC
634 #define RT5660_EQ_UPD
635 #define RT5660_EQ_UPD_BIT
636
637 /* Jack Detect Control (0xbb) */
638 #define RT5660_JD_MASK
639 #define RT5660_JD_SFT
640 #define RT5660_JD_DIS
641 #define RT5660_JD_GPIO1
642 #define RT5660_JD_GPIO2
643 #define RT5660_JD_LOUT_MASK
644 #define RT5660_JD_LOUT_SFT
645 #define RT5660_JD_LOUT_DIS
646 #define RT5660_JD_LOUT_EN
647 #define RT5660_JD_LOUT_TRG_MASK
648 #define RT5660_JD_LOUT_TRG_SFT
649 #define RT5660_JD_LOUT_TRG_LO
650 #define RT5660_JD_LOUT_TRG_HI
651 #define RT5660_JD_SPO_MASK
652 #define RT5660_JD_SPO_SFT
653 #define RT5660_JD_SPO_DIS
654 #define RT5660_JD_SPO_EN
655 #define RT5660_JD_SPO_TRG_MASK
656 #define RT5660_JD_SPO_TRG_SFT
657 #define RT5660_JD_SPO_TRG_LO
658 #define RT5660_JD_SPO_TRG_HI
659
660 /* IRQ Control 1 (0xbd) */
661 #define RT5660_IRQ_JD_MASK
662 #define RT5660_IRQ_JD_SFT
663 #define RT5660_IRQ_JD_BP
664 #define RT5660_IRQ_JD_NOR
665 #define RT5660_IRQ_OT_MASK
666 #define RT5660_IRQ_OT_SFT
667 #define RT5660_IRQ_OT_BP
668 #define RT5660_IRQ_OT_NOR
669 #define RT5660_JD_STKY_MASK
670 #define RT5660_JD_STKY_SFT
671 #define RT5660_JD_STKY_DIS
672 #define RT5660_JD_STKY_EN
673 #define RT5660_OT_STKY_MASK
674 #define RT5660_OT_STKY_SFT
675 #define RT5660_OT_STKY_DIS
676 #define RT5660_OT_STKY_EN
677 #define RT5660_JD_P_MASK
678 #define RT5660_JD_P_SFT
679 #define RT5660_JD_P_NOR
680 #define RT5660_JD_P_INV
681 #define RT5660_OT_P_MASK
682 #define RT5660_OT_P_SFT
683 #define RT5660_OT_P_NOR
684 #define RT5660_OT_P_INV
685
686 /* IRQ Control 2 (0xbe) */
687 #define RT5660_IRQ_MB1_OC_MASK
688 #define RT5660_IRQ_MB1_OC_SFT
689 #define RT5660_IRQ_MB1_OC_BP
690 #define RT5660_IRQ_MB1_OC_NOR
691 #define RT5660_IRQ_MB2_OC_MASK
692 #define RT5660_IRQ_MB2_OC_SFT
693 #define RT5660_IRQ_MB2_OC_BP
694 #define RT5660_IRQ_MB2_OC_NOR
695 #define RT5660_MB1_OC_STKY_MASK
696 #define RT5660_MB1_OC_STKY_SFT
697 #define RT5660_MB1_OC_STKY_DIS
698 #define RT5660_MB1_OC_STKY_EN
699 #define RT5660_MB2_OC_STKY_MASK
700 #define RT5660_MB2_OC_STKY_SFT
701 #define RT5660_MB2_OC_STKY_DIS
702 #define RT5660_MB2_OC_STKY_EN
703 #define RT5660_MB1_OC_P_MASK
704 #define RT5660_MB1_OC_P_SFT
705 #define RT5660_MB1_OC_P_NOR
706 #define RT5660_MB1_OC_P_INV
707 #define RT5660_MB2_OC_P_MASK
708 #define RT5660_MB2_OC_P_SFT
709 #define RT5660_MB2_OC_P_NOR
710 #define RT5660_MB2_OC_P_INV
711 #define RT5660_MB1_OC_CLR
712 #define RT5660_MB1_OC_CLR_SFT
713 #define RT5660_MB2_OC_CLR
714 #define RT5660_MB2_OC_CLR_SFT
715
716 /* GPIO Control 1 (0xc0) */
717 #define RT5660_GP2_PIN_MASK
718 #define RT5660_GP2_PIN_SFT
719 #define RT5660_GP2_PIN_GPIO2
720 #define RT5660_GP2_PIN_DMIC1_SDA
721 #define RT5660_GP1_PIN_MASK
722 #define RT5660_GP1_PIN_SFT
723 #define RT5660_GP1_PIN_GPIO1
724 #define RT5660_GP1_PIN_DMIC1_SCL
725 #define RT5660_GP1_PIN_IRQ
726 #define RT5660_GPIO_M_MASK
727 #define RT5660_GPIO_M_SFT
728 #define RT5660_GPIO_M_FLT
729 #define RT5660_GPIO_M_PH
730
731 /* GPIO Control 3 (0xc2) */
732 #define RT5660_GP2_PF_MASK
733 #define RT5660_GP2_PF_SFT
734 #define RT5660_GP2_PF_IN
735 #define RT5660_GP2_PF_OUT
736 #define RT5660_GP2_OUT_MASK
737 #define RT5660_GP2_OUT_SFT
738 #define RT5660_GP2_OUT_LO
739 #define RT5660_GP2_OUT_HI
740 #define RT5660_GP2_P_MASK
741 #define RT5660_GP2_P_SFT
742 #define RT5660_GP2_P_NOR
743 #define RT5660_GP2_P_INV
744 #define RT5660_GP1_PF_MASK
745 #define RT5660_GP1_PF_SFT
746 #define RT5660_GP1_PF_IN
747 #define RT5660_GP1_PF_OUT
748 #define RT5660_GP1_OUT_MASK
749 #define RT5660_GP1_OUT_SFT
750 #define RT5660_GP1_OUT_LO
751 #define RT5660_GP1_OUT_HI
752 #define RT5660_GP1_P_MASK
753 #define RT5660_GP1_P_SFT
754 #define RT5660_GP1_P_NOR
755 #define RT5660_GP1_P_INV
756
757 /* Soft volume and zero cross control 1 (0xd9)
758 #define RT5660_SV_MASK
759 #define RT5660_SV_SFT
760 #define RT5660_SV_DIS
761 #define RT5660_SV_EN
762 #define RT5660_SPO_SV_MASK
763 #define RT5660_SPO_SV_SFT
764 #define RT5660_SPO_SV_DIS
765 #define RT5660_SPO_SV_EN
766 #define RT5660_OUT_SV_MASK
767 #define RT5660_OUT_SV_SFT
768 #define RT5660_OUT_SV_DIS
769 #define RT5660_OUT_SV_EN
770 #define RT5660_ZCD_DIG_MASK
771 #define RT5660_ZCD_DIG_SFT
772 #define RT5660_ZCD_DIG_DIS
773 #define RT5660_ZCD_DIG_EN
774 #define RT5660_ZCD_MASK
775 #define RT5660_ZCD_SFT
776 #define RT5660_ZCD_PD
777 #define RT5660_ZCD_PU
778 #define RT5660_SV_DLY_MASK
779 #define RT5660_SV_DLY_SFT
780
781 /* Soft volume and zero cross control 2 (0xda)
782 #define RT5660_ZCD_SPO_MASK
783 #define RT5660_ZCD_SPO_SFT
784 #define RT5660_ZCD_SPO_DIS
785 #define RT5660_ZCD_SPO_EN
786 #define RT5660_ZCD_OMR_MASK
787 #define RT5660_ZCD_OMR_SFT
788 #define RT5660_ZCD_OMR_DIS
789 #define RT5660_ZCD_OMR_EN
790 #define RT5660_ZCD_OML_MASK
791 #define RT5660_ZCD_OML_SFT
792 #define RT5660_ZCD_OML_DIS
793 #define RT5660_ZCD_OML_EN
794 #define RT5660_ZCD_SPM_MASK
795 #define RT5660_ZCD_SPM_SFT
796 #define RT5660_ZCD_SPM_DIS
797 #define RT5660_ZCD_SPM_EN
798 #define RT5660_ZCD_RMR_MASK
799 #define RT5660_ZCD_RMR_SFT
800 #define RT5660_ZCD_RMR_DIS
801 #define RT5660_ZCD_RMR_EN
802 #define RT5660_ZCD_RML_MASK
803 #define RT5660_ZCD_RML_SFT
804 #define RT5660_ZCD_RML_DIS
805 #define RT5660_ZCD_RML_EN
806
807 /* General Control 1 (0xfa) */
808 #define RT5660_PWR_VREF_HP
809 #define RT5660_PWR_VREF_HP_SFT
810 #define RT5660_AUTO_DIS_AMP
811 #define RT5660_MCLK_DET
812 #define RT5660_POW_CLKDET
813 #define RT5660_DIG_GATE_CTRL
814 #define RT5660_DIG_GATE_CTRL_SFT
815
816 /* System Clock Source */
817 #define RT5660_SCLK_S_MCLK
818 #define RT5660_SCLK_S_PLL1
819 #define RT5660_SCLK_S_RCCLK
820
821 /* PLL1 Source */
822 #define RT5660_PLL1_S_MCLK
823 #define RT5660_PLL1_S_BCLK
824
825 enum {
826 RT5660_AIF1,
827 RT5660_AIFS,
828 };
829
830 struct rt5660_priv {
831 struct snd_soc_component *component;
832 struct rt5660_platform_data pdata;
833 struct regmap *regmap;
834 struct clk *mclk;
835
836 int sysclk;
837 int sysclk_src;
838 int lrck[RT5660_AIFS];
839 int bclk[RT5660_AIFS];
840 int master[RT5660_AIFS];
841
842 int pll_src;
843 int pll_in;
844 int pll_out;
845 };
846
847 #endif
848
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