1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * rt711-sdw-sdca.h -- RT711 SDCA ALSA SoC aud 3 * rt711-sdw-sdca.h -- RT711 SDCA ALSA SoC audio driver header
4 * 4 *
5 * Copyright(c) 2021 Realtek Semiconductor Cor 5 * Copyright(c) 2021 Realtek Semiconductor Corp.
6 */ 6 */
7 7
8 #ifndef __RT711_SDW_SDCA_H__ 8 #ifndef __RT711_SDW_SDCA_H__
9 #define __RT711_SDW_SDCA_H__ 9 #define __RT711_SDW_SDCA_H__
10 10
11 #include <linux/regmap.h> 11 #include <linux/regmap.h>
12 #include <linux/soundwire/sdw_registers.h> 12 #include <linux/soundwire/sdw_registers.h>
13 13
14 static const struct reg_default rt711_sdca_reg 14 static const struct reg_default rt711_sdca_reg_defaults[] = {
15 { 0x201a, 0x00 }, 15 { 0x201a, 0x00 },
16 { 0x201e, 0x00 }, 16 { 0x201e, 0x00 },
17 { 0x201f, 0x00 }, 17 { 0x201f, 0x00 },
18 { 0x2020, 0x00 }, 18 { 0x2020, 0x00 },
19 { 0x2021, 0x00 }, 19 { 0x2021, 0x00 },
20 { 0x2022, 0x00 }, 20 { 0x2022, 0x00 },
21 { 0x2023, 0x00 }, 21 { 0x2023, 0x00 },
22 { 0x2024, 0x00 }, 22 { 0x2024, 0x00 },
23 { 0x2025, 0x01 }, 23 { 0x2025, 0x01 },
24 { 0x2026, 0x00 }, 24 { 0x2026, 0x00 },
25 { 0x2027, 0x00 }, 25 { 0x2027, 0x00 },
26 { 0x2029, 0x00 }, 26 { 0x2029, 0x00 },
27 { 0x202a, 0x00 }, 27 { 0x202a, 0x00 },
28 { 0x202d, 0x00 }, 28 { 0x202d, 0x00 },
29 { 0x202e, 0x00 }, 29 { 0x202e, 0x00 },
30 { 0x202f, 0x00 }, 30 { 0x202f, 0x00 },
31 { 0x2030, 0x00 }, 31 { 0x2030, 0x00 },
32 { 0x2031, 0x00 }, 32 { 0x2031, 0x00 },
33 { 0x2032, 0x00 }, 33 { 0x2032, 0x00 },
34 { 0x2033, 0x00 }, 34 { 0x2033, 0x00 },
35 { 0x2230, 0x00 }, 35 { 0x2230, 0x00 },
36 { 0x2231, 0x2f }, 36 { 0x2231, 0x2f },
37 { 0x2232, 0x80 }, 37 { 0x2232, 0x80 },
38 { 0x2233, 0x00 }, 38 { 0x2233, 0x00 },
39 { 0x2234, 0x00 }, 39 { 0x2234, 0x00 },
40 { 0x2235, 0x00 }, 40 { 0x2235, 0x00 },
41 { 0x2236, 0x00 }, 41 { 0x2236, 0x00 },
42 { 0x2237, 0x00 }, 42 { 0x2237, 0x00 },
43 { 0x2238, 0x00 }, 43 { 0x2238, 0x00 },
44 { 0x2239, 0x00 }, 44 { 0x2239, 0x00 },
45 { 0x2f01, 0x00 }, 45 { 0x2f01, 0x00 },
46 { 0x2f02, 0x09 }, 46 { 0x2f02, 0x09 },
47 { 0x2f03, 0x00 }, 47 { 0x2f03, 0x00 },
48 { 0x2f04, 0x00 }, 48 { 0x2f04, 0x00 },
49 { 0x2f05, 0x0b }, 49 { 0x2f05, 0x0b },
50 { 0x2f06, 0x01 }, 50 { 0x2f06, 0x01 },
51 { 0x2f08, 0x00 }, 51 { 0x2f08, 0x00 },
52 { 0x2f09, 0x00 }, 52 { 0x2f09, 0x00 },
53 { 0x2f0a, 0x00 }, 53 { 0x2f0a, 0x00 },
54 { 0x2f0b, 0x00 }, 54 { 0x2f0b, 0x00 },
55 { 0x2f0c, 0x00 }, 55 { 0x2f0c, 0x00 },
56 { 0x2f0d, 0x00 }, 56 { 0x2f0d, 0x00 },
57 { 0x2f0e, 0x14 }, 57 { 0x2f0e, 0x14 },
58 { 0x2f0f, 0x00 }, 58 { 0x2f0f, 0x00 },
59 { 0x2f50, 0x03 }, 59 { 0x2f50, 0x03 },
60 { 0x2f5a, 0x00 }, 60 { 0x2f5a, 0x00 },
61 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 61 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_CS01, RT711_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
62 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 62 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
63 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 63 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
64 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 64 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
65 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 65 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
66 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 66 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_PDE28, RT711_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
67 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT7 67 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
68 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT7 68 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
69 }; 69 };
70 70
71 static const struct reg_default rt711_sdca_mbq 71 static const struct reg_default rt711_sdca_mbq_defaults[] = {
72 { 0x2000009, 0x1029 }, 72 { 0x2000009, 0x1029 },
73 { 0x2000011, 0x007a }, 73 { 0x2000011, 0x007a },
74 { 0x200001a, 0x8003 }, 74 { 0x200001a, 0x8003 },
75 { 0x2000045, 0x5289 }, 75 { 0x2000045, 0x5289 },
76 { 0x2000048, 0x8049 }, 76 { 0x2000048, 0x8049 },
77 { 0x200004a, 0xa83b }, 77 { 0x200004a, 0xa83b },
78 { 0x200006b, 0x5064 }, 78 { 0x200006b, 0x5064 },
79 { 0x200006f, 0x058b }, 79 { 0x200006f, 0x058b },
80 { 0x5800000, 0x0008 }, 80 { 0x5800000, 0x0008 },
81 { 0x5800001, 0x0000 }, 81 { 0x5800001, 0x0000 },
82 { 0x5f00001, 0x000a }, 82 { 0x5f00001, 0x000a },
83 { 0x6100000, 0x6100 }, 83 { 0x6100000, 0x6100 },
84 { 0x6100035, 0x0060 }, 84 { 0x6100035, 0x0060 },
85 { 0x6100036, 0x0029 }, 85 { 0x6100036, 0x0029 },
86 { 0x610003f, 0xff12 }, 86 { 0x610003f, 0xff12 },
87 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 87 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
88 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 88 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
89 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT7 89 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
90 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT7 90 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
91 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 91 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
92 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 92 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
93 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 93 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_PLATFORM_FU44, RT711_SDCA_CTL_FU_CH_GAIN, CH_L), 0x00 },
94 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT 94 { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_PLATFORM_FU44, RT711_SDCA_CTL_FU_CH_GAIN, CH_R), 0x00 },
95 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT7 95 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_PLATFORM_FU15, RT711_SDCA_CTL_FU_CH_GAIN, CH_L), 0x00 },
96 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT7 96 { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_PLATFORM_FU15, RT711_SDCA_CTL_FU_CH_GAIN, CH_R), 0x00 },
97 }; 97 };
98 98
99 #endif /* __RT711_SDW_SDCA_H__ */ 99 #endif /* __RT711_SDW_SDCA_H__ */
100 100
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