1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1
2 /*
3 * File: sound/soc/codecs/ssm2602.h
4 * Author: Cliff Cai <Cliff.Cai@analog.c
5 *
6 * Created: Tue June 06 2008
7 *
8 * Modified:
9 * Copyright 2008 Analog Devices
10 *
11 * Bugs: Enter bugs at http://blackfin
12 */
13
14 #ifndef _SSM2602_H
15 #define _SSM2602_H
16
17 #include <linux/regmap.h>
18
19 struct device;
20
21 enum ssm2602_type {
22 SSM2602,
23 SSM2604,
24 };
25
26 extern const struct regmap_config ssm2602_regm
27
28 int ssm2602_probe(struct device *dev, enum ssm
29 struct regmap *regmap);
30
31 /* SSM2602 Codec Register definitions */
32
33 #define SSM2602_LINVOL 0x00
34 #define SSM2602_RINVOL 0x01
35 #define SSM2602_LOUT1V 0x02
36 #define SSM2602_ROUT1V 0x03
37 #define SSM2602_APANA 0x04
38 #define SSM2602_APDIGI 0x05
39 #define SSM2602_PWR 0x06
40 #define SSM2602_IFACE 0x07
41 #define SSM2602_SRATE 0x08
42 #define SSM2602_ACTIVE 0x09
43 #define SSM2602_RESET 0x0f
44
45 /*SSM2602 Codec Register Field definitions
46 *(Mask value to extract the corresponding Reg
47 */
48
49 /*Left ADC Volume Control (SSM2602_REG_LEFT_AD
50 #define LINVOL_LIN_VOL 0x01
51 #define LINVOL_LIN_ENABLE_MUTE 0x08
52 #define LINVOL_LRIN_BOTH 0x10
53
54 /*Right ADC Volume Control (SSM2602_REG_RIGHT_
55 #define RINVOL_RIN_VOL 0x01
56 #define RINVOL_RIN_ENABLE_MUTE 0x08
57 #define RINVOL_RLIN_BOTH 0x10
58
59 /*Left DAC Volume Control (SSM2602_REG_LEFT_DA
60 #define LOUT1V_LHP_VOL 0x07
61 #define LOUT1V_ENABLE_LZC 0x08
62 #define LOUT1V_LRHP_BOTH 0x10
63
64 /*Right DAC Volume Control (SSM2602_REG_RIGHT_
65 #define ROUT1V_RHP_VOL 0x07
66 #define ROUT1V_ENABLE_RZC 0x08
67 #define ROUT1V_RLHP_BOTH 0x10
68
69 /*Analogue Audio Path Control (SSM2602_REG_ANA
70 #define APANA_ENABLE_MIC_BOOST 0x001
71 #define APANA_ENABLE_MIC_MUTE 0x002
72 #define APANA_ADC_IN_SELECT 0x004
73 #define APANA_ENABLE_BYPASS 0x008
74 #define APANA_SELECT_DAC 0x010
75 #define APANA_ENABLE_SIDETONE 0x020
76 #define APANA_SIDETONE_ATTN 0x0C0
77 #define APANA_ENABLE_MIC_BOOST2 0x100
78
79 /*Digital Audio Path Control (SSM2602_REG_DIGI
80 #define APDIGI_ENABLE_ADC_HPF 0x00
81 #define APDIGI_DE_EMPHASIS 0x00
82 #define APDIGI_ENABLE_DAC_MUTE 0x00
83 #define APDIGI_STORE_OFFSET 0x01
84
85 /*Power Down Control (SSM2602_REG_POWER)
86 *(1=Enable PowerDown, 0=Disable PowerDown)
87 */
88 #define PWR_LINE_IN_PDN 0x001
89 #define PWR_MIC_PDN 0x002
90 #define PWR_ADC_PDN 0x004
91 #define PWR_DAC_PDN 0x008
92 #define PWR_OUT_PDN 0x010
93 #define PWR_OSC_PDN 0x020
94 #define PWR_CLK_OUT_PDN 0x040
95 #define PWR_POWER_OFF 0x080
96
97 /*Digital Audio Interface Format (SSM2602_REG_
98 #define IFACE_IFACE_FORMAT 0x003
99 #define IFACE_AUDIO_DATA_LEN 0x00C
100 #define IFACE_DAC_LR_POLARITY 0x010
101 #define IFACE_DAC_LR_SWAP 0x020
102 #define IFACE_ENABLE_MASTER 0x040
103 #define IFACE_BCLK_INVERT 0x080
104
105 /*Sampling Control (SSM2602_REG_SAMPLING_CTRL)
106 #define SRATE_ENABLE_USB_MODE 0x001
107 #define SRATE_BOS_RATE 0x002
108 #define SRATE_SAMPLE_RATE 0x03C
109 #define SRATE_CORECLK_DIV2 0x040
110 #define SRATE_CLKOUT_DIV2 0x080
111
112 /*Active Control (SSM2602_REG_ACTIVE_CTRL)*/
113 #define ACTIVE_ACTIVATE_CODEC 0x00
114
115 /*********************************************
116
117 #define SSM2602_CACHEREGNUM 10
118
119 enum ssm2602_clk {
120 SSM2602_SYSCLK,
121 SSM2602_CLK_CLKOUT,
122 SSM2602_CLK_XTO
123 };
124
125 #endif
126
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