1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 2 /* 3 * tas5720.h - ALSA SoC Texas Instruments TAS5 3 * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier 4 * 4 * 5 * Copyright (C)2015-2016 Texas Instruments In 5 * Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com 6 * 6 * 7 * Author: Andreas Dannenberg <dannenberg@ti.c 7 * Author: Andreas Dannenberg <dannenberg@ti.com> 8 */ 8 */ 9 9 10 #ifndef __TAS5720_H__ 10 #ifndef __TAS5720_H__ 11 #define __TAS5720_H__ 11 #define __TAS5720_H__ 12 12 13 /* Register Address Map - first 3 regs are com 13 /* Register Address Map - first 3 regs are common for all variants */ 14 #define TAS5720_DEVICE_ID_REG 0x00 14 #define TAS5720_DEVICE_ID_REG 0x00 15 #define TAS5720_POWER_CTRL_REG 0x01 15 #define TAS5720_POWER_CTRL_REG 0x01 16 #define TAS5720_DIGITAL_CTRL1_REG 0x02 16 #define TAS5720_DIGITAL_CTRL1_REG 0x02 17 #define TAS5720_DIGITAL_CTRL2_REG 0x03 17 #define TAS5720_DIGITAL_CTRL2_REG 0x03 18 #define TAS5720_VOLUME_CTRL_REG 0x04 18 #define TAS5720_VOLUME_CTRL_REG 0x04 19 #define TAS5720_ANALOG_CTRL_REG 0x06 19 #define TAS5720_ANALOG_CTRL_REG 0x06 20 #define TAS5720_FAULT_REG 0x08 20 #define TAS5720_FAULT_REG 0x08 21 #define TAS5720_DIGITAL_CLIP2_REG 0x10 21 #define TAS5720_DIGITAL_CLIP2_REG 0x10 22 #define TAS5720_DIGITAL_CLIP1_REG 0x11 22 #define TAS5720_DIGITAL_CLIP1_REG 0x11 23 #define TAS5720_MAX_REG TAS572 23 #define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG 24 24 25 /* Additional TAS5722-specific Registers */ 25 /* Additional TAS5722-specific Registers */ 26 #define TAS5722_DIGITAL_CTRL2_REG 0x13 26 #define TAS5722_DIGITAL_CTRL2_REG 0x13 27 #define TAS5722_ANALOG_CTRL2_REG 0x14 27 #define TAS5722_ANALOG_CTRL2_REG 0x14 28 #define TAS5722_MAX_REG TAS572 28 #define TAS5722_MAX_REG TAS5722_ANALOG_CTRL2_REG 29 29 30 /* Register Address Map - volume controls for 30 /* Register Address Map - volume controls for the TAS5720-Q1 variant */ 31 #define TAS5720_Q1_VOLUME_CTRL_CFG_REG 31 #define TAS5720_Q1_VOLUME_CTRL_CFG_REG 0x03 32 #define TAS5720_Q1_VOLUME_CTRL_LEFT_REG 32 #define TAS5720_Q1_VOLUME_CTRL_LEFT_REG 0x04 33 #define TAS5720_Q1_VOLUME_CTRL_RIGHT_REG 33 #define TAS5720_Q1_VOLUME_CTRL_RIGHT_REG 0x05 34 34 35 /* TAS5720_DEVICE_ID_REG */ 35 /* TAS5720_DEVICE_ID_REG */ 36 #define TAS5720A_Q1_DEVICE_ID 0x00 36 #define TAS5720A_Q1_DEVICE_ID 0x00 37 #define TAS5720_DEVICE_ID 0x01 37 #define TAS5720_DEVICE_ID 0x01 38 #define TAS5722_DEVICE_ID 0x12 38 #define TAS5722_DEVICE_ID 0x12 39 39 40 /* TAS5720_POWER_CTRL_REG */ 40 /* TAS5720_POWER_CTRL_REG */ 41 #define TAS5720_DIG_CLIP_MASK GENMAS 41 #define TAS5720_DIG_CLIP_MASK GENMASK(7, 2) 42 #define TAS5720_SLEEP BIT(1) 42 #define TAS5720_SLEEP BIT(1) 43 #define TAS5720_SDZ BIT(0) 43 #define TAS5720_SDZ BIT(0) 44 44 45 /* TAS5720_DIGITAL_CTRL1_REG */ 45 /* TAS5720_DIGITAL_CTRL1_REG */ 46 #define TAS5720_HPF_BYPASS BIT(7) 46 #define TAS5720_HPF_BYPASS BIT(7) 47 #define TAS5720_TDM_CFG_SRC BIT(6) 47 #define TAS5720_TDM_CFG_SRC BIT(6) 48 #define TAS5720_SSZ_DS BIT(3) 48 #define TAS5720_SSZ_DS BIT(3) 49 #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) 49 #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) 50 #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) 50 #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) 51 #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) 51 #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) 52 #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) 52 #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) 53 #define TAS5720_SAIF_I2S (0x4) 53 #define TAS5720_SAIF_I2S (0x4) 54 #define TAS5720_SAIF_LEFTJ (0x5) 54 #define TAS5720_SAIF_LEFTJ (0x5) 55 #define TAS5720_SAIF_FORMAT_MASK GENMAS 55 #define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0) 56 56 57 /* TAS5720_DIGITAL_CTRL2_REG */ 57 /* TAS5720_DIGITAL_CTRL2_REG */ 58 #define TAS5722_VOL_RAMP_RATE BIT(6) 58 #define TAS5722_VOL_RAMP_RATE BIT(6) 59 #define TAS5720_MUTE BIT(4) 59 #define TAS5720_MUTE BIT(4) 60 #define TAS5720_TDM_SLOT_SEL_MASK GENMAS 60 #define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0) 61 61 62 /* TAS5720_Q1_VOLUME_CTRL_CFG_REG */ 62 /* TAS5720_Q1_VOLUME_CTRL_CFG_REG */ 63 #define TAS5720_Q1_FADE BIT(7) 63 #define TAS5720_Q1_FADE BIT(7) 64 #define TAS5720_Q1_MUTE GENMAS 64 #define TAS5720_Q1_MUTE GENMASK(1, 0) 65 65 66 /* TAS5720_ANALOG_CTRL_REG */ 66 /* TAS5720_ANALOG_CTRL_REG */ 67 #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 < 67 #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4) 68 #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 < 68 #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4) 69 #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 < 69 #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4) 70 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 < 70 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4) 71 #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 < 71 #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4) 72 #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 < 72 #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4) 73 #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 < 73 #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4) 74 #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 < 74 #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4) 75 #define TAS5720_PWM_RATE_MASK GENMAS 75 #define TAS5720_PWM_RATE_MASK GENMASK(6, 4) 76 #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 < 76 #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2) 77 #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 < 77 #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2) 78 #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 < 78 #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2) 79 #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 < 79 #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2) 80 #define TAS5720_ANALOG_GAIN_MASK GENMAS 80 #define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2) 81 #define TAS5720_ANALOG_GAIN_SHIFT (0x2) 81 #define TAS5720_ANALOG_GAIN_SHIFT (0x2) 82 82 83 /* TAS5720_Q1_ANALOG_CTRL_REG */ 83 /* TAS5720_Q1_ANALOG_CTRL_REG */ 84 #define TAS5720_Q1_RESERVED7_BIT BIT(7) 84 #define TAS5720_Q1_RESERVED7_BIT BIT(7) 85 #define TAS5720_Q1_CHAN_SEL BIT(1) 85 #define TAS5720_Q1_CHAN_SEL BIT(1) 86 86 87 /* TAS5720_FAULT_REG */ 87 /* TAS5720_FAULT_REG */ 88 #define TAS5720_OC_THRESH_100PCT (0x0 < 88 #define TAS5720_OC_THRESH_100PCT (0x0 << 4) 89 #define TAS5720_OC_THRESH_75PCT (0x1 < 89 #define TAS5720_OC_THRESH_75PCT (0x1 << 4) 90 #define TAS5720_OC_THRESH_50PCT (0x2 < 90 #define TAS5720_OC_THRESH_50PCT (0x2 << 4) 91 #define TAS5720_OC_THRESH_25PCT (0x3 < 91 #define TAS5720_OC_THRESH_25PCT (0x3 << 4) 92 #define TAS5720_OC_THRESH_MASK GENMAS 92 #define TAS5720_OC_THRESH_MASK GENMASK(5, 4) 93 #define TAS5720_CLKE BIT(3) 93 #define TAS5720_CLKE BIT(3) 94 #define TAS5720_OCE BIT(2) 94 #define TAS5720_OCE BIT(2) 95 #define TAS5720_DCE BIT(1) 95 #define TAS5720_DCE BIT(1) 96 #define TAS5720_OTE BIT(0) 96 #define TAS5720_OTE BIT(0) 97 #define TAS5720_FAULT_MASK GENMAS 97 #define TAS5720_FAULT_MASK GENMASK(3, 0) 98 98 99 /* TAS5720_DIGITAL_CLIP1_REG */ 99 /* TAS5720_DIGITAL_CLIP1_REG */ 100 #define TAS5720_CLIP1_MASK GENMAS 100 #define TAS5720_CLIP1_MASK GENMASK(7, 2) 101 #define TAS5720_CLIP1_SHIFT (0x2) 101 #define TAS5720_CLIP1_SHIFT (0x2) 102 102 103 /* TAS5722_DIGITAL_CTRL2_REG */ 103 /* TAS5722_DIGITAL_CTRL2_REG */ 104 #define TAS5722_HPF_3_7HZ (0x0 < 104 #define TAS5722_HPF_3_7HZ (0x0 << 5) 105 #define TAS5722_HPF_7_4HZ (0x1 < 105 #define TAS5722_HPF_7_4HZ (0x1 << 5) 106 #define TAS5722_HPF_14_9HZ (0x2 < 106 #define TAS5722_HPF_14_9HZ (0x2 << 5) 107 #define TAS5722_HPF_29_7HZ (0x3 < 107 #define TAS5722_HPF_29_7HZ (0x3 << 5) 108 #define TAS5722_HPF_59_4HZ (0x4 < 108 #define TAS5722_HPF_59_4HZ (0x4 << 5) 109 #define TAS5722_HPF_118_4HZ (0x5 < 109 #define TAS5722_HPF_118_4HZ (0x5 << 5) 110 #define TAS5722_HPF_235_0HZ (0x6 < 110 #define TAS5722_HPF_235_0HZ (0x6 << 5) 111 #define TAS5722_HPF_463_2HZ (0x7 < 111 #define TAS5722_HPF_463_2HZ (0x7 << 5) 112 #define TAS5722_HPF_MASK GENMAS 112 #define TAS5722_HPF_MASK GENMASK(7, 5) 113 #define TAS5722_AUTO_SLEEP_OFF (0x0 < 113 #define TAS5722_AUTO_SLEEP_OFF (0x0 << 3) 114 #define TAS5722_AUTO_SLEEP_1024LR (0x1 < 114 #define TAS5722_AUTO_SLEEP_1024LR (0x1 << 3) 115 #define TAS5722_AUTO_SLEEP_65536LR (0x2 < 115 #define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3) 116 #define TAS5722_AUTO_SLEEP_262144LR (0x3 < 116 #define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3) 117 #define TAS5722_AUTO_SLEEP_MASK GENMAS 117 #define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3) 118 #define TAS5722_TDM_SLOT_16B BIT(2) 118 #define TAS5722_TDM_SLOT_16B BIT(2) 119 #define TAS5722_MCLK_PIN_CFG BIT(1) 119 #define TAS5722_MCLK_PIN_CFG BIT(1) 120 #define TAS5722_VOL_CONTROL_LSB BIT(0) 120 #define TAS5722_VOL_CONTROL_LSB BIT(0) 121 121 122 /* TAS5722_ANALOG_CTRL2_REG */ 122 /* TAS5722_ANALOG_CTRL2_REG */ 123 #define TAS5722_FAULTZ_PU BIT(3) 123 #define TAS5722_FAULTZ_PU BIT(3) 124 #define TAS5722_VREG_LVL BIT(2) 124 #define TAS5722_VREG_LVL BIT(2) 125 #define TAS5722_PWR_TUNE BIT(0) 125 #define TAS5722_PWR_TUNE BIT(0) 126 126 127 #endif /* __TAS5720_H__ */ 127 #endif /* __TAS5720_H__ */ 128 128
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