1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * tas5720.h - ALSA SoC Texas Instruments TAS5 2 * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier
4 * 3 *
5 * Copyright (C)2015-2016 Texas Instruments In !! 4 * Copyright (C)2015-2016 Texas Instruments Incorporated - http://www.ti.com
6 * 5 *
7 * Author: Andreas Dannenberg <dannenberg@ti.c 6 * Author: Andreas Dannenberg <dannenberg@ti.com>
>> 7 *
>> 8 * This program is free software; you can redistribute it and/or
>> 9 * modify it under the terms of the GNU General Public License
>> 10 * version 2 as published by the Free Software Foundation.
>> 11 *
>> 12 * This program is distributed in the hope that it will be useful, but
>> 13 * WITHOUT ANY WARRANTY; without even the implied warranty of
>> 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> 15 * General Public License for more details.
8 */ 16 */
9 17
10 #ifndef __TAS5720_H__ 18 #ifndef __TAS5720_H__
11 #define __TAS5720_H__ 19 #define __TAS5720_H__
12 20
13 /* Register Address Map - first 3 regs are com !! 21 /* Register Address Map */
14 #define TAS5720_DEVICE_ID_REG 0x00 22 #define TAS5720_DEVICE_ID_REG 0x00
15 #define TAS5720_POWER_CTRL_REG 0x01 23 #define TAS5720_POWER_CTRL_REG 0x01
16 #define TAS5720_DIGITAL_CTRL1_REG 0x02 24 #define TAS5720_DIGITAL_CTRL1_REG 0x02
17 #define TAS5720_DIGITAL_CTRL2_REG 0x03 25 #define TAS5720_DIGITAL_CTRL2_REG 0x03
18 #define TAS5720_VOLUME_CTRL_REG 0x04 26 #define TAS5720_VOLUME_CTRL_REG 0x04
19 #define TAS5720_ANALOG_CTRL_REG 0x06 27 #define TAS5720_ANALOG_CTRL_REG 0x06
20 #define TAS5720_FAULT_REG 0x08 28 #define TAS5720_FAULT_REG 0x08
21 #define TAS5720_DIGITAL_CLIP2_REG 0x10 29 #define TAS5720_DIGITAL_CLIP2_REG 0x10
22 #define TAS5720_DIGITAL_CLIP1_REG 0x11 30 #define TAS5720_DIGITAL_CLIP1_REG 0x11
23 #define TAS5720_MAX_REG TAS572 31 #define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG
24 32
25 /* Additional TAS5722-specific Registers */ <<
26 #define TAS5722_DIGITAL_CTRL2_REG 0x13 <<
27 #define TAS5722_ANALOG_CTRL2_REG 0x14 <<
28 #define TAS5722_MAX_REG TAS572 <<
29 <<
30 /* Register Address Map - volume controls for <<
31 #define TAS5720_Q1_VOLUME_CTRL_CFG_REG <<
32 #define TAS5720_Q1_VOLUME_CTRL_LEFT_REG <<
33 #define TAS5720_Q1_VOLUME_CTRL_RIGHT_REG <<
34 <<
35 /* TAS5720_DEVICE_ID_REG */ 33 /* TAS5720_DEVICE_ID_REG */
36 #define TAS5720A_Q1_DEVICE_ID 0x00 <<
37 #define TAS5720_DEVICE_ID 0x01 34 #define TAS5720_DEVICE_ID 0x01
38 #define TAS5722_DEVICE_ID 0x12 <<
39 35
40 /* TAS5720_POWER_CTRL_REG */ 36 /* TAS5720_POWER_CTRL_REG */
41 #define TAS5720_DIG_CLIP_MASK GENMAS 37 #define TAS5720_DIG_CLIP_MASK GENMASK(7, 2)
42 #define TAS5720_SLEEP BIT(1) 38 #define TAS5720_SLEEP BIT(1)
43 #define TAS5720_SDZ BIT(0) 39 #define TAS5720_SDZ BIT(0)
44 40
45 /* TAS5720_DIGITAL_CTRL1_REG */ 41 /* TAS5720_DIGITAL_CTRL1_REG */
46 #define TAS5720_HPF_BYPASS BIT(7) 42 #define TAS5720_HPF_BYPASS BIT(7)
47 #define TAS5720_TDM_CFG_SRC BIT(6) 43 #define TAS5720_TDM_CFG_SRC BIT(6)
48 #define TAS5720_SSZ_DS BIT(3) 44 #define TAS5720_SSZ_DS BIT(3)
49 #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) 45 #define TAS5720_SAIF_RIGHTJ_24BIT (0x0)
50 #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) 46 #define TAS5720_SAIF_RIGHTJ_20BIT (0x1)
51 #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) 47 #define TAS5720_SAIF_RIGHTJ_18BIT (0x2)
52 #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) 48 #define TAS5720_SAIF_RIGHTJ_16BIT (0x3)
53 #define TAS5720_SAIF_I2S (0x4) 49 #define TAS5720_SAIF_I2S (0x4)
54 #define TAS5720_SAIF_LEFTJ (0x5) 50 #define TAS5720_SAIF_LEFTJ (0x5)
55 #define TAS5720_SAIF_FORMAT_MASK GENMAS 51 #define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0)
56 52
57 /* TAS5720_DIGITAL_CTRL2_REG */ 53 /* TAS5720_DIGITAL_CTRL2_REG */
58 #define TAS5722_VOL_RAMP_RATE BIT(6) <<
59 #define TAS5720_MUTE BIT(4) 54 #define TAS5720_MUTE BIT(4)
60 #define TAS5720_TDM_SLOT_SEL_MASK GENMAS 55 #define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0)
61 56
62 /* TAS5720_Q1_VOLUME_CTRL_CFG_REG */ <<
63 #define TAS5720_Q1_FADE BIT(7) <<
64 #define TAS5720_Q1_MUTE GENMAS <<
65 <<
66 /* TAS5720_ANALOG_CTRL_REG */ 57 /* TAS5720_ANALOG_CTRL_REG */
67 #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 < 58 #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4)
68 #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 < 59 #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4)
69 #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 < 60 #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4)
70 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 < 61 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4)
71 #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 < 62 #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4)
72 #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 < 63 #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4)
73 #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 < 64 #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4)
74 #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 < 65 #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4)
75 #define TAS5720_PWM_RATE_MASK GENMAS 66 #define TAS5720_PWM_RATE_MASK GENMASK(6, 4)
76 #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 < 67 #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2)
77 #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 < 68 #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2)
78 #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 < 69 #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2)
79 #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 < 70 #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2)
80 #define TAS5720_ANALOG_GAIN_MASK GENMAS 71 #define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2)
81 #define TAS5720_ANALOG_GAIN_SHIFT (0x2) 72 #define TAS5720_ANALOG_GAIN_SHIFT (0x2)
82 73
83 /* TAS5720_Q1_ANALOG_CTRL_REG */ <<
84 #define TAS5720_Q1_RESERVED7_BIT BIT(7) <<
85 #define TAS5720_Q1_CHAN_SEL BIT(1) <<
86 <<
87 /* TAS5720_FAULT_REG */ 74 /* TAS5720_FAULT_REG */
88 #define TAS5720_OC_THRESH_100PCT (0x0 < 75 #define TAS5720_OC_THRESH_100PCT (0x0 << 4)
89 #define TAS5720_OC_THRESH_75PCT (0x1 < 76 #define TAS5720_OC_THRESH_75PCT (0x1 << 4)
90 #define TAS5720_OC_THRESH_50PCT (0x2 < 77 #define TAS5720_OC_THRESH_50PCT (0x2 << 4)
91 #define TAS5720_OC_THRESH_25PCT (0x3 < 78 #define TAS5720_OC_THRESH_25PCT (0x3 << 4)
92 #define TAS5720_OC_THRESH_MASK GENMAS 79 #define TAS5720_OC_THRESH_MASK GENMASK(5, 4)
93 #define TAS5720_CLKE BIT(3) 80 #define TAS5720_CLKE BIT(3)
94 #define TAS5720_OCE BIT(2) 81 #define TAS5720_OCE BIT(2)
95 #define TAS5720_DCE BIT(1) 82 #define TAS5720_DCE BIT(1)
96 #define TAS5720_OTE BIT(0) 83 #define TAS5720_OTE BIT(0)
97 #define TAS5720_FAULT_MASK GENMAS 84 #define TAS5720_FAULT_MASK GENMASK(3, 0)
98 85
99 /* TAS5720_DIGITAL_CLIP1_REG */ 86 /* TAS5720_DIGITAL_CLIP1_REG */
100 #define TAS5720_CLIP1_MASK GENMAS 87 #define TAS5720_CLIP1_MASK GENMASK(7, 2)
101 #define TAS5720_CLIP1_SHIFT (0x2) 88 #define TAS5720_CLIP1_SHIFT (0x2)
102 <<
103 /* TAS5722_DIGITAL_CTRL2_REG */ <<
104 #define TAS5722_HPF_3_7HZ (0x0 < <<
105 #define TAS5722_HPF_7_4HZ (0x1 < <<
106 #define TAS5722_HPF_14_9HZ (0x2 < <<
107 #define TAS5722_HPF_29_7HZ (0x3 < <<
108 #define TAS5722_HPF_59_4HZ (0x4 < <<
109 #define TAS5722_HPF_118_4HZ (0x5 < <<
110 #define TAS5722_HPF_235_0HZ (0x6 < <<
111 #define TAS5722_HPF_463_2HZ (0x7 < <<
112 #define TAS5722_HPF_MASK GENMAS <<
113 #define TAS5722_AUTO_SLEEP_OFF (0x0 < <<
114 #define TAS5722_AUTO_SLEEP_1024LR (0x1 < <<
115 #define TAS5722_AUTO_SLEEP_65536LR (0x2 < <<
116 #define TAS5722_AUTO_SLEEP_262144LR (0x3 < <<
117 #define TAS5722_AUTO_SLEEP_MASK GENMAS <<
118 #define TAS5722_TDM_SLOT_16B BIT(2) <<
119 #define TAS5722_MCLK_PIN_CFG BIT(1) <<
120 #define TAS5722_VOL_CONTROL_LSB BIT(0) <<
121 <<
122 /* TAS5722_ANALOG_CTRL2_REG */ <<
123 #define TAS5722_FAULTZ_PU BIT(3) <<
124 #define TAS5722_VREG_LVL BIT(2) <<
125 #define TAS5722_PWR_TUNE BIT(0) <<
126 89
127 #endif /* __TAS5720_H__ */ 90 #endif /* __TAS5720_H__ */
128 91
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