1 // SPDX-License-Identifier: GPL-2.0-only <<
2 /* 1 /*
3 * ALSA SoC WM9090 driver 2 * ALSA SoC WM9090 driver
4 * 3 *
5 * Copyright 2009-12 Wolfson Microelectronics 4 * Copyright 2009-12 Wolfson Microelectronics
6 * 5 *
7 * Author: Mark Brown <broonie@opensource.wolf 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
>> 7 *
>> 8 * This program is free software; you can redistribute it and/or
>> 9 * modify it under the terms of the GNU General Public License
>> 10 * version 2 as published by the Free Software Foundation.
>> 11 *
>> 12 * This program is distributed in the hope that it will be useful, but
>> 13 * WITHOUT ANY WARRANTY; without even the implied warranty of
>> 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> 15 * General Public License for more details.
>> 16 *
>> 17 * You should have received a copy of the GNU General Public License
>> 18 * along with this program; if not, write to the Free Software
>> 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
>> 20 * 02110-1301 USA
8 */ 21 */
9 22
10 #include <linux/module.h> 23 #include <linux/module.h>
11 #include <linux/errno.h> 24 #include <linux/errno.h>
12 #include <linux/device.h> 25 #include <linux/device.h>
13 #include <linux/i2c.h> 26 #include <linux/i2c.h>
14 #include <linux/delay.h> 27 #include <linux/delay.h>
15 #include <linux/regmap.h> 28 #include <linux/regmap.h>
16 #include <linux/slab.h> 29 #include <linux/slab.h>
17 #include <sound/initval.h> 30 #include <sound/initval.h>
18 #include <sound/soc.h> 31 #include <sound/soc.h>
19 #include <sound/tlv.h> 32 #include <sound/tlv.h>
20 #include <sound/wm9090.h> 33 #include <sound/wm9090.h>
21 34
22 #include "wm9090.h" 35 #include "wm9090.h"
23 36
24 static const struct reg_default wm9090_reg_def 37 static const struct reg_default wm9090_reg_defaults[] = {
25 { 1, 0x0006 }, /* R1 - Power Ma 38 { 1, 0x0006 }, /* R1 - Power Management (1) */
26 { 2, 0x6000 }, /* R2 - Power Ma 39 { 2, 0x6000 }, /* R2 - Power Management (2) */
27 { 3, 0x0000 }, /* R3 - Power Ma 40 { 3, 0x0000 }, /* R3 - Power Management (3) */
28 { 6, 0x01C0 }, /* R6 - Clocking 41 { 6, 0x01C0 }, /* R6 - Clocking 1 */
29 { 22, 0x0003 }, /* R22 - IN1 Line 42 { 22, 0x0003 }, /* R22 - IN1 Line Control */
30 { 23, 0x0003 }, /* R23 - IN2 Line 43 { 23, 0x0003 }, /* R23 - IN2 Line Control */
31 { 24, 0x0083 }, /* R24 - IN1 Line 44 { 24, 0x0083 }, /* R24 - IN1 Line Input A Volume */
32 { 25, 0x0083 }, /* R25 - IN1 Lin 45 { 25, 0x0083 }, /* R25 - IN1 Line Input B Volume */
33 { 26, 0x0083 }, /* R26 - IN2 Line 46 { 26, 0x0083 }, /* R26 - IN2 Line Input A Volume */
34 { 27, 0x0083 }, /* R27 - IN2 Line 47 { 27, 0x0083 }, /* R27 - IN2 Line Input B Volume */
35 { 28, 0x002D }, /* R28 - Left Out 48 { 28, 0x002D }, /* R28 - Left Output Volume */
36 { 29, 0x002D }, /* R29 - Right Ou 49 { 29, 0x002D }, /* R29 - Right Output Volume */
37 { 34, 0x0100 }, /* R34 - SPKMIXL 50 { 34, 0x0100 }, /* R34 - SPKMIXL Attenuation */
38 { 35, 0x0010 }, /* R36 - SPKOUT M 51 { 35, 0x0010 }, /* R36 - SPKOUT Mixers */
39 { 37, 0x0140 }, /* R37 - ClassD3 52 { 37, 0x0140 }, /* R37 - ClassD3 */
40 { 38, 0x0039 }, /* R38 - Speaker 53 { 38, 0x0039 }, /* R38 - Speaker Volume Left */
41 { 45, 0x0000 }, /* R45 - Output M 54 { 45, 0x0000 }, /* R45 - Output Mixer1 */
42 { 46, 0x0000 }, /* R46 - Output M 55 { 46, 0x0000 }, /* R46 - Output Mixer2 */
43 { 47, 0x0100 }, /* R47 - Output M 56 { 47, 0x0100 }, /* R47 - Output Mixer3 */
44 { 48, 0x0100 }, /* R48 - Output M 57 { 48, 0x0100 }, /* R48 - Output Mixer4 */
45 { 54, 0x0000 }, /* R54 - Speaker 58 { 54, 0x0000 }, /* R54 - Speaker Mixer */
46 { 57, 0x000D }, /* R57 - AntiPOP2 59 { 57, 0x000D }, /* R57 - AntiPOP2 */
47 { 70, 0x0000 }, /* R70 - Write Se 60 { 70, 0x0000 }, /* R70 - Write Sequencer 0 */
48 { 71, 0x0000 }, /* R71 - Write Se 61 { 71, 0x0000 }, /* R71 - Write Sequencer 1 */
49 { 72, 0x0000 }, /* R72 - Write Se 62 { 72, 0x0000 }, /* R72 - Write Sequencer 2 */
50 { 73, 0x0000 }, /* R73 - Write Se 63 { 73, 0x0000 }, /* R73 - Write Sequencer 3 */
51 { 74, 0x0000 }, /* R74 - Write Se 64 { 74, 0x0000 }, /* R74 - Write Sequencer 4 */
52 { 75, 0x0000 }, /* R75 - Write Se 65 { 75, 0x0000 }, /* R75 - Write Sequencer 5 */
53 { 76, 0x1F25 }, /* R76 - Charge P 66 { 76, 0x1F25 }, /* R76 - Charge Pump 1 */
54 { 85, 0x054A }, /* R85 - DC Servo 67 { 85, 0x054A }, /* R85 - DC Servo 1 */
55 { 87, 0x0000 }, /* R87 - DC Servo 68 { 87, 0x0000 }, /* R87 - DC Servo 3 */
56 { 96, 0x0100 }, /* R96 - Analogue 69 { 96, 0x0100 }, /* R96 - Analogue HP 0 */
57 { 98, 0x8640 }, /* R98 - AGC Cont 70 { 98, 0x8640 }, /* R98 - AGC Control 0 */
58 { 99, 0xC000 }, /* R99 - AGC Cont 71 { 99, 0xC000 }, /* R99 - AGC Control 1 */
59 { 100, 0x0200 }, /* R100 - AGC Con 72 { 100, 0x0200 }, /* R100 - AGC Control 2 */
60 }; 73 };
61 74
62 /* This struct is used to save the context */ 75 /* This struct is used to save the context */
63 struct wm9090_priv { 76 struct wm9090_priv {
64 struct wm9090_platform_data pdata; 77 struct wm9090_platform_data pdata;
65 struct regmap *regmap; 78 struct regmap *regmap;
66 }; 79 };
67 80
68 static bool wm9090_volatile(struct device *dev 81 static bool wm9090_volatile(struct device *dev, unsigned int reg)
69 { 82 {
70 switch (reg) { 83 switch (reg) {
71 case WM9090_SOFTWARE_RESET: 84 case WM9090_SOFTWARE_RESET:
72 case WM9090_DC_SERVO_0: 85 case WM9090_DC_SERVO_0:
73 case WM9090_DC_SERVO_READBACK_0: 86 case WM9090_DC_SERVO_READBACK_0:
74 case WM9090_DC_SERVO_READBACK_1: 87 case WM9090_DC_SERVO_READBACK_1:
75 case WM9090_DC_SERVO_READBACK_2: 88 case WM9090_DC_SERVO_READBACK_2:
76 return true; 89 return true;
77 90
78 default: 91 default:
79 return false; 92 return false;
80 } 93 }
81 } 94 }
82 95
83 static bool wm9090_readable(struct device *dev 96 static bool wm9090_readable(struct device *dev, unsigned int reg)
84 { 97 {
85 switch (reg) { 98 switch (reg) {
86 case WM9090_SOFTWARE_RESET: 99 case WM9090_SOFTWARE_RESET:
87 case WM9090_POWER_MANAGEMENT_1: 100 case WM9090_POWER_MANAGEMENT_1:
88 case WM9090_POWER_MANAGEMENT_2: 101 case WM9090_POWER_MANAGEMENT_2:
89 case WM9090_POWER_MANAGEMENT_3: 102 case WM9090_POWER_MANAGEMENT_3:
90 case WM9090_CLOCKING_1: 103 case WM9090_CLOCKING_1:
91 case WM9090_IN1_LINE_CONTROL: 104 case WM9090_IN1_LINE_CONTROL:
92 case WM9090_IN2_LINE_CONTROL: 105 case WM9090_IN2_LINE_CONTROL:
93 case WM9090_IN1_LINE_INPUT_A_VOLUME: 106 case WM9090_IN1_LINE_INPUT_A_VOLUME:
94 case WM9090_IN1_LINE_INPUT_B_VOLUME: 107 case WM9090_IN1_LINE_INPUT_B_VOLUME:
95 case WM9090_IN2_LINE_INPUT_A_VOLUME: 108 case WM9090_IN2_LINE_INPUT_A_VOLUME:
96 case WM9090_IN2_LINE_INPUT_B_VOLUME: 109 case WM9090_IN2_LINE_INPUT_B_VOLUME:
97 case WM9090_LEFT_OUTPUT_VOLUME: 110 case WM9090_LEFT_OUTPUT_VOLUME:
98 case WM9090_RIGHT_OUTPUT_VOLUME: 111 case WM9090_RIGHT_OUTPUT_VOLUME:
99 case WM9090_SPKMIXL_ATTENUATION: 112 case WM9090_SPKMIXL_ATTENUATION:
100 case WM9090_SPKOUT_MIXERS: 113 case WM9090_SPKOUT_MIXERS:
101 case WM9090_CLASSD3: 114 case WM9090_CLASSD3:
102 case WM9090_SPEAKER_VOLUME_LEFT: 115 case WM9090_SPEAKER_VOLUME_LEFT:
103 case WM9090_OUTPUT_MIXER1: 116 case WM9090_OUTPUT_MIXER1:
104 case WM9090_OUTPUT_MIXER2: 117 case WM9090_OUTPUT_MIXER2:
105 case WM9090_OUTPUT_MIXER3: 118 case WM9090_OUTPUT_MIXER3:
106 case WM9090_OUTPUT_MIXER4: 119 case WM9090_OUTPUT_MIXER4:
107 case WM9090_SPEAKER_MIXER: 120 case WM9090_SPEAKER_MIXER:
108 case WM9090_ANTIPOP2: 121 case WM9090_ANTIPOP2:
109 case WM9090_WRITE_SEQUENCER_0: 122 case WM9090_WRITE_SEQUENCER_0:
110 case WM9090_WRITE_SEQUENCER_1: 123 case WM9090_WRITE_SEQUENCER_1:
111 case WM9090_WRITE_SEQUENCER_2: 124 case WM9090_WRITE_SEQUENCER_2:
112 case WM9090_WRITE_SEQUENCER_3: 125 case WM9090_WRITE_SEQUENCER_3:
113 case WM9090_WRITE_SEQUENCER_4: 126 case WM9090_WRITE_SEQUENCER_4:
114 case WM9090_WRITE_SEQUENCER_5: 127 case WM9090_WRITE_SEQUENCER_5:
115 case WM9090_CHARGE_PUMP_1: 128 case WM9090_CHARGE_PUMP_1:
116 case WM9090_DC_SERVO_0: 129 case WM9090_DC_SERVO_0:
117 case WM9090_DC_SERVO_1: 130 case WM9090_DC_SERVO_1:
118 case WM9090_DC_SERVO_3: 131 case WM9090_DC_SERVO_3:
119 case WM9090_DC_SERVO_READBACK_0: 132 case WM9090_DC_SERVO_READBACK_0:
120 case WM9090_DC_SERVO_READBACK_1: 133 case WM9090_DC_SERVO_READBACK_1:
121 case WM9090_DC_SERVO_READBACK_2: 134 case WM9090_DC_SERVO_READBACK_2:
122 case WM9090_ANALOGUE_HP_0: 135 case WM9090_ANALOGUE_HP_0:
123 case WM9090_AGC_CONTROL_0: 136 case WM9090_AGC_CONTROL_0:
124 case WM9090_AGC_CONTROL_1: 137 case WM9090_AGC_CONTROL_1:
125 case WM9090_AGC_CONTROL_2: 138 case WM9090_AGC_CONTROL_2:
126 return true; 139 return true;
127 140
128 default: 141 default:
129 return false; 142 return false;
130 } 143 }
131 } 144 }
132 145
133 static void wait_for_dc_servo(struct snd_soc_c !! 146 static void wait_for_dc_servo(struct snd_soc_codec *codec)
134 { 147 {
135 unsigned int reg; 148 unsigned int reg;
136 int count = 0; 149 int count = 0;
137 150
138 dev_dbg(component->dev, "Waiting for D !! 151 dev_dbg(codec->dev, "Waiting for DC servo...\n");
139 do { 152 do {
140 count++; 153 count++;
141 msleep(1); 154 msleep(1);
142 reg = snd_soc_component_read(c !! 155 reg = snd_soc_read(codec, WM9090_DC_SERVO_READBACK_0);
143 dev_dbg(component->dev, "DC se !! 156 dev_dbg(codec->dev, "DC servo status: %x\n", reg);
144 } while ((reg & WM9090_DCS_CAL_COMPLET 157 } while ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
145 != WM9090_DCS_CAL_COMPLETE_MA 158 != WM9090_DCS_CAL_COMPLETE_MASK && count < 1000);
146 159
147 if ((reg & WM9090_DCS_CAL_COMPLETE_MAS 160 if ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
148 != WM9090_DCS_CAL_COMPLETE_MASK) 161 != WM9090_DCS_CAL_COMPLETE_MASK)
149 dev_err(component->dev, "Timed !! 162 dev_err(codec->dev, "Timed out waiting for DC Servo\n");
150 } 163 }
151 164
152 static const DECLARE_TLV_DB_RANGE(in_tlv, 165 static const DECLARE_TLV_DB_RANGE(in_tlv,
153 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0), 166 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0),
154 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0), 167 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0),
155 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0) 168 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0)
156 ); 169 );
157 static const DECLARE_TLV_DB_RANGE(mix_tlv, 170 static const DECLARE_TLV_DB_RANGE(mix_tlv,
158 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0) 171 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0),
159 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0) 172 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0)
160 ); 173 );
161 static const DECLARE_TLV_DB_SCALE(out_tlv, -57 174 static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
162 static const DECLARE_TLV_DB_RANGE(spkboost_tlv 175 static const DECLARE_TLV_DB_RANGE(spkboost_tlv,
163 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 176 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
164 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0) 177 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0)
165 ); 178 );
166 179
167 static const struct snd_kcontrol_new wm9090_co 180 static const struct snd_kcontrol_new wm9090_controls[] = {
168 SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_ 181 SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_INPUT_A_VOLUME, 0, 6, 0,
169 in_tlv), 182 in_tlv),
170 SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPU 183 SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 7, 1, 1),
171 SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_I 184 SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 6, 1, 0),
172 185
173 SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_ 186 SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_INPUT_A_VOLUME, 0, 6, 0,
174 in_tlv), 187 in_tlv),
175 SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPU 188 SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 7, 1, 1),
176 SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_I 189 SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 6, 1, 0),
177 190
178 SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIX 191 SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIXER3, 8, 1, 1),
179 SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_O 192 SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_OUTPUT_MIXER3, 6, 3, 1,
180 mix_tlv), 193 mix_tlv),
181 SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_O 194 SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_OUTPUT_MIXER3, 2, 3, 1,
182 mix_tlv), 195 mix_tlv),
183 196
184 SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIX 197 SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIXER4, 8, 1, 1),
185 SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_O 198 SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_OUTPUT_MIXER4, 6, 3, 1,
186 mix_tlv), 199 mix_tlv),
187 SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_O 200 SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_OUTPUT_MIXER4, 2, 3, 1,
188 mix_tlv), 201 mix_tlv),
189 202
190 SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATT 203 SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATTENUATION, 8, 1, 1),
191 SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SP 204 SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SPKMIXL_ATTENUATION, 6, 3, 1,
192 mix_tlv), 205 mix_tlv),
193 SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SP 206 SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SPKMIXL_ATTENUATION, 2, 3, 1,
194 mix_tlv), 207 mix_tlv),
195 208
196 SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LE 209 SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LEFT_OUTPUT_VOLUME,
197 WM9090_RIGHT_OUTPUT_VOLUME, 0 210 WM9090_RIGHT_OUTPUT_VOLUME, 0, 63, 0, out_tlv),
198 SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_O 211 SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_OUTPUT_VOLUME,
199 WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 212 WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 1),
200 SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEF 213 SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEFT_OUTPUT_VOLUME,
201 WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 214 WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
202 215
203 SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKE 216 SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKER_VOLUME_LEFT, 0, 63, 0,
204 out_tlv), 217 out_tlv),
205 SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VO 218 SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VOLUME_LEFT, 6, 1, 1),
206 SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER 219 SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER_VOLUME_LEFT, 7, 1, 0),
207 SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_ 220 SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_CLASSD3, 3, 7, 0, spkboost_tlv),
208 }; 221 };
209 222
210 static const struct snd_kcontrol_new wm9090_in 223 static const struct snd_kcontrol_new wm9090_in1_se_controls[] = {
211 SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_ 224 SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_INPUT_B_VOLUME, 0, 6, 0,
212 in_tlv), 225 in_tlv),
213 SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPU 226 SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 7, 1, 1),
214 SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_I 227 SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 6, 1, 0),
215 228
216 SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SP 229 SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SPKMIXL_ATTENUATION, 4, 3, 1,
217 mix_tlv), 230 mix_tlv),
218 SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_O 231 SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_OUTPUT_MIXER3, 4, 3, 1,
219 mix_tlv), 232 mix_tlv),
220 SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_O 233 SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_OUTPUT_MIXER4, 4, 3, 1,
221 mix_tlv), 234 mix_tlv),
222 }; 235 };
223 236
224 static const struct snd_kcontrol_new wm9090_in 237 static const struct snd_kcontrol_new wm9090_in2_se_controls[] = {
225 SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_ 238 SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_INPUT_B_VOLUME, 0, 6, 0,
226 in_tlv), 239 in_tlv),
227 SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPU 240 SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 7, 1, 1),
228 SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_I 241 SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 6, 1, 0),
229 242
230 SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SP 243 SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SPKMIXL_ATTENUATION, 0, 3, 1,
231 mix_tlv), 244 mix_tlv),
232 SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_O 245 SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_OUTPUT_MIXER3, 0, 3, 1,
233 mix_tlv), 246 mix_tlv),
234 SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_O 247 SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_OUTPUT_MIXER4, 0, 3, 1,
235 mix_tlv), 248 mix_tlv),
236 }; 249 };
237 250
238 static int hp_ev(struct snd_soc_dapm_widget *w 251 static int hp_ev(struct snd_soc_dapm_widget *w,
239 struct snd_kcontrol *kcontrol 252 struct snd_kcontrol *kcontrol, int event)
240 { 253 {
241 struct snd_soc_component *component = !! 254 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
242 unsigned int reg = snd_soc_component_r !! 255 unsigned int reg = snd_soc_read(codec, WM9090_ANALOGUE_HP_0);
243 256
244 switch (event) { 257 switch (event) {
245 case SND_SOC_DAPM_POST_PMU: 258 case SND_SOC_DAPM_POST_PMU:
246 snd_soc_component_update_bits( !! 259 snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
247 WM9090_CP_ 260 WM9090_CP_ENA, WM9090_CP_ENA);
248 261
249 msleep(5); 262 msleep(5);
250 263
251 snd_soc_component_update_bits( !! 264 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
252 WM9090_HPO 265 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
253 WM9090_HPO 266 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA);
254 267
255 reg |= WM9090_HPOUT1L_DLY | WM 268 reg |= WM9090_HPOUT1L_DLY | WM9090_HPOUT1R_DLY;
256 snd_soc_component_write(compon !! 269 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
257 270
258 /* Start the DC servo. We don 271 /* Start the DC servo. We don't currently use the
259 * ability to save the state s 272 * ability to save the state since we don't have full
260 * control of the analogue pat 273 * control of the analogue paths and they can change
261 * DC offsets; see the WM8904 274 * DC offsets; see the WM8904 driver for an example of
262 * doing so. 275 * doing so.
263 */ 276 */
264 snd_soc_component_write(compon !! 277 snd_soc_write(codec, WM9090_DC_SERVO_0,
265 WM9090_DCS_ENA_C 278 WM9090_DCS_ENA_CHAN_0 |
266 WM9090_DCS_ENA_C 279 WM9090_DCS_ENA_CHAN_1 |
267 WM9090_DCS_TRIG_ 280 WM9090_DCS_TRIG_STARTUP_1 |
268 WM9090_DCS_TRIG_ 281 WM9090_DCS_TRIG_STARTUP_0);
269 wait_for_dc_servo(component); !! 282 wait_for_dc_servo(codec);
270 283
271 reg |= WM9090_HPOUT1R_OUTP | W 284 reg |= WM9090_HPOUT1R_OUTP | WM9090_HPOUT1R_RMV_SHORT |
272 WM9090_HPOUT1L_OUTP | 285 WM9090_HPOUT1L_OUTP | WM9090_HPOUT1L_RMV_SHORT;
273 snd_soc_component_write(compon !! 286 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
274 break; 287 break;
275 288
276 case SND_SOC_DAPM_PRE_PMD: 289 case SND_SOC_DAPM_PRE_PMD:
277 reg &= ~(WM9090_HPOUT1L_RMV_SH 290 reg &= ~(WM9090_HPOUT1L_RMV_SHORT |
278 WM9090_HPOUT1L_DLY | 291 WM9090_HPOUT1L_DLY |
279 WM9090_HPOUT1L_OUTP | 292 WM9090_HPOUT1L_OUTP |
280 WM9090_HPOUT1R_RMV_SH 293 WM9090_HPOUT1R_RMV_SHORT |
281 WM9090_HPOUT1R_DLY | 294 WM9090_HPOUT1R_DLY |
282 WM9090_HPOUT1R_OUTP); 295 WM9090_HPOUT1R_OUTP);
283 296
284 snd_soc_component_write(compon !! 297 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
285 298
286 snd_soc_component_write(compon !! 299 snd_soc_write(codec, WM9090_DC_SERVO_0, 0);
287 300
288 snd_soc_component_update_bits( !! 301 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
289 WM9090_HPO 302 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
290 0); 303 0);
291 304
292 snd_soc_component_update_bits( !! 305 snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
293 WM9090_CP_ 306 WM9090_CP_ENA, 0);
294 break; 307 break;
295 } 308 }
296 309
297 return 0; 310 return 0;
298 } 311 }
299 312
300 static const struct snd_kcontrol_new spkmix[] 313 static const struct snd_kcontrol_new spkmix[] = {
301 SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_ 314 SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_MIXER, 6, 1, 0),
302 SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_ 315 SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_MIXER, 4, 1, 0),
303 SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_ 316 SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_MIXER, 2, 1, 0),
304 SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_ 317 SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_MIXER, 0, 1, 0),
305 }; 318 };
306 319
307 static const struct snd_kcontrol_new spkout[] 320 static const struct snd_kcontrol_new spkout[] = {
308 SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_ 321 SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_MIXERS, 4, 1, 0),
309 }; 322 };
310 323
311 static const struct snd_kcontrol_new mixoutl[] 324 static const struct snd_kcontrol_new mixoutl[] = {
312 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_M 325 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER1, 6, 1, 0),
313 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_M 326 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER1, 4, 1, 0),
314 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_M 327 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER1, 2, 1, 0),
315 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_M 328 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER1, 0, 1, 0),
316 }; 329 };
317 330
318 static const struct snd_kcontrol_new mixoutr[] 331 static const struct snd_kcontrol_new mixoutr[] = {
319 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_M 332 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER2, 6, 1, 0),
320 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_M 333 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER2, 4, 1, 0),
321 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_M 334 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER2, 2, 1, 0),
322 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_M 335 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER2, 0, 1, 0),
323 }; 336 };
324 337
325 static const struct snd_soc_dapm_widget wm9090 338 static const struct snd_soc_dapm_widget wm9090_dapm_widgets[] = {
326 SND_SOC_DAPM_INPUT("IN1+"), 339 SND_SOC_DAPM_INPUT("IN1+"),
327 SND_SOC_DAPM_INPUT("IN1-"), 340 SND_SOC_DAPM_INPUT("IN1-"),
328 SND_SOC_DAPM_INPUT("IN2+"), 341 SND_SOC_DAPM_INPUT("IN2+"),
329 SND_SOC_DAPM_INPUT("IN2-"), 342 SND_SOC_DAPM_INPUT("IN2-"),
330 343
331 SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGE 344 SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGEMENT_1, 3, 0, NULL, 0),
332 345
333 SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANA 346 SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANAGEMENT_2, 7, 0, NULL, 0),
334 SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANA 347 SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANAGEMENT_2, 6, 0, NULL, 0),
335 SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANA 348 SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
336 SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANA 349 SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
337 350
338 SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANA 351 SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANAGEMENT_3, 3, 0,
339 spkmix, ARRAY_SIZE(spkmix)) 352 spkmix, ARRAY_SIZE(spkmix)),
340 SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MAN 353 SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MANAGEMENT_3, 5, 0,
341 mixoutl, ARRAY_SIZE(mixoutl 354 mixoutl, ARRAY_SIZE(mixoutl)),
342 SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MAN 355 SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MANAGEMENT_3, 4, 0,
343 mixoutr, ARRAY_SIZE(mixoutr 356 mixoutr, ARRAY_SIZE(mixoutr)),
344 357
345 SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 358 SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
346 hp_ev, SND_SOC_DAPM_POST_PM 359 hp_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
347 360
348 SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGE 361 SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGEMENT_3, 8, 0, NULL, 0),
349 SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANA 362 SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANAGEMENT_1, 12, 0,
350 spkout, ARRAY_SIZE(spkout)) 363 spkout, ARRAY_SIZE(spkout)),
351 364
352 SND_SOC_DAPM_OUTPUT("HPR"), 365 SND_SOC_DAPM_OUTPUT("HPR"),
353 SND_SOC_DAPM_OUTPUT("HPL"), 366 SND_SOC_DAPM_OUTPUT("HPL"),
354 SND_SOC_DAPM_OUTPUT("Speaker"), 367 SND_SOC_DAPM_OUTPUT("Speaker"),
355 }; 368 };
356 369
357 static const struct snd_soc_dapm_route audio_m 370 static const struct snd_soc_dapm_route audio_map[] = {
358 { "IN1A PGA", NULL, "IN1+" }, 371 { "IN1A PGA", NULL, "IN1+" },
359 { "IN2A PGA", NULL, "IN2+" }, 372 { "IN2A PGA", NULL, "IN2+" },
360 373
361 { "SPKMIX", "IN1A Switch", "IN1A PGA" 374 { "SPKMIX", "IN1A Switch", "IN1A PGA" },
362 { "SPKMIX", "IN2A Switch", "IN2A PGA" 375 { "SPKMIX", "IN2A Switch", "IN2A PGA" },
363 376
364 { "MIXOUTL", "IN1A Switch", "IN1A PGA" 377 { "MIXOUTL", "IN1A Switch", "IN1A PGA" },
365 { "MIXOUTL", "IN2A Switch", "IN2A PGA" 378 { "MIXOUTL", "IN2A Switch", "IN2A PGA" },
366 379
367 { "MIXOUTR", "IN1A Switch", "IN1A PGA" 380 { "MIXOUTR", "IN1A Switch", "IN1A PGA" },
368 { "MIXOUTR", "IN2A Switch", "IN2A PGA" 381 { "MIXOUTR", "IN2A Switch", "IN2A PGA" },
369 382
370 { "HP PGA", NULL, "OSC" }, 383 { "HP PGA", NULL, "OSC" },
371 { "HP PGA", NULL, "MIXOUTL" }, 384 { "HP PGA", NULL, "MIXOUTL" },
372 { "HP PGA", NULL, "MIXOUTR" }, 385 { "HP PGA", NULL, "MIXOUTR" },
373 386
374 { "HPL", NULL, "HP PGA" }, 387 { "HPL", NULL, "HP PGA" },
375 { "HPR", NULL, "HP PGA" }, 388 { "HPR", NULL, "HP PGA" },
376 389
377 { "SPKPGA", NULL, "OSC" }, 390 { "SPKPGA", NULL, "OSC" },
378 { "SPKPGA", NULL, "SPKMIX" }, 391 { "SPKPGA", NULL, "SPKMIX" },
379 392
380 { "SPKOUT", "Mixer Switch", "SPKPGA" } 393 { "SPKOUT", "Mixer Switch", "SPKPGA" },
381 394
382 { "Speaker", NULL, "SPKOUT" }, 395 { "Speaker", NULL, "SPKOUT" },
383 }; 396 };
384 397
385 static const struct snd_soc_dapm_route audio_m 398 static const struct snd_soc_dapm_route audio_map_in1_se[] = {
386 { "IN1B PGA", NULL, "IN1-" }, 399 { "IN1B PGA", NULL, "IN1-" },
387 400
388 { "SPKMIX", "IN1B Switch", "IN1B PGA" 401 { "SPKMIX", "IN1B Switch", "IN1B PGA" },
389 { "MIXOUTL", "IN1B Switch", "IN1B PGA" 402 { "MIXOUTL", "IN1B Switch", "IN1B PGA" },
390 { "MIXOUTR", "IN1B Switch", "IN1B PGA" 403 { "MIXOUTR", "IN1B Switch", "IN1B PGA" },
391 }; 404 };
392 405
393 static const struct snd_soc_dapm_route audio_m 406 static const struct snd_soc_dapm_route audio_map_in1_diff[] = {
394 { "IN1A PGA", NULL, "IN1-" }, 407 { "IN1A PGA", NULL, "IN1-" },
395 }; 408 };
396 409
397 static const struct snd_soc_dapm_route audio_m 410 static const struct snd_soc_dapm_route audio_map_in2_se[] = {
398 { "IN2B PGA", NULL, "IN2-" }, 411 { "IN2B PGA", NULL, "IN2-" },
399 412
400 { "SPKMIX", "IN2B Switch", "IN2B PGA" 413 { "SPKMIX", "IN2B Switch", "IN2B PGA" },
401 { "MIXOUTL", "IN2B Switch", "IN2B PGA" 414 { "MIXOUTL", "IN2B Switch", "IN2B PGA" },
402 { "MIXOUTR", "IN2B Switch", "IN2B PGA" 415 { "MIXOUTR", "IN2B Switch", "IN2B PGA" },
403 }; 416 };
404 417
405 static const struct snd_soc_dapm_route audio_m 418 static const struct snd_soc_dapm_route audio_map_in2_diff[] = {
406 { "IN2A PGA", NULL, "IN2-" }, 419 { "IN2A PGA", NULL, "IN2-" },
407 }; 420 };
408 421
409 static int wm9090_add_controls(struct snd_soc_ !! 422 static int wm9090_add_controls(struct snd_soc_codec *codec)
410 { 423 {
411 struct wm9090_priv *wm9090 = snd_soc_c !! 424 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
412 struct snd_soc_dapm_context *dapm = sn !! 425 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
413 int i; 426 int i;
414 427
415 snd_soc_dapm_new_controls(dapm, wm9090 428 snd_soc_dapm_new_controls(dapm, wm9090_dapm_widgets,
416 ARRAY_SIZE(w 429 ARRAY_SIZE(wm9090_dapm_widgets));
417 430
418 snd_soc_dapm_add_routes(dapm, audio_ma 431 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
419 432
420 snd_soc_add_component_controls(compone !! 433 snd_soc_add_codec_controls(codec, wm9090_controls,
421 ARRAY_SIZE(wm9090 434 ARRAY_SIZE(wm9090_controls));
422 435
423 if (wm9090->pdata.lin1_diff) { 436 if (wm9090->pdata.lin1_diff) {
424 snd_soc_dapm_add_routes(dapm, 437 snd_soc_dapm_add_routes(dapm, audio_map_in1_diff,
425 ARRAY_ 438 ARRAY_SIZE(audio_map_in1_diff));
426 } else { 439 } else {
427 snd_soc_dapm_add_routes(dapm, 440 snd_soc_dapm_add_routes(dapm, audio_map_in1_se,
428 ARRAY_ 441 ARRAY_SIZE(audio_map_in1_se));
429 snd_soc_add_component_controls !! 442 snd_soc_add_codec_controls(codec, wm9090_in1_se_controls,
430 ARRAY_SIZ 443 ARRAY_SIZE(wm9090_in1_se_controls));
431 } 444 }
432 445
433 if (wm9090->pdata.lin2_diff) { 446 if (wm9090->pdata.lin2_diff) {
434 snd_soc_dapm_add_routes(dapm, 447 snd_soc_dapm_add_routes(dapm, audio_map_in2_diff,
435 ARRAY_ 448 ARRAY_SIZE(audio_map_in2_diff));
436 } else { 449 } else {
437 snd_soc_dapm_add_routes(dapm, 450 snd_soc_dapm_add_routes(dapm, audio_map_in2_se,
438 ARRAY_ 451 ARRAY_SIZE(audio_map_in2_se));
439 snd_soc_add_component_controls !! 452 snd_soc_add_codec_controls(codec, wm9090_in2_se_controls,
440 ARRAY_SIZ 453 ARRAY_SIZE(wm9090_in2_se_controls));
441 } 454 }
442 455
443 if (wm9090->pdata.agc_ena) { 456 if (wm9090->pdata.agc_ena) {
444 for (i = 0; i < ARRAY_SIZE(wm9 457 for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++)
445 snd_soc_component_writ !! 458 snd_soc_write(codec, WM9090_AGC_CONTROL_0 + i,
446 wm9090-> 459 wm9090->pdata.agc[i]);
447 snd_soc_component_update_bits( !! 460 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
448 WM9090_AGC 461 WM9090_AGC_ENA, WM9090_AGC_ENA);
449 } else { 462 } else {
450 snd_soc_component_update_bits( !! 463 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
451 WM9090_AGC 464 WM9090_AGC_ENA, 0);
452 } 465 }
453 466
454 return 0; 467 return 0;
455 468
456 } 469 }
457 470
458 /* 471 /*
459 * The machine driver should call this from th 472 * The machine driver should call this from their set_bias_level; if there
460 * isn't one then this can just be set as the 473 * isn't one then this can just be set as the set_bias_level function.
461 */ 474 */
462 static int wm9090_set_bias_level(struct snd_so !! 475 static int wm9090_set_bias_level(struct snd_soc_codec *codec,
463 enum snd_soc_ 476 enum snd_soc_bias_level level)
464 { 477 {
465 struct wm9090_priv *wm9090 = snd_soc_c !! 478 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
466 479
467 switch (level) { 480 switch (level) {
468 case SND_SOC_BIAS_ON: 481 case SND_SOC_BIAS_ON:
469 break; 482 break;
470 483
471 case SND_SOC_BIAS_PREPARE: 484 case SND_SOC_BIAS_PREPARE:
472 snd_soc_component_update_bits( !! 485 snd_soc_update_bits(codec, WM9090_ANTIPOP2, WM9090_VMID_ENA,
473 WM9090_VMI 486 WM9090_VMID_ENA);
474 snd_soc_component_update_bits( !! 487 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
475 WM9090_BIA 488 WM9090_BIAS_ENA |
476 WM9090_VMI 489 WM9090_VMID_RES_MASK,
477 WM9090_BIA 490 WM9090_BIAS_ENA |
478 1 << WM909 491 1 << WM9090_VMID_RES_SHIFT);
479 msleep(1); /* Probably an ove 492 msleep(1); /* Probably an overestimate */
480 break; 493 break;
481 494
482 case SND_SOC_BIAS_STANDBY: 495 case SND_SOC_BIAS_STANDBY:
483 if (snd_soc_component_get_bias !! 496 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
484 /* Restore the registe 497 /* Restore the register cache */
485 regcache_sync(wm9090-> 498 regcache_sync(wm9090->regmap);
486 } 499 }
487 500
488 /* We keep VMID off during sta 501 /* We keep VMID off during standby since the combination of
489 * ground referenced outputs a 502 * ground referenced outputs and class D speaker mean that
490 * latency is not an issue. 503 * latency is not an issue.
491 */ 504 */
492 snd_soc_component_update_bits( !! 505 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
493 WM9090_BIA 506 WM9090_BIAS_ENA | WM9090_VMID_RES_MASK, 0);
494 snd_soc_component_update_bits( !! 507 snd_soc_update_bits(codec, WM9090_ANTIPOP2,
495 WM9090_VMI 508 WM9090_VMID_ENA, 0);
496 break; 509 break;
497 510
498 case SND_SOC_BIAS_OFF: 511 case SND_SOC_BIAS_OFF:
499 break; 512 break;
500 } 513 }
501 514
502 return 0; 515 return 0;
503 } 516 }
504 517
505 static int wm9090_probe(struct snd_soc_compone !! 518 static int wm9090_probe(struct snd_soc_codec *codec)
506 { 519 {
507 /* Configure some defaults; they will 520 /* Configure some defaults; they will be written out when we
508 * bring the bias up. 521 * bring the bias up.
509 */ 522 */
510 snd_soc_component_update_bits(componen !! 523 snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_A_VOLUME,
511 WM9090_IN1_VU | WM 524 WM9090_IN1_VU | WM9090_IN1A_ZC,
512 WM9090_IN1_VU | WM 525 WM9090_IN1_VU | WM9090_IN1A_ZC);
513 snd_soc_component_update_bits(componen !! 526 snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_B_VOLUME,
514 WM9090_IN1_VU | WM 527 WM9090_IN1_VU | WM9090_IN1B_ZC,
515 WM9090_IN1_VU | WM 528 WM9090_IN1_VU | WM9090_IN1B_ZC);
516 snd_soc_component_update_bits(componen !! 529 snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_A_VOLUME,
517 WM9090_IN2_VU | WM 530 WM9090_IN2_VU | WM9090_IN2A_ZC,
518 WM9090_IN2_VU | WM 531 WM9090_IN2_VU | WM9090_IN2A_ZC);
519 snd_soc_component_update_bits(componen !! 532 snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_B_VOLUME,
520 WM9090_IN2_VU | WM 533 WM9090_IN2_VU | WM9090_IN2B_ZC,
521 WM9090_IN2_VU | WM 534 WM9090_IN2_VU | WM9090_IN2B_ZC);
522 snd_soc_component_update_bits(componen !! 535 snd_soc_update_bits(codec, WM9090_SPEAKER_VOLUME_LEFT,
523 WM9090_SPKOUT_VU | 536 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC,
524 WM9090_SPKOUT_VU | 537 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC);
525 snd_soc_component_update_bits(componen !! 538 snd_soc_update_bits(codec, WM9090_LEFT_OUTPUT_VOLUME,
526 WM9090_HPOUT1_VU | 539 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC,
527 WM9090_HPOUT1_VU | 540 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC);
528 snd_soc_component_update_bits(componen !! 541 snd_soc_update_bits(codec, WM9090_RIGHT_OUTPUT_VOLUME,
529 WM9090_HPOUT1_VU | 542 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC,
530 WM9090_HPOUT1_VU | 543 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC);
531 544
532 snd_soc_component_update_bits(componen !! 545 snd_soc_update_bits(codec, WM9090_CLOCKING_1,
533 WM9090_TOCLK_ENA, 546 WM9090_TOCLK_ENA, WM9090_TOCLK_ENA);
534 547
535 wm9090_add_controls(component); !! 548 wm9090_add_controls(codec);
536 549
537 return 0; 550 return 0;
538 } 551 }
539 552
540 static const struct snd_soc_component_driver s !! 553 static const struct snd_soc_codec_driver soc_codec_dev_wm9090 = {
541 .probe = wm9090_probe !! 554 .probe = wm9090_probe,
542 .set_bias_level = wm9090_set_b !! 555 .set_bias_level = wm9090_set_bias_level,
543 .suspend_bias_off = 1, !! 556 .suspend_bias_off = true,
544 .idle_bias_on = 1, <<
545 .use_pmdown_time = 1, <<
546 }; 557 };
547 558
548 static const struct regmap_config wm9090_regma 559 static const struct regmap_config wm9090_regmap = {
549 .reg_bits = 8, 560 .reg_bits = 8,
550 .val_bits = 16, 561 .val_bits = 16,
551 562
552 .max_register = WM9090_MAX_REGISTER, 563 .max_register = WM9090_MAX_REGISTER,
553 .volatile_reg = wm9090_volatile, 564 .volatile_reg = wm9090_volatile,
554 .readable_reg = wm9090_readable, 565 .readable_reg = wm9090_readable,
555 566
556 .cache_type = REGCACHE_MAPLE, !! 567 .cache_type = REGCACHE_RBTREE,
557 .reg_defaults = wm9090_reg_defaults, 568 .reg_defaults = wm9090_reg_defaults,
558 .num_reg_defaults = ARRAY_SIZE(wm9090_ 569 .num_reg_defaults = ARRAY_SIZE(wm9090_reg_defaults),
559 }; 570 };
560 571
561 572
562 static int wm9090_i2c_probe(struct i2c_client !! 573 static int wm9090_i2c_probe(struct i2c_client *i2c,
>> 574 const struct i2c_device_id *id)
563 { 575 {
564 struct wm9090_priv *wm9090; 576 struct wm9090_priv *wm9090;
565 unsigned int reg; 577 unsigned int reg;
566 int ret; 578 int ret;
567 579
568 wm9090 = devm_kzalloc(&i2c->dev, sizeo 580 wm9090 = devm_kzalloc(&i2c->dev, sizeof(*wm9090), GFP_KERNEL);
569 if (!wm9090) 581 if (!wm9090)
570 return -ENOMEM; 582 return -ENOMEM;
571 583
572 wm9090->regmap = devm_regmap_init_i2c( 584 wm9090->regmap = devm_regmap_init_i2c(i2c, &wm9090_regmap);
573 if (IS_ERR(wm9090->regmap)) { 585 if (IS_ERR(wm9090->regmap)) {
574 ret = PTR_ERR(wm9090->regmap); 586 ret = PTR_ERR(wm9090->regmap);
575 dev_err(&i2c->dev, "Failed to 587 dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
576 return ret; 588 return ret;
577 } 589 }
578 590
579 ret = regmap_read(wm9090->regmap, WM90 591 ret = regmap_read(wm9090->regmap, WM9090_SOFTWARE_RESET, ®);
580 if (ret < 0) 592 if (ret < 0)
581 return ret; 593 return ret;
582 594
583 if (reg != 0x9093) { 595 if (reg != 0x9093) {
584 dev_err(&i2c->dev, "Device is 596 dev_err(&i2c->dev, "Device is not a WM9090, ID=%x\n", reg);
585 return -ENODEV; 597 return -ENODEV;
586 } 598 }
587 599
588 ret = regmap_write(wm9090->regmap, WM9 600 ret = regmap_write(wm9090->regmap, WM9090_SOFTWARE_RESET, 0);
589 if (ret < 0) 601 if (ret < 0)
590 return ret; 602 return ret;
591 603
592 if (i2c->dev.platform_data) 604 if (i2c->dev.platform_data)
593 memcpy(&wm9090->pdata, i2c->de 605 memcpy(&wm9090->pdata, i2c->dev.platform_data,
594 sizeof(wm9090->pdata)); 606 sizeof(wm9090->pdata));
595 607
596 i2c_set_clientdata(i2c, wm9090); 608 i2c_set_clientdata(i2c, wm9090);
597 609
598 ret = devm_snd_soc_register_component !! 610 ret = snd_soc_register_codec(&i2c->dev,
599 &soc_component_dev_wm9 !! 611 &soc_codec_dev_wm9090, NULL, 0);
600 if (ret != 0) { 612 if (ret != 0) {
601 dev_err(&i2c->dev, "Failed to 613 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
602 return ret; 614 return ret;
603 } 615 }
604 616
605 return 0; 617 return 0;
606 } 618 }
607 619
>> 620 static int wm9090_i2c_remove(struct i2c_client *i2c)
>> 621 {
>> 622 snd_soc_unregister_codec(&i2c->dev);
>> 623 return 0;
>> 624 }
>> 625
608 static const struct i2c_device_id wm9090_id[] 626 static const struct i2c_device_id wm9090_id[] = {
609 { "wm9090" }, !! 627 { "wm9090", 0 },
610 { "wm9093" }, !! 628 { "wm9093", 0 },
611 { } 629 { }
612 }; 630 };
613 MODULE_DEVICE_TABLE(i2c, wm9090_id); 631 MODULE_DEVICE_TABLE(i2c, wm9090_id);
614 632
615 static struct i2c_driver wm9090_i2c_driver = { 633 static struct i2c_driver wm9090_i2c_driver = {
616 .driver = { 634 .driver = {
617 .name = "wm9090", 635 .name = "wm9090",
618 }, 636 },
619 .probe = wm9090_i2c_probe, 637 .probe = wm9090_i2c_probe,
>> 638 .remove = wm9090_i2c_remove,
620 .id_table = wm9090_id, 639 .id_table = wm9090_id,
621 }; 640 };
622 641
623 module_i2c_driver(wm9090_i2c_driver); 642 module_i2c_driver(wm9090_i2c_driver);
624 643
625 MODULE_AUTHOR("Mark Brown <broonie@opensource. 644 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
626 MODULE_DESCRIPTION("WM9090 ASoC driver"); 645 MODULE_DESCRIPTION("WM9090 ASoC driver");
627 MODULE_LICENSE("GPL"); 646 MODULE_LICENSE("GPL");
628 647
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