1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * ALSA SoC WM9090 driver 3 * ALSA SoC WM9090 driver
4 * 4 *
5 * Copyright 2009-12 Wolfson Microelectronics 5 * Copyright 2009-12 Wolfson Microelectronics
6 * 6 *
7 * Author: Mark Brown <broonie@opensource.wolf 7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 */ 8 */
9 9
10 #include <linux/module.h> 10 #include <linux/module.h>
11 #include <linux/errno.h> 11 #include <linux/errno.h>
12 #include <linux/device.h> 12 #include <linux/device.h>
13 #include <linux/i2c.h> 13 #include <linux/i2c.h>
14 #include <linux/delay.h> 14 #include <linux/delay.h>
15 #include <linux/regmap.h> 15 #include <linux/regmap.h>
16 #include <linux/slab.h> 16 #include <linux/slab.h>
17 #include <sound/initval.h> 17 #include <sound/initval.h>
18 #include <sound/soc.h> 18 #include <sound/soc.h>
19 #include <sound/tlv.h> 19 #include <sound/tlv.h>
20 #include <sound/wm9090.h> 20 #include <sound/wm9090.h>
21 21
22 #include "wm9090.h" 22 #include "wm9090.h"
23 23
24 static const struct reg_default wm9090_reg_def 24 static const struct reg_default wm9090_reg_defaults[] = {
25 { 1, 0x0006 }, /* R1 - Power Ma 25 { 1, 0x0006 }, /* R1 - Power Management (1) */
26 { 2, 0x6000 }, /* R2 - Power Ma 26 { 2, 0x6000 }, /* R2 - Power Management (2) */
27 { 3, 0x0000 }, /* R3 - Power Ma 27 { 3, 0x0000 }, /* R3 - Power Management (3) */
28 { 6, 0x01C0 }, /* R6 - Clocking 28 { 6, 0x01C0 }, /* R6 - Clocking 1 */
29 { 22, 0x0003 }, /* R22 - IN1 Line 29 { 22, 0x0003 }, /* R22 - IN1 Line Control */
30 { 23, 0x0003 }, /* R23 - IN2 Line 30 { 23, 0x0003 }, /* R23 - IN2 Line Control */
31 { 24, 0x0083 }, /* R24 - IN1 Line 31 { 24, 0x0083 }, /* R24 - IN1 Line Input A Volume */
32 { 25, 0x0083 }, /* R25 - IN1 Lin 32 { 25, 0x0083 }, /* R25 - IN1 Line Input B Volume */
33 { 26, 0x0083 }, /* R26 - IN2 Line 33 { 26, 0x0083 }, /* R26 - IN2 Line Input A Volume */
34 { 27, 0x0083 }, /* R27 - IN2 Line 34 { 27, 0x0083 }, /* R27 - IN2 Line Input B Volume */
35 { 28, 0x002D }, /* R28 - Left Out 35 { 28, 0x002D }, /* R28 - Left Output Volume */
36 { 29, 0x002D }, /* R29 - Right Ou 36 { 29, 0x002D }, /* R29 - Right Output Volume */
37 { 34, 0x0100 }, /* R34 - SPKMIXL 37 { 34, 0x0100 }, /* R34 - SPKMIXL Attenuation */
38 { 35, 0x0010 }, /* R36 - SPKOUT M 38 { 35, 0x0010 }, /* R36 - SPKOUT Mixers */
39 { 37, 0x0140 }, /* R37 - ClassD3 39 { 37, 0x0140 }, /* R37 - ClassD3 */
40 { 38, 0x0039 }, /* R38 - Speaker 40 { 38, 0x0039 }, /* R38 - Speaker Volume Left */
41 { 45, 0x0000 }, /* R45 - Output M 41 { 45, 0x0000 }, /* R45 - Output Mixer1 */
42 { 46, 0x0000 }, /* R46 - Output M 42 { 46, 0x0000 }, /* R46 - Output Mixer2 */
43 { 47, 0x0100 }, /* R47 - Output M 43 { 47, 0x0100 }, /* R47 - Output Mixer3 */
44 { 48, 0x0100 }, /* R48 - Output M 44 { 48, 0x0100 }, /* R48 - Output Mixer4 */
45 { 54, 0x0000 }, /* R54 - Speaker 45 { 54, 0x0000 }, /* R54 - Speaker Mixer */
46 { 57, 0x000D }, /* R57 - AntiPOP2 46 { 57, 0x000D }, /* R57 - AntiPOP2 */
47 { 70, 0x0000 }, /* R70 - Write Se 47 { 70, 0x0000 }, /* R70 - Write Sequencer 0 */
48 { 71, 0x0000 }, /* R71 - Write Se 48 { 71, 0x0000 }, /* R71 - Write Sequencer 1 */
49 { 72, 0x0000 }, /* R72 - Write Se 49 { 72, 0x0000 }, /* R72 - Write Sequencer 2 */
50 { 73, 0x0000 }, /* R73 - Write Se 50 { 73, 0x0000 }, /* R73 - Write Sequencer 3 */
51 { 74, 0x0000 }, /* R74 - Write Se 51 { 74, 0x0000 }, /* R74 - Write Sequencer 4 */
52 { 75, 0x0000 }, /* R75 - Write Se 52 { 75, 0x0000 }, /* R75 - Write Sequencer 5 */
53 { 76, 0x1F25 }, /* R76 - Charge P 53 { 76, 0x1F25 }, /* R76 - Charge Pump 1 */
54 { 85, 0x054A }, /* R85 - DC Servo 54 { 85, 0x054A }, /* R85 - DC Servo 1 */
55 { 87, 0x0000 }, /* R87 - DC Servo 55 { 87, 0x0000 }, /* R87 - DC Servo 3 */
56 { 96, 0x0100 }, /* R96 - Analogue 56 { 96, 0x0100 }, /* R96 - Analogue HP 0 */
57 { 98, 0x8640 }, /* R98 - AGC Cont 57 { 98, 0x8640 }, /* R98 - AGC Control 0 */
58 { 99, 0xC000 }, /* R99 - AGC Cont 58 { 99, 0xC000 }, /* R99 - AGC Control 1 */
59 { 100, 0x0200 }, /* R100 - AGC Con 59 { 100, 0x0200 }, /* R100 - AGC Control 2 */
60 }; 60 };
61 61
62 /* This struct is used to save the context */ 62 /* This struct is used to save the context */
63 struct wm9090_priv { 63 struct wm9090_priv {
64 struct wm9090_platform_data pdata; 64 struct wm9090_platform_data pdata;
65 struct regmap *regmap; 65 struct regmap *regmap;
66 }; 66 };
67 67
68 static bool wm9090_volatile(struct device *dev 68 static bool wm9090_volatile(struct device *dev, unsigned int reg)
69 { 69 {
70 switch (reg) { 70 switch (reg) {
71 case WM9090_SOFTWARE_RESET: 71 case WM9090_SOFTWARE_RESET:
72 case WM9090_DC_SERVO_0: 72 case WM9090_DC_SERVO_0:
73 case WM9090_DC_SERVO_READBACK_0: 73 case WM9090_DC_SERVO_READBACK_0:
74 case WM9090_DC_SERVO_READBACK_1: 74 case WM9090_DC_SERVO_READBACK_1:
75 case WM9090_DC_SERVO_READBACK_2: 75 case WM9090_DC_SERVO_READBACK_2:
76 return true; 76 return true;
77 77
78 default: 78 default:
79 return false; 79 return false;
80 } 80 }
81 } 81 }
82 82
83 static bool wm9090_readable(struct device *dev 83 static bool wm9090_readable(struct device *dev, unsigned int reg)
84 { 84 {
85 switch (reg) { 85 switch (reg) {
86 case WM9090_SOFTWARE_RESET: 86 case WM9090_SOFTWARE_RESET:
87 case WM9090_POWER_MANAGEMENT_1: 87 case WM9090_POWER_MANAGEMENT_1:
88 case WM9090_POWER_MANAGEMENT_2: 88 case WM9090_POWER_MANAGEMENT_2:
89 case WM9090_POWER_MANAGEMENT_3: 89 case WM9090_POWER_MANAGEMENT_3:
90 case WM9090_CLOCKING_1: 90 case WM9090_CLOCKING_1:
91 case WM9090_IN1_LINE_CONTROL: 91 case WM9090_IN1_LINE_CONTROL:
92 case WM9090_IN2_LINE_CONTROL: 92 case WM9090_IN2_LINE_CONTROL:
93 case WM9090_IN1_LINE_INPUT_A_VOLUME: 93 case WM9090_IN1_LINE_INPUT_A_VOLUME:
94 case WM9090_IN1_LINE_INPUT_B_VOLUME: 94 case WM9090_IN1_LINE_INPUT_B_VOLUME:
95 case WM9090_IN2_LINE_INPUT_A_VOLUME: 95 case WM9090_IN2_LINE_INPUT_A_VOLUME:
96 case WM9090_IN2_LINE_INPUT_B_VOLUME: 96 case WM9090_IN2_LINE_INPUT_B_VOLUME:
97 case WM9090_LEFT_OUTPUT_VOLUME: 97 case WM9090_LEFT_OUTPUT_VOLUME:
98 case WM9090_RIGHT_OUTPUT_VOLUME: 98 case WM9090_RIGHT_OUTPUT_VOLUME:
99 case WM9090_SPKMIXL_ATTENUATION: 99 case WM9090_SPKMIXL_ATTENUATION:
100 case WM9090_SPKOUT_MIXERS: 100 case WM9090_SPKOUT_MIXERS:
101 case WM9090_CLASSD3: 101 case WM9090_CLASSD3:
102 case WM9090_SPEAKER_VOLUME_LEFT: 102 case WM9090_SPEAKER_VOLUME_LEFT:
103 case WM9090_OUTPUT_MIXER1: 103 case WM9090_OUTPUT_MIXER1:
104 case WM9090_OUTPUT_MIXER2: 104 case WM9090_OUTPUT_MIXER2:
105 case WM9090_OUTPUT_MIXER3: 105 case WM9090_OUTPUT_MIXER3:
106 case WM9090_OUTPUT_MIXER4: 106 case WM9090_OUTPUT_MIXER4:
107 case WM9090_SPEAKER_MIXER: 107 case WM9090_SPEAKER_MIXER:
108 case WM9090_ANTIPOP2: 108 case WM9090_ANTIPOP2:
109 case WM9090_WRITE_SEQUENCER_0: 109 case WM9090_WRITE_SEQUENCER_0:
110 case WM9090_WRITE_SEQUENCER_1: 110 case WM9090_WRITE_SEQUENCER_1:
111 case WM9090_WRITE_SEQUENCER_2: 111 case WM9090_WRITE_SEQUENCER_2:
112 case WM9090_WRITE_SEQUENCER_3: 112 case WM9090_WRITE_SEQUENCER_3:
113 case WM9090_WRITE_SEQUENCER_4: 113 case WM9090_WRITE_SEQUENCER_4:
114 case WM9090_WRITE_SEQUENCER_5: 114 case WM9090_WRITE_SEQUENCER_5:
115 case WM9090_CHARGE_PUMP_1: 115 case WM9090_CHARGE_PUMP_1:
116 case WM9090_DC_SERVO_0: 116 case WM9090_DC_SERVO_0:
117 case WM9090_DC_SERVO_1: 117 case WM9090_DC_SERVO_1:
118 case WM9090_DC_SERVO_3: 118 case WM9090_DC_SERVO_3:
119 case WM9090_DC_SERVO_READBACK_0: 119 case WM9090_DC_SERVO_READBACK_0:
120 case WM9090_DC_SERVO_READBACK_1: 120 case WM9090_DC_SERVO_READBACK_1:
121 case WM9090_DC_SERVO_READBACK_2: 121 case WM9090_DC_SERVO_READBACK_2:
122 case WM9090_ANALOGUE_HP_0: 122 case WM9090_ANALOGUE_HP_0:
123 case WM9090_AGC_CONTROL_0: 123 case WM9090_AGC_CONTROL_0:
124 case WM9090_AGC_CONTROL_1: 124 case WM9090_AGC_CONTROL_1:
125 case WM9090_AGC_CONTROL_2: 125 case WM9090_AGC_CONTROL_2:
126 return true; 126 return true;
127 127
128 default: 128 default:
129 return false; 129 return false;
130 } 130 }
131 } 131 }
132 132
133 static void wait_for_dc_servo(struct snd_soc_c 133 static void wait_for_dc_servo(struct snd_soc_component *component)
134 { 134 {
135 unsigned int reg; 135 unsigned int reg;
136 int count = 0; 136 int count = 0;
137 137
138 dev_dbg(component->dev, "Waiting for D 138 dev_dbg(component->dev, "Waiting for DC servo...\n");
139 do { 139 do {
140 count++; 140 count++;
141 msleep(1); 141 msleep(1);
142 reg = snd_soc_component_read(c 142 reg = snd_soc_component_read(component, WM9090_DC_SERVO_READBACK_0);
143 dev_dbg(component->dev, "DC se 143 dev_dbg(component->dev, "DC servo status: %x\n", reg);
144 } while ((reg & WM9090_DCS_CAL_COMPLET 144 } while ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
145 != WM9090_DCS_CAL_COMPLETE_MA 145 != WM9090_DCS_CAL_COMPLETE_MASK && count < 1000);
146 146
147 if ((reg & WM9090_DCS_CAL_COMPLETE_MAS 147 if ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
148 != WM9090_DCS_CAL_COMPLETE_MASK) 148 != WM9090_DCS_CAL_COMPLETE_MASK)
149 dev_err(component->dev, "Timed 149 dev_err(component->dev, "Timed out waiting for DC Servo\n");
150 } 150 }
151 151
152 static const DECLARE_TLV_DB_RANGE(in_tlv, 152 static const DECLARE_TLV_DB_RANGE(in_tlv,
153 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0), 153 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0),
154 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0), 154 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0),
155 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0) 155 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0)
156 ); 156 );
157 static const DECLARE_TLV_DB_RANGE(mix_tlv, 157 static const DECLARE_TLV_DB_RANGE(mix_tlv,
158 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0) 158 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0),
159 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0) 159 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0)
160 ); 160 );
161 static const DECLARE_TLV_DB_SCALE(out_tlv, -57 161 static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
162 static const DECLARE_TLV_DB_RANGE(spkboost_tlv 162 static const DECLARE_TLV_DB_RANGE(spkboost_tlv,
163 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 163 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
164 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0) 164 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0)
165 ); 165 );
166 166
167 static const struct snd_kcontrol_new wm9090_co 167 static const struct snd_kcontrol_new wm9090_controls[] = {
168 SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_ 168 SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_INPUT_A_VOLUME, 0, 6, 0,
169 in_tlv), 169 in_tlv),
170 SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPU 170 SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 7, 1, 1),
171 SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_I 171 SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 6, 1, 0),
172 172
173 SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_ 173 SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_INPUT_A_VOLUME, 0, 6, 0,
174 in_tlv), 174 in_tlv),
175 SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPU 175 SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 7, 1, 1),
176 SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_I 176 SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 6, 1, 0),
177 177
178 SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIX 178 SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIXER3, 8, 1, 1),
179 SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_O 179 SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_OUTPUT_MIXER3, 6, 3, 1,
180 mix_tlv), 180 mix_tlv),
181 SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_O 181 SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_OUTPUT_MIXER3, 2, 3, 1,
182 mix_tlv), 182 mix_tlv),
183 183
184 SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIX 184 SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIXER4, 8, 1, 1),
185 SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_O 185 SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_OUTPUT_MIXER4, 6, 3, 1,
186 mix_tlv), 186 mix_tlv),
187 SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_O 187 SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_OUTPUT_MIXER4, 2, 3, 1,
188 mix_tlv), 188 mix_tlv),
189 189
190 SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATT 190 SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATTENUATION, 8, 1, 1),
191 SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SP 191 SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SPKMIXL_ATTENUATION, 6, 3, 1,
192 mix_tlv), 192 mix_tlv),
193 SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SP 193 SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SPKMIXL_ATTENUATION, 2, 3, 1,
194 mix_tlv), 194 mix_tlv),
195 195
196 SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LE 196 SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LEFT_OUTPUT_VOLUME,
197 WM9090_RIGHT_OUTPUT_VOLUME, 0 197 WM9090_RIGHT_OUTPUT_VOLUME, 0, 63, 0, out_tlv),
198 SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_O 198 SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_OUTPUT_VOLUME,
199 WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 199 WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 1),
200 SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEF 200 SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEFT_OUTPUT_VOLUME,
201 WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 201 WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
202 202
203 SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKE 203 SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKER_VOLUME_LEFT, 0, 63, 0,
204 out_tlv), 204 out_tlv),
205 SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VO 205 SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VOLUME_LEFT, 6, 1, 1),
206 SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER 206 SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER_VOLUME_LEFT, 7, 1, 0),
207 SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_ 207 SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_CLASSD3, 3, 7, 0, spkboost_tlv),
208 }; 208 };
209 209
210 static const struct snd_kcontrol_new wm9090_in 210 static const struct snd_kcontrol_new wm9090_in1_se_controls[] = {
211 SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_ 211 SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_INPUT_B_VOLUME, 0, 6, 0,
212 in_tlv), 212 in_tlv),
213 SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPU 213 SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 7, 1, 1),
214 SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_I 214 SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 6, 1, 0),
215 215
216 SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SP 216 SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SPKMIXL_ATTENUATION, 4, 3, 1,
217 mix_tlv), 217 mix_tlv),
218 SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_O 218 SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_OUTPUT_MIXER3, 4, 3, 1,
219 mix_tlv), 219 mix_tlv),
220 SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_O 220 SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_OUTPUT_MIXER4, 4, 3, 1,
221 mix_tlv), 221 mix_tlv),
222 }; 222 };
223 223
224 static const struct snd_kcontrol_new wm9090_in 224 static const struct snd_kcontrol_new wm9090_in2_se_controls[] = {
225 SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_ 225 SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_INPUT_B_VOLUME, 0, 6, 0,
226 in_tlv), 226 in_tlv),
227 SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPU 227 SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 7, 1, 1),
228 SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_I 228 SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 6, 1, 0),
229 229
230 SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SP 230 SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SPKMIXL_ATTENUATION, 0, 3, 1,
231 mix_tlv), 231 mix_tlv),
232 SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_O 232 SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_OUTPUT_MIXER3, 0, 3, 1,
233 mix_tlv), 233 mix_tlv),
234 SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_O 234 SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_OUTPUT_MIXER4, 0, 3, 1,
235 mix_tlv), 235 mix_tlv),
236 }; 236 };
237 237
238 static int hp_ev(struct snd_soc_dapm_widget *w 238 static int hp_ev(struct snd_soc_dapm_widget *w,
239 struct snd_kcontrol *kcontrol 239 struct snd_kcontrol *kcontrol, int event)
240 { 240 {
241 struct snd_soc_component *component = 241 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
242 unsigned int reg = snd_soc_component_r 242 unsigned int reg = snd_soc_component_read(component, WM9090_ANALOGUE_HP_0);
243 243
244 switch (event) { 244 switch (event) {
245 case SND_SOC_DAPM_POST_PMU: 245 case SND_SOC_DAPM_POST_PMU:
246 snd_soc_component_update_bits( 246 snd_soc_component_update_bits(component, WM9090_CHARGE_PUMP_1,
247 WM9090_CP_ 247 WM9090_CP_ENA, WM9090_CP_ENA);
248 248
249 msleep(5); 249 msleep(5);
250 250
251 snd_soc_component_update_bits( 251 snd_soc_component_update_bits(component, WM9090_POWER_MANAGEMENT_1,
252 WM9090_HPO 252 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
253 WM9090_HPO 253 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA);
254 254
255 reg |= WM9090_HPOUT1L_DLY | WM 255 reg |= WM9090_HPOUT1L_DLY | WM9090_HPOUT1R_DLY;
256 snd_soc_component_write(compon 256 snd_soc_component_write(component, WM9090_ANALOGUE_HP_0, reg);
257 257
258 /* Start the DC servo. We don 258 /* Start the DC servo. We don't currently use the
259 * ability to save the state s 259 * ability to save the state since we don't have full
260 * control of the analogue pat 260 * control of the analogue paths and they can change
261 * DC offsets; see the WM8904 261 * DC offsets; see the WM8904 driver for an example of
262 * doing so. 262 * doing so.
263 */ 263 */
264 snd_soc_component_write(compon 264 snd_soc_component_write(component, WM9090_DC_SERVO_0,
265 WM9090_DCS_ENA_C 265 WM9090_DCS_ENA_CHAN_0 |
266 WM9090_DCS_ENA_C 266 WM9090_DCS_ENA_CHAN_1 |
267 WM9090_DCS_TRIG_ 267 WM9090_DCS_TRIG_STARTUP_1 |
268 WM9090_DCS_TRIG_ 268 WM9090_DCS_TRIG_STARTUP_0);
269 wait_for_dc_servo(component); 269 wait_for_dc_servo(component);
270 270
271 reg |= WM9090_HPOUT1R_OUTP | W 271 reg |= WM9090_HPOUT1R_OUTP | WM9090_HPOUT1R_RMV_SHORT |
272 WM9090_HPOUT1L_OUTP | 272 WM9090_HPOUT1L_OUTP | WM9090_HPOUT1L_RMV_SHORT;
273 snd_soc_component_write(compon 273 snd_soc_component_write(component, WM9090_ANALOGUE_HP_0, reg);
274 break; 274 break;
275 275
276 case SND_SOC_DAPM_PRE_PMD: 276 case SND_SOC_DAPM_PRE_PMD:
277 reg &= ~(WM9090_HPOUT1L_RMV_SH 277 reg &= ~(WM9090_HPOUT1L_RMV_SHORT |
278 WM9090_HPOUT1L_DLY | 278 WM9090_HPOUT1L_DLY |
279 WM9090_HPOUT1L_OUTP | 279 WM9090_HPOUT1L_OUTP |
280 WM9090_HPOUT1R_RMV_SH 280 WM9090_HPOUT1R_RMV_SHORT |
281 WM9090_HPOUT1R_DLY | 281 WM9090_HPOUT1R_DLY |
282 WM9090_HPOUT1R_OUTP); 282 WM9090_HPOUT1R_OUTP);
283 283
284 snd_soc_component_write(compon 284 snd_soc_component_write(component, WM9090_ANALOGUE_HP_0, reg);
285 285
286 snd_soc_component_write(compon 286 snd_soc_component_write(component, WM9090_DC_SERVO_0, 0);
287 287
288 snd_soc_component_update_bits( 288 snd_soc_component_update_bits(component, WM9090_POWER_MANAGEMENT_1,
289 WM9090_HPO 289 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
290 0); 290 0);
291 291
292 snd_soc_component_update_bits( 292 snd_soc_component_update_bits(component, WM9090_CHARGE_PUMP_1,
293 WM9090_CP_ 293 WM9090_CP_ENA, 0);
294 break; 294 break;
295 } 295 }
296 296
297 return 0; 297 return 0;
298 } 298 }
299 299
300 static const struct snd_kcontrol_new spkmix[] 300 static const struct snd_kcontrol_new spkmix[] = {
301 SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_ 301 SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_MIXER, 6, 1, 0),
302 SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_ 302 SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_MIXER, 4, 1, 0),
303 SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_ 303 SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_MIXER, 2, 1, 0),
304 SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_ 304 SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_MIXER, 0, 1, 0),
305 }; 305 };
306 306
307 static const struct snd_kcontrol_new spkout[] 307 static const struct snd_kcontrol_new spkout[] = {
308 SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_ 308 SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_MIXERS, 4, 1, 0),
309 }; 309 };
310 310
311 static const struct snd_kcontrol_new mixoutl[] 311 static const struct snd_kcontrol_new mixoutl[] = {
312 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_M 312 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER1, 6, 1, 0),
313 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_M 313 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER1, 4, 1, 0),
314 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_M 314 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER1, 2, 1, 0),
315 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_M 315 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER1, 0, 1, 0),
316 }; 316 };
317 317
318 static const struct snd_kcontrol_new mixoutr[] 318 static const struct snd_kcontrol_new mixoutr[] = {
319 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_M 319 SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER2, 6, 1, 0),
320 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_M 320 SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER2, 4, 1, 0),
321 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_M 321 SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER2, 2, 1, 0),
322 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_M 322 SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER2, 0, 1, 0),
323 }; 323 };
324 324
325 static const struct snd_soc_dapm_widget wm9090 325 static const struct snd_soc_dapm_widget wm9090_dapm_widgets[] = {
326 SND_SOC_DAPM_INPUT("IN1+"), 326 SND_SOC_DAPM_INPUT("IN1+"),
327 SND_SOC_DAPM_INPUT("IN1-"), 327 SND_SOC_DAPM_INPUT("IN1-"),
328 SND_SOC_DAPM_INPUT("IN2+"), 328 SND_SOC_DAPM_INPUT("IN2+"),
329 SND_SOC_DAPM_INPUT("IN2-"), 329 SND_SOC_DAPM_INPUT("IN2-"),
330 330
331 SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGE 331 SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGEMENT_1, 3, 0, NULL, 0),
332 332
333 SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANA 333 SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANAGEMENT_2, 7, 0, NULL, 0),
334 SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANA 334 SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANAGEMENT_2, 6, 0, NULL, 0),
335 SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANA 335 SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
336 SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANA 336 SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
337 337
338 SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANA 338 SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANAGEMENT_3, 3, 0,
339 spkmix, ARRAY_SIZE(spkmix)) 339 spkmix, ARRAY_SIZE(spkmix)),
340 SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MAN 340 SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MANAGEMENT_3, 5, 0,
341 mixoutl, ARRAY_SIZE(mixoutl 341 mixoutl, ARRAY_SIZE(mixoutl)),
342 SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MAN 342 SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MANAGEMENT_3, 4, 0,
343 mixoutr, ARRAY_SIZE(mixoutr 343 mixoutr, ARRAY_SIZE(mixoutr)),
344 344
345 SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 345 SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
346 hp_ev, SND_SOC_DAPM_POST_PM 346 hp_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
347 347
348 SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGE 348 SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGEMENT_3, 8, 0, NULL, 0),
349 SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANA 349 SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANAGEMENT_1, 12, 0,
350 spkout, ARRAY_SIZE(spkout)) 350 spkout, ARRAY_SIZE(spkout)),
351 351
352 SND_SOC_DAPM_OUTPUT("HPR"), 352 SND_SOC_DAPM_OUTPUT("HPR"),
353 SND_SOC_DAPM_OUTPUT("HPL"), 353 SND_SOC_DAPM_OUTPUT("HPL"),
354 SND_SOC_DAPM_OUTPUT("Speaker"), 354 SND_SOC_DAPM_OUTPUT("Speaker"),
355 }; 355 };
356 356
357 static const struct snd_soc_dapm_route audio_m 357 static const struct snd_soc_dapm_route audio_map[] = {
358 { "IN1A PGA", NULL, "IN1+" }, 358 { "IN1A PGA", NULL, "IN1+" },
359 { "IN2A PGA", NULL, "IN2+" }, 359 { "IN2A PGA", NULL, "IN2+" },
360 360
361 { "SPKMIX", "IN1A Switch", "IN1A PGA" 361 { "SPKMIX", "IN1A Switch", "IN1A PGA" },
362 { "SPKMIX", "IN2A Switch", "IN2A PGA" 362 { "SPKMIX", "IN2A Switch", "IN2A PGA" },
363 363
364 { "MIXOUTL", "IN1A Switch", "IN1A PGA" 364 { "MIXOUTL", "IN1A Switch", "IN1A PGA" },
365 { "MIXOUTL", "IN2A Switch", "IN2A PGA" 365 { "MIXOUTL", "IN2A Switch", "IN2A PGA" },
366 366
367 { "MIXOUTR", "IN1A Switch", "IN1A PGA" 367 { "MIXOUTR", "IN1A Switch", "IN1A PGA" },
368 { "MIXOUTR", "IN2A Switch", "IN2A PGA" 368 { "MIXOUTR", "IN2A Switch", "IN2A PGA" },
369 369
370 { "HP PGA", NULL, "OSC" }, 370 { "HP PGA", NULL, "OSC" },
371 { "HP PGA", NULL, "MIXOUTL" }, 371 { "HP PGA", NULL, "MIXOUTL" },
372 { "HP PGA", NULL, "MIXOUTR" }, 372 { "HP PGA", NULL, "MIXOUTR" },
373 373
374 { "HPL", NULL, "HP PGA" }, 374 { "HPL", NULL, "HP PGA" },
375 { "HPR", NULL, "HP PGA" }, 375 { "HPR", NULL, "HP PGA" },
376 376
377 { "SPKPGA", NULL, "OSC" }, 377 { "SPKPGA", NULL, "OSC" },
378 { "SPKPGA", NULL, "SPKMIX" }, 378 { "SPKPGA", NULL, "SPKMIX" },
379 379
380 { "SPKOUT", "Mixer Switch", "SPKPGA" } 380 { "SPKOUT", "Mixer Switch", "SPKPGA" },
381 381
382 { "Speaker", NULL, "SPKOUT" }, 382 { "Speaker", NULL, "SPKOUT" },
383 }; 383 };
384 384
385 static const struct snd_soc_dapm_route audio_m 385 static const struct snd_soc_dapm_route audio_map_in1_se[] = {
386 { "IN1B PGA", NULL, "IN1-" }, 386 { "IN1B PGA", NULL, "IN1-" },
387 387
388 { "SPKMIX", "IN1B Switch", "IN1B PGA" 388 { "SPKMIX", "IN1B Switch", "IN1B PGA" },
389 { "MIXOUTL", "IN1B Switch", "IN1B PGA" 389 { "MIXOUTL", "IN1B Switch", "IN1B PGA" },
390 { "MIXOUTR", "IN1B Switch", "IN1B PGA" 390 { "MIXOUTR", "IN1B Switch", "IN1B PGA" },
391 }; 391 };
392 392
393 static const struct snd_soc_dapm_route audio_m 393 static const struct snd_soc_dapm_route audio_map_in1_diff[] = {
394 { "IN1A PGA", NULL, "IN1-" }, 394 { "IN1A PGA", NULL, "IN1-" },
395 }; 395 };
396 396
397 static const struct snd_soc_dapm_route audio_m 397 static const struct snd_soc_dapm_route audio_map_in2_se[] = {
398 { "IN2B PGA", NULL, "IN2-" }, 398 { "IN2B PGA", NULL, "IN2-" },
399 399
400 { "SPKMIX", "IN2B Switch", "IN2B PGA" 400 { "SPKMIX", "IN2B Switch", "IN2B PGA" },
401 { "MIXOUTL", "IN2B Switch", "IN2B PGA" 401 { "MIXOUTL", "IN2B Switch", "IN2B PGA" },
402 { "MIXOUTR", "IN2B Switch", "IN2B PGA" 402 { "MIXOUTR", "IN2B Switch", "IN2B PGA" },
403 }; 403 };
404 404
405 static const struct snd_soc_dapm_route audio_m 405 static const struct snd_soc_dapm_route audio_map_in2_diff[] = {
406 { "IN2A PGA", NULL, "IN2-" }, 406 { "IN2A PGA", NULL, "IN2-" },
407 }; 407 };
408 408
409 static int wm9090_add_controls(struct snd_soc_ 409 static int wm9090_add_controls(struct snd_soc_component *component)
410 { 410 {
411 struct wm9090_priv *wm9090 = snd_soc_c 411 struct wm9090_priv *wm9090 = snd_soc_component_get_drvdata(component);
412 struct snd_soc_dapm_context *dapm = sn 412 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
413 int i; 413 int i;
414 414
415 snd_soc_dapm_new_controls(dapm, wm9090 415 snd_soc_dapm_new_controls(dapm, wm9090_dapm_widgets,
416 ARRAY_SIZE(w 416 ARRAY_SIZE(wm9090_dapm_widgets));
417 417
418 snd_soc_dapm_add_routes(dapm, audio_ma 418 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
419 419
420 snd_soc_add_component_controls(compone 420 snd_soc_add_component_controls(component, wm9090_controls,
421 ARRAY_SIZE(wm9090 421 ARRAY_SIZE(wm9090_controls));
422 422
423 if (wm9090->pdata.lin1_diff) { 423 if (wm9090->pdata.lin1_diff) {
424 snd_soc_dapm_add_routes(dapm, 424 snd_soc_dapm_add_routes(dapm, audio_map_in1_diff,
425 ARRAY_ 425 ARRAY_SIZE(audio_map_in1_diff));
426 } else { 426 } else {
427 snd_soc_dapm_add_routes(dapm, 427 snd_soc_dapm_add_routes(dapm, audio_map_in1_se,
428 ARRAY_ 428 ARRAY_SIZE(audio_map_in1_se));
429 snd_soc_add_component_controls 429 snd_soc_add_component_controls(component, wm9090_in1_se_controls,
430 ARRAY_SIZ 430 ARRAY_SIZE(wm9090_in1_se_controls));
431 } 431 }
432 432
433 if (wm9090->pdata.lin2_diff) { 433 if (wm9090->pdata.lin2_diff) {
434 snd_soc_dapm_add_routes(dapm, 434 snd_soc_dapm_add_routes(dapm, audio_map_in2_diff,
435 ARRAY_ 435 ARRAY_SIZE(audio_map_in2_diff));
436 } else { 436 } else {
437 snd_soc_dapm_add_routes(dapm, 437 snd_soc_dapm_add_routes(dapm, audio_map_in2_se,
438 ARRAY_ 438 ARRAY_SIZE(audio_map_in2_se));
439 snd_soc_add_component_controls 439 snd_soc_add_component_controls(component, wm9090_in2_se_controls,
440 ARRAY_SIZ 440 ARRAY_SIZE(wm9090_in2_se_controls));
441 } 441 }
442 442
443 if (wm9090->pdata.agc_ena) { 443 if (wm9090->pdata.agc_ena) {
444 for (i = 0; i < ARRAY_SIZE(wm9 444 for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++)
445 snd_soc_component_writ 445 snd_soc_component_write(component, WM9090_AGC_CONTROL_0 + i,
446 wm9090-> 446 wm9090->pdata.agc[i]);
447 snd_soc_component_update_bits( 447 snd_soc_component_update_bits(component, WM9090_POWER_MANAGEMENT_3,
448 WM9090_AGC 448 WM9090_AGC_ENA, WM9090_AGC_ENA);
449 } else { 449 } else {
450 snd_soc_component_update_bits( 450 snd_soc_component_update_bits(component, WM9090_POWER_MANAGEMENT_3,
451 WM9090_AGC 451 WM9090_AGC_ENA, 0);
452 } 452 }
453 453
454 return 0; 454 return 0;
455 455
456 } 456 }
457 457
458 /* 458 /*
459 * The machine driver should call this from th 459 * The machine driver should call this from their set_bias_level; if there
460 * isn't one then this can just be set as the 460 * isn't one then this can just be set as the set_bias_level function.
461 */ 461 */
462 static int wm9090_set_bias_level(struct snd_so 462 static int wm9090_set_bias_level(struct snd_soc_component *component,
463 enum snd_soc_ 463 enum snd_soc_bias_level level)
464 { 464 {
465 struct wm9090_priv *wm9090 = snd_soc_c 465 struct wm9090_priv *wm9090 = snd_soc_component_get_drvdata(component);
466 466
467 switch (level) { 467 switch (level) {
468 case SND_SOC_BIAS_ON: 468 case SND_SOC_BIAS_ON:
469 break; 469 break;
470 470
471 case SND_SOC_BIAS_PREPARE: 471 case SND_SOC_BIAS_PREPARE:
472 snd_soc_component_update_bits( 472 snd_soc_component_update_bits(component, WM9090_ANTIPOP2, WM9090_VMID_ENA,
473 WM9090_VMI 473 WM9090_VMID_ENA);
474 snd_soc_component_update_bits( 474 snd_soc_component_update_bits(component, WM9090_POWER_MANAGEMENT_1,
475 WM9090_BIA 475 WM9090_BIAS_ENA |
476 WM9090_VMI 476 WM9090_VMID_RES_MASK,
477 WM9090_BIA 477 WM9090_BIAS_ENA |
478 1 << WM909 478 1 << WM9090_VMID_RES_SHIFT);
479 msleep(1); /* Probably an ove 479 msleep(1); /* Probably an overestimate */
480 break; 480 break;
481 481
482 case SND_SOC_BIAS_STANDBY: 482 case SND_SOC_BIAS_STANDBY:
483 if (snd_soc_component_get_bias 483 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
484 /* Restore the registe 484 /* Restore the register cache */
485 regcache_sync(wm9090-> 485 regcache_sync(wm9090->regmap);
486 } 486 }
487 487
488 /* We keep VMID off during sta 488 /* We keep VMID off during standby since the combination of
489 * ground referenced outputs a 489 * ground referenced outputs and class D speaker mean that
490 * latency is not an issue. 490 * latency is not an issue.
491 */ 491 */
492 snd_soc_component_update_bits( 492 snd_soc_component_update_bits(component, WM9090_POWER_MANAGEMENT_1,
493 WM9090_BIA 493 WM9090_BIAS_ENA | WM9090_VMID_RES_MASK, 0);
494 snd_soc_component_update_bits( 494 snd_soc_component_update_bits(component, WM9090_ANTIPOP2,
495 WM9090_VMI 495 WM9090_VMID_ENA, 0);
496 break; 496 break;
497 497
498 case SND_SOC_BIAS_OFF: 498 case SND_SOC_BIAS_OFF:
499 break; 499 break;
500 } 500 }
501 501
502 return 0; 502 return 0;
503 } 503 }
504 504
505 static int wm9090_probe(struct snd_soc_compone 505 static int wm9090_probe(struct snd_soc_component *component)
506 { 506 {
507 /* Configure some defaults; they will 507 /* Configure some defaults; they will be written out when we
508 * bring the bias up. 508 * bring the bias up.
509 */ 509 */
510 snd_soc_component_update_bits(componen 510 snd_soc_component_update_bits(component, WM9090_IN1_LINE_INPUT_A_VOLUME,
511 WM9090_IN1_VU | WM 511 WM9090_IN1_VU | WM9090_IN1A_ZC,
512 WM9090_IN1_VU | WM 512 WM9090_IN1_VU | WM9090_IN1A_ZC);
513 snd_soc_component_update_bits(componen 513 snd_soc_component_update_bits(component, WM9090_IN1_LINE_INPUT_B_VOLUME,
514 WM9090_IN1_VU | WM 514 WM9090_IN1_VU | WM9090_IN1B_ZC,
515 WM9090_IN1_VU | WM 515 WM9090_IN1_VU | WM9090_IN1B_ZC);
516 snd_soc_component_update_bits(componen 516 snd_soc_component_update_bits(component, WM9090_IN2_LINE_INPUT_A_VOLUME,
517 WM9090_IN2_VU | WM 517 WM9090_IN2_VU | WM9090_IN2A_ZC,
518 WM9090_IN2_VU | WM 518 WM9090_IN2_VU | WM9090_IN2A_ZC);
519 snd_soc_component_update_bits(componen 519 snd_soc_component_update_bits(component, WM9090_IN2_LINE_INPUT_B_VOLUME,
520 WM9090_IN2_VU | WM 520 WM9090_IN2_VU | WM9090_IN2B_ZC,
521 WM9090_IN2_VU | WM 521 WM9090_IN2_VU | WM9090_IN2B_ZC);
522 snd_soc_component_update_bits(componen 522 snd_soc_component_update_bits(component, WM9090_SPEAKER_VOLUME_LEFT,
523 WM9090_SPKOUT_VU | 523 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC,
524 WM9090_SPKOUT_VU | 524 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC);
525 snd_soc_component_update_bits(componen 525 snd_soc_component_update_bits(component, WM9090_LEFT_OUTPUT_VOLUME,
526 WM9090_HPOUT1_VU | 526 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC,
527 WM9090_HPOUT1_VU | 527 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC);
528 snd_soc_component_update_bits(componen 528 snd_soc_component_update_bits(component, WM9090_RIGHT_OUTPUT_VOLUME,
529 WM9090_HPOUT1_VU | 529 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC,
530 WM9090_HPOUT1_VU | 530 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC);
531 531
532 snd_soc_component_update_bits(componen 532 snd_soc_component_update_bits(component, WM9090_CLOCKING_1,
533 WM9090_TOCLK_ENA, 533 WM9090_TOCLK_ENA, WM9090_TOCLK_ENA);
534 534
535 wm9090_add_controls(component); 535 wm9090_add_controls(component);
536 536
537 return 0; 537 return 0;
538 } 538 }
539 539
540 static const struct snd_soc_component_driver s 540 static const struct snd_soc_component_driver soc_component_dev_wm9090 = {
541 .probe = wm9090_probe 541 .probe = wm9090_probe,
542 .set_bias_level = wm9090_set_b 542 .set_bias_level = wm9090_set_bias_level,
543 .suspend_bias_off = 1, 543 .suspend_bias_off = 1,
544 .idle_bias_on = 1, 544 .idle_bias_on = 1,
545 .use_pmdown_time = 1, 545 .use_pmdown_time = 1,
546 }; 546 };
547 547
548 static const struct regmap_config wm9090_regma 548 static const struct regmap_config wm9090_regmap = {
549 .reg_bits = 8, 549 .reg_bits = 8,
550 .val_bits = 16, 550 .val_bits = 16,
551 551
552 .max_register = WM9090_MAX_REGISTER, 552 .max_register = WM9090_MAX_REGISTER,
553 .volatile_reg = wm9090_volatile, 553 .volatile_reg = wm9090_volatile,
554 .readable_reg = wm9090_readable, 554 .readable_reg = wm9090_readable,
555 555
556 .cache_type = REGCACHE_MAPLE, 556 .cache_type = REGCACHE_MAPLE,
557 .reg_defaults = wm9090_reg_defaults, 557 .reg_defaults = wm9090_reg_defaults,
558 .num_reg_defaults = ARRAY_SIZE(wm9090_ 558 .num_reg_defaults = ARRAY_SIZE(wm9090_reg_defaults),
559 }; 559 };
560 560
561 561
562 static int wm9090_i2c_probe(struct i2c_client 562 static int wm9090_i2c_probe(struct i2c_client *i2c)
563 { 563 {
564 struct wm9090_priv *wm9090; 564 struct wm9090_priv *wm9090;
565 unsigned int reg; 565 unsigned int reg;
566 int ret; 566 int ret;
567 567
568 wm9090 = devm_kzalloc(&i2c->dev, sizeo 568 wm9090 = devm_kzalloc(&i2c->dev, sizeof(*wm9090), GFP_KERNEL);
569 if (!wm9090) 569 if (!wm9090)
570 return -ENOMEM; 570 return -ENOMEM;
571 571
572 wm9090->regmap = devm_regmap_init_i2c( 572 wm9090->regmap = devm_regmap_init_i2c(i2c, &wm9090_regmap);
573 if (IS_ERR(wm9090->regmap)) { 573 if (IS_ERR(wm9090->regmap)) {
574 ret = PTR_ERR(wm9090->regmap); 574 ret = PTR_ERR(wm9090->regmap);
575 dev_err(&i2c->dev, "Failed to 575 dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
576 return ret; 576 return ret;
577 } 577 }
578 578
579 ret = regmap_read(wm9090->regmap, WM90 579 ret = regmap_read(wm9090->regmap, WM9090_SOFTWARE_RESET, ®);
580 if (ret < 0) 580 if (ret < 0)
581 return ret; 581 return ret;
582 582
583 if (reg != 0x9093) { 583 if (reg != 0x9093) {
584 dev_err(&i2c->dev, "Device is 584 dev_err(&i2c->dev, "Device is not a WM9090, ID=%x\n", reg);
585 return -ENODEV; 585 return -ENODEV;
586 } 586 }
587 587
588 ret = regmap_write(wm9090->regmap, WM9 588 ret = regmap_write(wm9090->regmap, WM9090_SOFTWARE_RESET, 0);
589 if (ret < 0) 589 if (ret < 0)
590 return ret; 590 return ret;
591 591
592 if (i2c->dev.platform_data) 592 if (i2c->dev.platform_data)
593 memcpy(&wm9090->pdata, i2c->de 593 memcpy(&wm9090->pdata, i2c->dev.platform_data,
594 sizeof(wm9090->pdata)); 594 sizeof(wm9090->pdata));
595 595
596 i2c_set_clientdata(i2c, wm9090); 596 i2c_set_clientdata(i2c, wm9090);
597 597
598 ret = devm_snd_soc_register_component 598 ret = devm_snd_soc_register_component(&i2c->dev,
599 &soc_component_dev_wm9 599 &soc_component_dev_wm9090, NULL, 0);
600 if (ret != 0) { 600 if (ret != 0) {
601 dev_err(&i2c->dev, "Failed to 601 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
602 return ret; 602 return ret;
603 } 603 }
604 604
605 return 0; 605 return 0;
606 } 606 }
607 607
608 static const struct i2c_device_id wm9090_id[] 608 static const struct i2c_device_id wm9090_id[] = {
609 { "wm9090" }, !! 609 { "wm9090", 0 },
610 { "wm9093" }, !! 610 { "wm9093", 0 },
611 { } 611 { }
612 }; 612 };
613 MODULE_DEVICE_TABLE(i2c, wm9090_id); 613 MODULE_DEVICE_TABLE(i2c, wm9090_id);
614 614
615 static struct i2c_driver wm9090_i2c_driver = { 615 static struct i2c_driver wm9090_i2c_driver = {
616 .driver = { 616 .driver = {
617 .name = "wm9090", 617 .name = "wm9090",
618 }, 618 },
619 .probe = wm9090_i2c_probe, 619 .probe = wm9090_i2c_probe,
620 .id_table = wm9090_id, 620 .id_table = wm9090_id,
621 }; 621 };
622 622
623 module_i2c_driver(wm9090_i2c_driver); 623 module_i2c_driver(wm9090_i2c_driver);
624 624
625 MODULE_AUTHOR("Mark Brown <broonie@opensource. 625 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
626 MODULE_DESCRIPTION("WM9090 ASoC driver"); 626 MODULE_DESCRIPTION("WM9090 ASoC driver");
627 MODULE_LICENSE("GPL"); 627 MODULE_LICENSE("GPL");
628 628
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