1 // SPDX-License-Identifier: GPL-2.0 1
2 //
3 // Copyright (c) 2020 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com
5
6 #include <linux/bitfield.h>
7 #include <sound/pcm_params.h>
8 #include <sound/soc.h>
9 #include <sound/soc-dai.h>
10
11 #include <dt-bindings/sound/meson-aiu.h>
12 #include "aiu.h"
13 #include "meson-codec-glue.h"
14
15 #define CTRL_CLK_SEL GENMASK(1, 0)
16 #define CTRL_DATA_SEL_SHIFT 4
17 #define CTRL_DATA_SEL (0x3 << CTRL_D
18
19 static const char * const aiu_codec_ctrl_mux_t
20 "DISABLED", "PCM", "I2S",
21 };
22
23 static int aiu_codec_ctrl_mux_put_enum(struct
24 struct
25 {
26 struct snd_soc_component *component =
27 snd_soc_dapm_kcontrol_componen
28 struct snd_soc_dapm_context *dapm =
29 snd_soc_dapm_kcontrol_dapm(kco
30 struct soc_enum *e = (struct soc_enum
31 unsigned int mux, changed;
32
33 mux = snd_soc_enum_item_to_val(e, ucon
34 changed = snd_soc_component_test_bits(
35
36
37
38 if (!changed)
39 return 0;
40
41 /* Force disconnect of the mux while u
42 snd_soc_dapm_mux_update_power(dapm, kc
43
44 /* Reset the source first */
45 snd_soc_component_update_bits(componen
46 CTRL_CLK
47 CTRL_DAT
48 FIELD_PR
49 FIELD_PR
50
51 /* Set the appropriate source */
52 snd_soc_component_update_bits(componen
53 CTRL_CLK
54 CTRL_DAT
55 FIELD_PR
56 FIELD_PR
57
58 snd_soc_dapm_mux_update_power(dapm, kc
59
60 return 1;
61 }
62
63 static SOC_ENUM_SINGLE_DECL(aiu_hdmi_ctrl_mux_
64 CTRL_DATA_SEL_SHIF
65 aiu_codec_ctrl_mux
66
67 static const struct snd_kcontrol_new aiu_hdmi_
68 SOC_DAPM_ENUM_EXT("HDMI Source", aiu_h
69 snd_soc_dapm_get_enu
70 aiu_codec_ctrl_mux_p
71
72 static const struct snd_soc_dapm_widget aiu_hd
73 SND_SOC_DAPM_MUX("HDMI CTRL SRC", SND_
74 &aiu_hdmi_ctrl_mux),
75 };
76
77 static const struct snd_soc_dai_ops aiu_codec_
78 .probe = meson_codec_glue_inp
79 .remove = meson_codec_glue_inp
80 .hw_params = meson_codec_glue_inp
81 .set_fmt = meson_codec_glue_inp
82 };
83
84 static const struct snd_soc_dai_ops aiu_codec_
85 .startup = meson_codec_glue_out
86 };
87
88 #define AIU_CODEC_CTRL_FORMATS
89 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_F
90 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_
91 SNDRV_PCM_FMTBIT_S32_LE)
92
93 #define AIU_CODEC_CTRL_STREAM(xname, xsuffix)
94 {
95 .stream_name = xname " " xsuffix,
96 .channels_min = 1,
97 .channels_max = 8,
98 .rate_min = 5512,
99 .rate_max = 192000,
100 .formats = AIU_CODEC_CTRL_FORMA
101 }
102
103 #define AIU_CODEC_CTRL_INPUT(xname) {
104 .name = "CODEC CTRL " xname,
105 .playback = AIU_CODEC_CTRL_STREAM(xnam
106 .ops = &aiu_codec_ctrl_input_ops,
107 }
108
109 #define AIU_CODEC_CTRL_OUTPUT(xname) {
110 .name = "CODEC CTRL " xname,
111 .capture = AIU_CODEC_CTRL_STREAM(xname
112 .ops = &aiu_codec_ctrl_output_ops,
113 }
114
115 static struct snd_soc_dai_driver aiu_hdmi_ctrl
116 [CTRL_I2S] = AIU_CODEC_CTRL_INPUT("HDM
117 [CTRL_PCM] = AIU_CODEC_CTRL_INPUT("HDM
118 [CTRL_OUT] = AIU_CODEC_CTRL_OUTPUT("HD
119 };
120
121 static const struct snd_soc_dapm_route aiu_hdm
122 { "HDMI CTRL SRC", "I2S", "HDMI I2S IN
123 { "HDMI CTRL SRC", "PCM", "HDMI PCM IN
124 { "HDMI OUT Capture", NULL, "HDMI CTRL
125 };
126
127 static int aiu_hdmi_of_xlate_dai_name(struct s
128 const st
129 const ch
130 {
131 return aiu_of_xlate_dai_name(component
132 }
133
134 static const struct snd_soc_component_driver a
135 .name = "AIU HDMI Co
136 .dapm_widgets = aiu_hdmi_ctr
137 .num_dapm_widgets = ARRAY_SIZE(a
138 .dapm_routes = aiu_hdmi_ctr
139 .num_dapm_routes = ARRAY_SIZE(a
140 .of_xlate_dai_name = aiu_hdmi_of_
141 .endianness = 1,
142 #ifdef CONFIG_DEBUG_FS
143 .debugfs_prefix = "hdmi",
144 #endif
145 };
146
147 int aiu_hdmi_ctrl_register_component(struct de
148 {
149 return snd_soc_register_component(dev,
150 aiu_
151 ARRA
152 }
153
154
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