1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 * 2 *
3 * Copyright (c) 2018 Baylibre SAS. 3 * Copyright (c) 2018 Baylibre SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com 4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */ 5 */
6 6
7 #ifndef _MESON_AXG_TDM_H 7 #ifndef _MESON_AXG_TDM_H
8 #define _MESON_AXG_TDM_H 8 #define _MESON_AXG_TDM_H
9 9
10 #include <linux/clk.h> 10 #include <linux/clk.h>
11 #include <linux/regmap.h> 11 #include <linux/regmap.h>
12 #include <sound/pcm.h> 12 #include <sound/pcm.h>
13 #include <sound/soc.h> 13 #include <sound/soc.h>
14 #include <sound/soc-dai.h> 14 #include <sound/soc-dai.h>
15 15
16 #define AXG_TDM_NUM_LANES 4 16 #define AXG_TDM_NUM_LANES 4
17 #define AXG_TDM_CHANNEL_MAX 128 17 #define AXG_TDM_CHANNEL_MAX 128
18 #define AXG_TDM_RATES (SNDRV_PCM_RAT 18 #define AXG_TDM_RATES (SNDRV_PCM_RATE_5512 | \
19 SNDRV_PCM_RAT !! 19 SNDRV_PCM_RATE_8000_192000)
20 #define AXG_TDM_FORMATS (SNDRV_PCM_FMT 20 #define AXG_TDM_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
21 SNDRV_PCM_FMT 21 SNDRV_PCM_FMTBIT_S16_LE | \
22 SNDRV_PCM_FMT 22 SNDRV_PCM_FMTBIT_S20_LE | \
23 SNDRV_PCM_FMT 23 SNDRV_PCM_FMTBIT_S24_LE | \
24 SNDRV_PCM_FMT 24 SNDRV_PCM_FMTBIT_S32_LE)
25 25
26 struct axg_tdm_iface { 26 struct axg_tdm_iface {
27 struct clk *sclk; 27 struct clk *sclk;
28 struct clk *lrclk; 28 struct clk *lrclk;
29 struct clk *mclk; 29 struct clk *mclk;
30 unsigned long mclk_rate; 30 unsigned long mclk_rate;
31 31
32 /* format is common to all the DAIs of 32 /* format is common to all the DAIs of the iface */
33 unsigned int fmt; 33 unsigned int fmt;
34 unsigned int slots; 34 unsigned int slots;
35 unsigned int slot_width; 35 unsigned int slot_width;
36 36
37 /* For component wide symmetry */ 37 /* For component wide symmetry */
38 int rate; 38 int rate;
39 }; 39 };
40 40
41 static inline bool axg_tdm_lrclk_invert(unsign 41 static inline bool axg_tdm_lrclk_invert(unsigned int fmt)
42 { 42 {
43 return ((fmt & SND_SOC_DAIFMT_FORMAT_M 43 return ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_I2S) ^
44 !!(fmt & (SND_SOC_DAIFMT_IB_IF 44 !!(fmt & (SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_NB_IF));
45 } 45 }
46 46
47 static inline bool axg_tdm_sclk_invert(unsigne 47 static inline bool axg_tdm_sclk_invert(unsigned int fmt)
48 { 48 {
49 return fmt & (SND_SOC_DAIFMT_IB_IF | S 49 return fmt & (SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_IB_NF);
50 } 50 }
51 51
52 struct axg_tdm_stream { 52 struct axg_tdm_stream {
53 struct axg_tdm_iface *iface; 53 struct axg_tdm_iface *iface;
54 struct list_head formatter_list; 54 struct list_head formatter_list;
55 struct mutex lock; 55 struct mutex lock;
56 unsigned int channels; 56 unsigned int channels;
57 unsigned int width; 57 unsigned int width;
58 unsigned int physical_width; 58 unsigned int physical_width;
59 u32 *mask; 59 u32 *mask;
60 bool ready; 60 bool ready;
61 <<
62 /* For continuous clock tracking */ <<
63 bool clk_enabled; <<
64 }; 61 };
65 62
66 struct axg_tdm_stream *axg_tdm_stream_alloc(st 63 struct axg_tdm_stream *axg_tdm_stream_alloc(struct axg_tdm_iface *iface);
67 void axg_tdm_stream_free(struct axg_tdm_stream 64 void axg_tdm_stream_free(struct axg_tdm_stream *ts);
68 int axg_tdm_stream_start(struct axg_tdm_stream 65 int axg_tdm_stream_start(struct axg_tdm_stream *ts);
69 void axg_tdm_stream_stop(struct axg_tdm_stream 66 void axg_tdm_stream_stop(struct axg_tdm_stream *ts);
70 int axg_tdm_stream_set_cont_clocks(struct axg_ <<
71 unsigned in <<
72 67
73 static inline int axg_tdm_stream_reset(struct 68 static inline int axg_tdm_stream_reset(struct axg_tdm_stream *ts)
74 { 69 {
75 axg_tdm_stream_stop(ts); 70 axg_tdm_stream_stop(ts);
76 return axg_tdm_stream_start(ts); 71 return axg_tdm_stream_start(ts);
77 } 72 }
78 73
79 int axg_tdm_set_tdm_slots(struct snd_soc_dai * 74 int axg_tdm_set_tdm_slots(struct snd_soc_dai *dai, u32 *tx_mask,
80 u32 *rx_mask, unsign 75 u32 *rx_mask, unsigned int slots,
81 unsigned int slot_wi 76 unsigned int slot_width);
82 77
83 #endif /* _MESON_AXG_TDM_H */ 78 #endif /* _MESON_AXG_TDM_H */
84 79
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