1 // SPDX-License-Identifier: (GPL-2.0-only OR B 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 // 2 //
3 // This file is provided under a dual BSD/GPLv 3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so und 4 // redistributing this file, you may do so under either license.
5 // 5 //
6 // Copyright(c) 2018 Intel Corporation !! 6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 // 7 //
8 // Author: Liam Girdwood <liam.r.girdwood@linu 8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 // 9 //
10 10
11 #include <linux/pci.h> 11 #include <linux/pci.h>
12 #include "ops.h" 12 #include "ops.h"
13 13
14 static 14 static
15 bool snd_sof_pci_update_bits_unlocked(struct s 15 bool snd_sof_pci_update_bits_unlocked(struct snd_sof_dev *sdev, u32 offset,
16 u32 mask 16 u32 mask, u32 value)
17 { 17 {
18 struct pci_dev *pci = to_pci_dev(sdev- 18 struct pci_dev *pci = to_pci_dev(sdev->dev);
19 unsigned int old, new; 19 unsigned int old, new;
20 u32 ret = 0; 20 u32 ret = 0;
21 21
22 pci_read_config_dword(pci, offset, &re 22 pci_read_config_dword(pci, offset, &ret);
23 old = ret; 23 old = ret;
24 dev_dbg(sdev->dev, "Debug PCIR: %8.8x 24 dev_dbg(sdev->dev, "Debug PCIR: %8.8x at %8.8x\n", old & mask, offset);
25 25
26 new = (old & ~mask) | (value & mask); 26 new = (old & ~mask) | (value & mask);
27 27
28 if (old == new) 28 if (old == new)
29 return false; 29 return false;
30 30
31 pci_write_config_dword(pci, offset, ne 31 pci_write_config_dword(pci, offset, new);
32 dev_dbg(sdev->dev, "Debug PCIW: %8.8x 32 dev_dbg(sdev->dev, "Debug PCIW: %8.8x at %8.8x\n", value,
33 offset); 33 offset);
34 34
35 return true; 35 return true;
36 } 36 }
37 37
38 bool snd_sof_pci_update_bits(struct snd_sof_de 38 bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset,
39 u32 mask, u32 val 39 u32 mask, u32 value)
40 { 40 {
41 unsigned long flags; 41 unsigned long flags;
42 bool change; 42 bool change;
43 43
44 spin_lock_irqsave(&sdev->hw_lock, flag 44 spin_lock_irqsave(&sdev->hw_lock, flags);
45 change = snd_sof_pci_update_bits_unloc 45 change = snd_sof_pci_update_bits_unlocked(sdev, offset, mask, value);
46 spin_unlock_irqrestore(&sdev->hw_lock, 46 spin_unlock_irqrestore(&sdev->hw_lock, flags);
47 return change; 47 return change;
48 } 48 }
49 EXPORT_SYMBOL(snd_sof_pci_update_bits); 49 EXPORT_SYMBOL(snd_sof_pci_update_bits);
50 50
51 bool snd_sof_dsp_update_bits_unlocked(struct s 51 bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar,
52 u32 offs 52 u32 offset, u32 mask, u32 value)
53 { 53 {
54 unsigned int old, new; 54 unsigned int old, new;
55 u32 ret; 55 u32 ret;
56 56
57 ret = snd_sof_dsp_read(sdev, bar, offs 57 ret = snd_sof_dsp_read(sdev, bar, offset);
58 58
59 old = ret; 59 old = ret;
60 new = (old & ~mask) | (value & mask); 60 new = (old & ~mask) | (value & mask);
61 61
62 if (old == new) 62 if (old == new)
63 return false; 63 return false;
64 64
65 snd_sof_dsp_write(sdev, bar, offset, n 65 snd_sof_dsp_write(sdev, bar, offset, new);
66 66
67 return true; 67 return true;
68 } 68 }
69 EXPORT_SYMBOL(snd_sof_dsp_update_bits_unlocked 69 EXPORT_SYMBOL(snd_sof_dsp_update_bits_unlocked);
70 70
71 bool snd_sof_dsp_update_bits64_unlocked(struct 71 bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar,
72 u32 of 72 u32 offset, u64 mask, u64 value)
73 { 73 {
74 u64 old, new; 74 u64 old, new;
75 75
76 old = snd_sof_dsp_read64(sdev, bar, of 76 old = snd_sof_dsp_read64(sdev, bar, offset);
77 77
78 new = (old & ~mask) | (value & mask); 78 new = (old & ~mask) | (value & mask);
79 79
80 if (old == new) 80 if (old == new)
81 return false; 81 return false;
82 82
83 snd_sof_dsp_write64(sdev, bar, offset, 83 snd_sof_dsp_write64(sdev, bar, offset, new);
84 84
85 return true; 85 return true;
86 } 86 }
87 EXPORT_SYMBOL(snd_sof_dsp_update_bits64_unlock 87 EXPORT_SYMBOL(snd_sof_dsp_update_bits64_unlocked);
88 88
89 /* This is for registers bits with attribute R 89 /* This is for registers bits with attribute RWC */
90 bool snd_sof_dsp_update_bits(struct snd_sof_de 90 bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset,
91 u32 mask, u32 val 91 u32 mask, u32 value)
92 { 92 {
93 unsigned long flags; 93 unsigned long flags;
94 bool change; 94 bool change;
95 95
96 spin_lock_irqsave(&sdev->hw_lock, flag 96 spin_lock_irqsave(&sdev->hw_lock, flags);
97 change = snd_sof_dsp_update_bits_unloc 97 change = snd_sof_dsp_update_bits_unlocked(sdev, bar, offset, mask,
98 98 value);
99 spin_unlock_irqrestore(&sdev->hw_lock, 99 spin_unlock_irqrestore(&sdev->hw_lock, flags);
100 return change; 100 return change;
101 } 101 }
102 EXPORT_SYMBOL(snd_sof_dsp_update_bits); 102 EXPORT_SYMBOL(snd_sof_dsp_update_bits);
103 103
104 bool snd_sof_dsp_update_bits64(struct snd_sof_ 104 bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar, u32 offset,
105 u64 mask, u64 v 105 u64 mask, u64 value)
106 { 106 {
107 unsigned long flags; 107 unsigned long flags;
108 bool change; 108 bool change;
109 109
110 spin_lock_irqsave(&sdev->hw_lock, flag 110 spin_lock_irqsave(&sdev->hw_lock, flags);
111 change = snd_sof_dsp_update_bits64_unl 111 change = snd_sof_dsp_update_bits64_unlocked(sdev, bar, offset, mask,
112 112 value);
113 spin_unlock_irqrestore(&sdev->hw_lock, 113 spin_unlock_irqrestore(&sdev->hw_lock, flags);
114 return change; 114 return change;
115 } 115 }
116 EXPORT_SYMBOL(snd_sof_dsp_update_bits64); 116 EXPORT_SYMBOL(snd_sof_dsp_update_bits64);
117 117
118 static 118 static
119 void snd_sof_dsp_update_bits_forced_unlocked(s 119 void snd_sof_dsp_update_bits_forced_unlocked(struct snd_sof_dev *sdev, u32 bar,
120 u 120 u32 offset, u32 mask, u32 value)
121 { 121 {
122 unsigned int old, new; 122 unsigned int old, new;
123 u32 ret; 123 u32 ret;
124 124
125 ret = snd_sof_dsp_read(sdev, bar, offs 125 ret = snd_sof_dsp_read(sdev, bar, offset);
126 126
127 old = ret; 127 old = ret;
128 new = (old & ~mask) | (value & mask); 128 new = (old & ~mask) | (value & mask);
129 129
130 snd_sof_dsp_write(sdev, bar, offset, n 130 snd_sof_dsp_write(sdev, bar, offset, new);
131 } 131 }
132 132
133 /* This is for registers bits with attribute R 133 /* This is for registers bits with attribute RWC */
134 void snd_sof_dsp_update_bits_forced(struct snd 134 void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar,
135 u32 offset 135 u32 offset, u32 mask, u32 value)
136 { 136 {
137 unsigned long flags; 137 unsigned long flags;
138 138
139 spin_lock_irqsave(&sdev->hw_lock, flag 139 spin_lock_irqsave(&sdev->hw_lock, flags);
140 snd_sof_dsp_update_bits_forced_unlocke 140 snd_sof_dsp_update_bits_forced_unlocked(sdev, bar, offset, mask, value);
141 spin_unlock_irqrestore(&sdev->hw_lock, 141 spin_unlock_irqrestore(&sdev->hw_lock, flags);
142 } 142 }
143 EXPORT_SYMBOL(snd_sof_dsp_update_bits_forced); 143 EXPORT_SYMBOL(snd_sof_dsp_update_bits_forced);
144 144
145 /** 145 /**
146 * snd_sof_dsp_panic - handle a received DSP p 146 * snd_sof_dsp_panic - handle a received DSP panic message
147 * @sdev: Pointer to the device's sdev 147 * @sdev: Pointer to the device's sdev
148 * @offset: offset of panic information 148 * @offset: offset of panic information
149 * @non_recoverable: the panic is fatal, no re 149 * @non_recoverable: the panic is fatal, no recovery will be done by the caller
150 */ 150 */
151 void snd_sof_dsp_panic(struct snd_sof_dev *sde 151 void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset, bool non_recoverable)
152 { 152 {
153 /* 153 /*
154 * if DSP is not ready and the dsp_oop 154 * if DSP is not ready and the dsp_oops_offset is not yet set, use the
155 * offset from the panic message. 155 * offset from the panic message.
156 */ 156 */
157 if (!sdev->dsp_oops_offset) 157 if (!sdev->dsp_oops_offset)
158 sdev->dsp_oops_offset = offset 158 sdev->dsp_oops_offset = offset;
159 159
160 /* 160 /*
161 * Print warning if the offset from th 161 * Print warning if the offset from the panic message differs from
162 * dsp_oops_offset 162 * dsp_oops_offset
163 */ 163 */
164 if (sdev->dsp_oops_offset != offset) 164 if (sdev->dsp_oops_offset != offset)
165 dev_warn(sdev->dev, 165 dev_warn(sdev->dev,
166 "%s: dsp_oops_offset 166 "%s: dsp_oops_offset %zu differs from panic offset %u\n",
167 __func__, sdev->dsp_o 167 __func__, sdev->dsp_oops_offset, offset);
168 168
169 /* 169 /*
170 * Set the fw_state to crashed only in 170 * Set the fw_state to crashed only in case of non recoverable DSP panic
171 * event. 171 * event.
172 * Use different message within the sn 172 * Use different message within the snd_sof_dsp_dbg_dump() depending on
173 * the non_recoverable flag. 173 * the non_recoverable flag.
174 */ 174 */
175 sdev->dbg_dump_printed = false; 175 sdev->dbg_dump_printed = false;
176 if (non_recoverable) { 176 if (non_recoverable) {
177 snd_sof_dsp_dbg_dump(sdev, "DS 177 snd_sof_dsp_dbg_dump(sdev, "DSP panic!",
178 SOF_DBG_D 178 SOF_DBG_DUMP_REGS | SOF_DBG_DUMP_MBOX);
179 sof_set_fw_state(sdev, SOF_FW_ 179 sof_set_fw_state(sdev, SOF_FW_CRASHED);
180 sof_fw_trace_fw_crashed(sdev); !! 180 snd_sof_trace_notify_for_error(sdev);
181 } else { 181 } else {
182 snd_sof_dsp_dbg_dump(sdev, 182 snd_sof_dsp_dbg_dump(sdev,
183 "DSP pani 183 "DSP panic (recovery will be attempted)",
184 SOF_DBG_D 184 SOF_DBG_DUMP_REGS | SOF_DBG_DUMP_MBOX);
185 } 185 }
186 } 186 }
187 EXPORT_SYMBOL(snd_sof_dsp_panic); 187 EXPORT_SYMBOL(snd_sof_dsp_panic);
188 188
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