1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 2 /* 3 * Driver for the AT73C213 16-bit stereo DAC o 3 * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 4 * 4 * 5 * Copyright (C) 2006 - 2007 Atmel Corporation 5 * Copyright (C) 2006 - 2007 Atmel Corporation 6 */ 6 */ 7 7 8 #ifndef _SND_AT73C213_H 8 #ifndef _SND_AT73C213_H 9 #define _SND_AT73C213_H 9 #define _SND_AT73C213_H 10 10 11 /* DAC control register */ 11 /* DAC control register */ 12 #define DAC_CTRL 0x00 12 #define DAC_CTRL 0x00 13 #define DAC_CTRL_ONPADRV 7 13 #define DAC_CTRL_ONPADRV 7 14 #define DAC_CTRL_ONAUXIN 6 14 #define DAC_CTRL_ONAUXIN 6 15 #define DAC_CTRL_ONDACR 5 15 #define DAC_CTRL_ONDACR 5 16 #define DAC_CTRL_ONDACL 4 16 #define DAC_CTRL_ONDACL 4 17 #define DAC_CTRL_ONLNOR 3 17 #define DAC_CTRL_ONLNOR 3 18 #define DAC_CTRL_ONLNOL 2 18 #define DAC_CTRL_ONLNOL 2 19 #define DAC_CTRL_ONLNIR 1 19 #define DAC_CTRL_ONLNIR 1 20 #define DAC_CTRL_ONLNIL 0 20 #define DAC_CTRL_ONLNIL 0 21 21 22 /* DAC left line in gain register */ 22 /* DAC left line in gain register */ 23 #define DAC_LLIG 0x01 23 #define DAC_LLIG 0x01 24 #define DAC_LLIG_LLIG 0 24 #define DAC_LLIG_LLIG 0 25 25 26 /* DAC right line in gain register */ 26 /* DAC right line in gain register */ 27 #define DAC_RLIG 0x02 27 #define DAC_RLIG 0x02 28 #define DAC_RLIG_RLIG 0 28 #define DAC_RLIG_RLIG 0 29 29 30 /* DAC Left Master Playback Gain Register */ 30 /* DAC Left Master Playback Gain Register */ 31 #define DAC_LMPG 0x03 31 #define DAC_LMPG 0x03 32 #define DAC_LMPG_LMPG 0 32 #define DAC_LMPG_LMPG 0 33 33 34 /* DAC Right Master Playback Gain Register */ 34 /* DAC Right Master Playback Gain Register */ 35 #define DAC_RMPG 0x04 35 #define DAC_RMPG 0x04 36 #define DAC_RMPG_RMPG 0 36 #define DAC_RMPG_RMPG 0 37 37 38 /* DAC Left Line Out Gain Register */ 38 /* DAC Left Line Out Gain Register */ 39 #define DAC_LLOG 0x05 39 #define DAC_LLOG 0x05 40 #define DAC_LLOG_LLOG 0 40 #define DAC_LLOG_LLOG 0 41 41 42 /* DAC Right Line Out Gain Register */ 42 /* DAC Right Line Out Gain Register */ 43 #define DAC_RLOG 0x06 43 #define DAC_RLOG 0x06 44 #define DAC_RLOG_RLOG 0 44 #define DAC_RLOG_RLOG 0 45 45 46 /* DAC Output Level Control Register */ 46 /* DAC Output Level Control Register */ 47 #define DAC_OLC 0x07 47 #define DAC_OLC 0x07 48 #define DAC_OLC_RSHORT 7 48 #define DAC_OLC_RSHORT 7 49 #define DAC_OLC_ROLC 4 49 #define DAC_OLC_ROLC 4 50 #define DAC_OLC_LSHORT 3 50 #define DAC_OLC_LSHORT 3 51 #define DAC_OLC_LOLC 0 51 #define DAC_OLC_LOLC 0 52 52 53 /* DAC Mixer Control Register */ 53 /* DAC Mixer Control Register */ 54 #define DAC_MC 0x08 54 #define DAC_MC 0x08 55 #define DAC_MC_INVR 5 55 #define DAC_MC_INVR 5 56 #define DAC_MC_INVL 4 56 #define DAC_MC_INVL 4 57 #define DAC_MC_RMSMIN2 3 57 #define DAC_MC_RMSMIN2 3 58 #define DAC_MC_RMSMIN1 2 58 #define DAC_MC_RMSMIN1 2 59 #define DAC_MC_LMSMIN2 1 59 #define DAC_MC_LMSMIN2 1 60 #define DAC_MC_LMSMIN1 0 60 #define DAC_MC_LMSMIN1 0 61 61 62 /* DAC Clock and Sampling Frequency Control Re 62 /* DAC Clock and Sampling Frequency Control Register */ 63 #define DAC_CSFC 0x09 63 #define DAC_CSFC 0x09 64 #define DAC_CSFC_OVRSEL 4 64 #define DAC_CSFC_OVRSEL 4 65 65 66 /* DAC Miscellaneous Register */ 66 /* DAC Miscellaneous Register */ 67 #define DAC_MISC 0x0A 67 #define DAC_MISC 0x0A 68 #define DAC_MISC_VCMCAPSEL 7 68 #define DAC_MISC_VCMCAPSEL 7 69 #define DAC_MISC_DINTSEL 4 69 #define DAC_MISC_DINTSEL 4 70 #define DAC_MISC_DITHEN 3 70 #define DAC_MISC_DITHEN 3 71 #define DAC_MISC_DEEMPEN 2 71 #define DAC_MISC_DEEMPEN 2 72 #define DAC_MISC_NBITS 0 72 #define DAC_MISC_NBITS 0 73 73 74 /* DAC Precharge Control Register */ 74 /* DAC Precharge Control Register */ 75 #define DAC_PRECH 0x0C 75 #define DAC_PRECH 0x0C 76 #define DAC_PRECH_PRCHGPDRV 7 76 #define DAC_PRECH_PRCHGPDRV 7 77 #define DAC_PRECH_PRCHGAUX1 6 77 #define DAC_PRECH_PRCHGAUX1 6 78 #define DAC_PRECH_PRCHGLNOR 5 78 #define DAC_PRECH_PRCHGLNOR 5 79 #define DAC_PRECH_PRCHGLNOL 4 79 #define DAC_PRECH_PRCHGLNOL 4 80 #define DAC_PRECH_PRCHGLNIR 3 80 #define DAC_PRECH_PRCHGLNIR 3 81 #define DAC_PRECH_PRCHGLNIL 2 81 #define DAC_PRECH_PRCHGLNIL 2 82 #define DAC_PRECH_PRCHG 1 82 #define DAC_PRECH_PRCHG 1 83 #define DAC_PRECH_ONMSTR 0 83 #define DAC_PRECH_ONMSTR 0 84 84 85 /* DAC Auxiliary Input Gain Control Register * 85 /* DAC Auxiliary Input Gain Control Register */ 86 #define DAC_AUXG 0x0D 86 #define DAC_AUXG 0x0D 87 #define DAC_AUXG_AUXG 0 87 #define DAC_AUXG_AUXG 0 88 88 89 /* DAC Reset Register */ 89 /* DAC Reset Register */ 90 #define DAC_RST 0x10 90 #define DAC_RST 0x10 91 #define DAC_RST_RESMASK 2 91 #define DAC_RST_RESMASK 2 92 #define DAC_RST_RESFILZ 1 92 #define DAC_RST_RESFILZ 1 93 #define DAC_RST_RSTZ 0 93 #define DAC_RST_RSTZ 0 94 94 95 /* Power Amplifier Control Register */ 95 /* Power Amplifier Control Register */ 96 #define PA_CTRL 0x11 96 #define PA_CTRL 0x11 97 #define PA_CTRL_APAON 6 97 #define PA_CTRL_APAON 6 98 #define PA_CTRL_APAPRECH 5 98 #define PA_CTRL_APAPRECH 5 99 #define PA_CTRL_APALP 4 99 #define PA_CTRL_APALP 4 100 #define PA_CTRL_APAGAIN 0 100 #define PA_CTRL_APAGAIN 0 101 101 102 #endif /* _SND_AT73C213_H */ 102 #endif /* _SND_AT73C213_H */ 103 103
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