1 # 1 #
2 # Legend: 2 # Legend:
3 # R, a Load event 3 # R, a Load event
4 # W, a Store event 4 # W, a Store event
5 # F, a Fence event 5 # F, a Fence event
6 # LKR, a Lock-Read event 6 # LKR, a Lock-Read event
7 # LKW, a Lock-Write event 7 # LKW, a Lock-Write event
8 # UL, an Unlock event 8 # UL, an Unlock event
9 # LF, a Lock-Fail event 9 # LF, a Lock-Fail event
10 # RL, a Read-Locked event 10 # RL, a Read-Locked event
11 # RU, a Read-Unlocked event 11 # RU, a Read-Unlocked event
12 # R*, a Load event included in RMW 12 # R*, a Load event included in RMW
13 # W*, a Store event included in RMW 13 # W*, a Store event included in RMW
14 # SRCU, a Sleepable-Read-Copy-Update e 14 # SRCU, a Sleepable-Read-Copy-Update event
15 # 15 #
16 # po, a Program-Order link 16 # po, a Program-Order link
17 # rmw, a Read-Modify-Write link - eve 17 # rmw, a Read-Modify-Write link - every rmw link is a po link
18 # 18 #
19 # By convention, a blank line in a cell means 19 # By convention, a blank line in a cell means "same as the preceding line".
20 # 20 #
21 # Disclaimer. The table includes representati 21 # Disclaimer. The table includes representations of "add" and "and" operations;
22 # corresponding/identical representations of " 22 # corresponding/identical representations of "sub", "inc", "dec" and "or", "xor",
23 # "andnot" operations are omitted. 23 # "andnot" operations are omitted.
24 # 24 #
25 ------------------------------------------ 25 ------------------------------------------------------------------------------
26 | C macro | Events 26 | C macro | Events |
27 ------------------------------------------ 27 ------------------------------------------------------------------------------
28 | Non-RMW ops | 28 | Non-RMW ops | |
29 ------------------------------------------ 29 ------------------------------------------------------------------------------
30 | READ_ONCE | R[once] 30 | READ_ONCE | R[once] |
31 | atomic_read | 31 | atomic_read | |
32 | WRITE_ONCE | W[once] 32 | WRITE_ONCE | W[once] |
33 | atomic_set | 33 | atomic_set | |
34 | smp_load_acquire | R[acqui 34 | smp_load_acquire | R[acquire] |
35 | atomic_read_acquire | 35 | atomic_read_acquire | |
36 | smp_store_release | W[relea 36 | smp_store_release | W[release] |
37 | atomic_set_release | 37 | atomic_set_release | |
38 | smp_store_mb | W[once] 38 | smp_store_mb | W[once] ->po F[mb] |
39 | smp_mb | F[mb] 39 | smp_mb | F[mb] |
40 | smp_rmb | F[rmb] 40 | smp_rmb | F[rmb] |
41 | smp_wmb | F[wmb] 41 | smp_wmb | F[wmb] |
42 | smp_mb__before_atomic | F[befor 42 | smp_mb__before_atomic | F[before-atomic] |
43 | smp_mb__after_atomic | F[after 43 | smp_mb__after_atomic | F[after-atomic] |
44 | spin_unlock | UL 44 | spin_unlock | UL |
45 | spin_is_locked | On succ 45 | spin_is_locked | On success: RL |
46 | | On fail 46 | | On failure: RU |
47 | smp_mb__after_spinlock | F[after 47 | smp_mb__after_spinlock | F[after-spinlock] |
48 | smp_mb__after_unlock_lock | F[after 48 | smp_mb__after_unlock_lock | F[after-unlock-lock] |
49 | rcu_read_lock | F[rcu-l 49 | rcu_read_lock | F[rcu-lock] |
50 | rcu_read_unlock | F[rcu-u 50 | rcu_read_unlock | F[rcu-unlock] |
51 | synchronize_rcu | F[sync- 51 | synchronize_rcu | F[sync-rcu] |
52 | rcu_dereference | R[once] 52 | rcu_dereference | R[once] |
53 | rcu_assign_pointer | W[relea 53 | rcu_assign_pointer | W[release] |
54 | srcu_read_lock | R[srcu- 54 | srcu_read_lock | R[srcu-lock] |
55 | srcu_down_read | 55 | srcu_down_read | |
56 | srcu_read_unlock | W[srcu- 56 | srcu_read_unlock | W[srcu-unlock] |
57 | srcu_up_read | 57 | srcu_up_read | |
58 | synchronize_srcu | SRCU[sy 58 | synchronize_srcu | SRCU[sync-srcu] |
59 | smp_mb__after_srcu_read_unlock | F[after 59 | smp_mb__after_srcu_read_unlock | F[after-srcu-read-unlock] |
60 ------------------------------------------ 60 ------------------------------------------------------------------------------
61 | RMW ops w/o return value | 61 | RMW ops w/o return value | |
62 ------------------------------------------ 62 ------------------------------------------------------------------------------
63 | atomic_add | R*[nore 63 | atomic_add | R*[noreturn] ->rmw W*[once] |
64 | atomic_and | 64 | atomic_and | |
65 | spin_lock | LKR ->p 65 | spin_lock | LKR ->po LKW |
66 ------------------------------------------ 66 ------------------------------------------------------------------------------
67 | RMW ops w/ return value | 67 | RMW ops w/ return value | |
68 ------------------------------------------ 68 ------------------------------------------------------------------------------
69 | atomic_add_return | F[mb] - 69 | atomic_add_return | F[mb] ->po R*[once] |
70 | | ->r 70 | | ->rmw W*[once] ->po F[mb] |
71 | atomic_fetch_add | 71 | atomic_fetch_add | |
72 | atomic_fetch_and | 72 | atomic_fetch_and | |
73 | atomic_xchg | 73 | atomic_xchg | |
74 | xchg | 74 | xchg | |
75 | atomic_add_negative | 75 | atomic_add_negative | |
76 | atomic_add_return_relaxed | R*[once 76 | atomic_add_return_relaxed | R*[once] ->rmw W*[once] |
77 | atomic_fetch_add_relaxed | 77 | atomic_fetch_add_relaxed | |
78 | atomic_fetch_and_relaxed | 78 | atomic_fetch_and_relaxed | |
79 | atomic_xchg_relaxed | 79 | atomic_xchg_relaxed | |
80 | xchg_relaxed | 80 | xchg_relaxed | |
81 | atomic_add_negative_relaxed | 81 | atomic_add_negative_relaxed | |
82 | atomic_add_return_acquire | R*[acqu 82 | atomic_add_return_acquire | R*[acquire] ->rmw W*[once] |
83 | atomic_fetch_add_acquire | 83 | atomic_fetch_add_acquire | |
84 | atomic_fetch_and_acquire | 84 | atomic_fetch_and_acquire | |
85 | atomic_xchg_acquire | 85 | atomic_xchg_acquire | |
86 | xchg_acquire | 86 | xchg_acquire | |
87 | atomic_add_negative_acquire | 87 | atomic_add_negative_acquire | |
88 | atomic_add_return_release | R*[once 88 | atomic_add_return_release | R*[once] ->rmw W*[release] |
89 | atomic_fetch_add_release | 89 | atomic_fetch_add_release | |
90 | atomic_fetch_and_release | 90 | atomic_fetch_and_release | |
91 | atomic_xchg_release | 91 | atomic_xchg_release | |
92 | xchg_release | 92 | xchg_release | |
93 | atomic_add_negative_release | 93 | atomic_add_negative_release | |
94 ------------------------------------------ 94 ------------------------------------------------------------------------------
95 | Conditional RMW ops | 95 | Conditional RMW ops | |
96 ------------------------------------------ 96 ------------------------------------------------------------------------------
97 | atomic_cmpxchg | On succ 97 | atomic_cmpxchg | On success: F[mb] ->po R*[once] |
98 | | 98 | | ->rmw W*[once] ->po F[mb] |
99 | | On fail 99 | | On failure: R*[once] |
100 | cmpxchg | 100 | cmpxchg | |
101 | atomic_add_unless | 101 | atomic_add_unless | |
102 | atomic_cmpxchg_relaxed | On succ 102 | atomic_cmpxchg_relaxed | On success: R*[once] ->rmw W*[once] |
103 | | On fail 103 | | On failure: R*[once] |
104 | atomic_cmpxchg_acquire | On succ 104 | atomic_cmpxchg_acquire | On success: R*[acquire] ->rmw W*[once] |
105 | | On fail 105 | | On failure: R*[once] |
106 | atomic_cmpxchg_release | On succ 106 | atomic_cmpxchg_release | On success: R*[once] ->rmw W*[release] |
107 | | On fail 107 | | On failure: R*[once] |
108 | spin_trylock | On succ 108 | spin_trylock | On success: LKR ->po LKW |
109 | | On fail 109 | | On failure: LF |
110 ------------------------------------------ 110 ------------------------------------------------------------------------------
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