1 i synthesize instruction 1 i synthesize instructions events
2 y synthesize cycles even !! 2 b synthesize branches events
3 b synthesize branches ev <<
4 c synthesize branches ev 3 c synthesize branches events (calls only)
5 r synthesize branches ev 4 r synthesize branches events (returns only)
6 x synthesize transaction 5 x synthesize transactions events
7 w synthesize ptwrite eve 6 w synthesize ptwrite events
8 p synthesize power event !! 7 p synthesize power events
9 o synthesize other event 8 o synthesize other events recorded due to the use
10 of aux-output (refer t 9 of aux-output (refer to perf record)
11 I synthesize interrupt o <<
12 (e.g. Intel PT Event T <<
13 e synthesize error event 10 e synthesize error events
14 d create a debug log 11 d create a debug log
15 f synthesize first level <<
16 m synthesize last level <<
17 M synthesize memory even <<
18 t synthesize TLB events <<
19 a synthesize remote acce <<
20 g synthesize a call chai 12 g synthesize a call chain (use with i or x)
21 G synthesize a call chai <<
22 l synthesize last branch 13 l synthesize last branch entries (use with i or x)
23 L synthesize last branch <<
24 s skip initial number of 14 s skip initial number of events
25 q quicker (less detailed <<
26 A approximate IPC <<
27 Z prefer to ignore times <<
28 T use the timestamp trac <<
29 15
30 The default is all events i.e. the sam !! 16 The default is all events i.e. the same as --itrace=ibxwpe,
31 except for perf script where it is --i 17 except for perf script where it is --itrace=ce
32 18
33 In addition, the period (default 10000 19 In addition, the period (default 100000, except for perf script where it is 1)
34 for instructions events can be specifi 20 for instructions events can be specified in units of:
35 21
36 i instructions 22 i instructions
37 t ticks 23 t ticks
38 ms milliseconds 24 ms milliseconds
39 us microseconds 25 us microseconds
40 ns nanoseconds (default) 26 ns nanoseconds (default)
41 27
42 Also the call chain size (default 16, 28 Also the call chain size (default 16, max. 1024) for instructions or
43 transactions events can be specified. 29 transactions events can be specified.
44 30
45 Also the number of last branch entries 31 Also the number of last branch entries (default 64, max. 1024) for
46 instructions or transactions events ca 32 instructions or transactions events can be specified.
47 33
48 Similar to options g and l, size may a <<
49 On x86, note that G and L work poorly <<
50 large PEBS. Refer linkperf:perf-intel- <<
51 <<
52 It is also possible to skip events gen 34 It is also possible to skip events generated (instructions, branches, transactions,
53 ptwrite, power) at the beginning. This 35 ptwrite, power) at the beginning. This is useful to ignore initialization code.
54 36
55 --itrace=i0nss1000000 37 --itrace=i0nss1000000
56 38
57 skips the first million instructions. 39 skips the first million instructions.
58 <<
59 The 'e' option may be followed by flag <<
60 will not be reported. Each flag must b <<
61 The flags are: <<
62 o overflow <<
63 l trace data lost <<
64 <<
65 If supported, the 'd' option may be fo <<
66 debug messages will or will not be log <<
67 by either '+' or '-'. The flags are: <<
68 a all perf events <<
69 e output only on errors <<
70 o output to stdout <<
71 <<
72 If supported, the 'q' option may be re <<
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