1 perf-intel-pt(1) 1 perf-intel-pt(1)
2 ================ 2 ================
3 3
4 NAME 4 NAME
5 ---- 5 ----
6 perf-intel-pt - Support for Intel Processor Tr 6 perf-intel-pt - Support for Intel Processor Trace within perf tools
7 7
8 SYNOPSIS 8 SYNOPSIS
9 -------- 9 --------
10 [verse] 10 [verse]
11 'perf record' -e intel_pt// 11 'perf record' -e intel_pt//
12 12
13 DESCRIPTION 13 DESCRIPTION
14 ----------- 14 -----------
15 15
16 Intel Processor Trace (Intel PT) is an extensi 16 Intel Processor Trace (Intel PT) is an extension of Intel Architecture that
17 collects information about software execution 17 collects information about software execution such as control flow, execution
18 modes and timings and formats it into highly c 18 modes and timings and formats it into highly compressed binary packets.
19 Technical details are documented in the Intel 19 Technical details are documented in the Intel 64 and IA-32 Architectures
20 Software Developer Manuals, Chapter 36 Intel P 20 Software Developer Manuals, Chapter 36 Intel Processor Trace.
21 21
22 Intel PT is first supported in Intel Core M an 22 Intel PT is first supported in Intel Core M and 5th generation Intel Core
23 processors that are based on the Intel micro-a 23 processors that are based on the Intel micro-architecture code name Broadwell.
24 24
25 Trace data is collected by 'perf record' and s 25 Trace data is collected by 'perf record' and stored within the perf.data file.
26 See below for options to 'perf record'. 26 See below for options to 'perf record'.
27 27
28 Trace data must be 'decoded' which involves wa 28 Trace data must be 'decoded' which involves walking the object code and matching
29 the trace data packets. For example a TNT pack 29 the trace data packets. For example a TNT packet only tells whether a
30 conditional branch was taken or not taken, so 30 conditional branch was taken or not taken, so to make use of that packet the
31 decoder must know precisely which instruction 31 decoder must know precisely which instruction was being executed.
32 32
33 Decoding is done on-the-fly. The decoder outp 33 Decoding is done on-the-fly. The decoder outputs samples in the same format as
34 samples output by perf hardware events, for ex 34 samples output by perf hardware events, for example as though the "instructions"
35 or "branches" events had been recorded. Prese 35 or "branches" events had been recorded. Presently 3 tools support this:
36 'perf script', 'perf report' and 'perf inject' 36 'perf script', 'perf report' and 'perf inject'. See below for more information
37 on using those tools. 37 on using those tools.
38 38
39 The main distinguishing feature of Intel PT is 39 The main distinguishing feature of Intel PT is that the decoder can determine
40 the exact flow of software execution. Intel P 40 the exact flow of software execution. Intel PT can be used to understand why
41 and how did software get to a certain point, o 41 and how did software get to a certain point, or behave a certain way. The
42 software does not have to be recompiled, so In 42 software does not have to be recompiled, so Intel PT works with debug or release
43 builds, however the executed images are needed 43 builds, however the executed images are needed - which makes use in JIT-compiled
44 environments, or with self-modified code, a ch 44 environments, or with self-modified code, a challenge. Also symbols need to be
45 provided to make sense of addresses. 45 provided to make sense of addresses.
46 46
47 A limitation of Intel PT is that it produces h 47 A limitation of Intel PT is that it produces huge amounts of trace data
48 (hundreds of megabytes per second per core) wh 48 (hundreds of megabytes per second per core) which takes a long time to decode,
49 for example two or three orders of magnitude l 49 for example two or three orders of magnitude longer than it took to collect.
50 Another limitation is the performance impact o 50 Another limitation is the performance impact of tracing, something that will
51 vary depending on the use-case and architectur 51 vary depending on the use-case and architecture.
52 52
53 53
54 Quickstart 54 Quickstart
55 ---------- 55 ----------
56 56
57 It is important to start small. That is becau 57 It is important to start small. That is because it is easy to capture vastly
58 more data than can possibly be processed. 58 more data than can possibly be processed.
59 59
60 The simplest thing to do with Intel PT is user 60 The simplest thing to do with Intel PT is userspace profiling of small programs.
61 Data is captured with 'perf record' e.g. to tr 61 Data is captured with 'perf record' e.g. to trace 'ls' userspace-only:
62 62
63 perf record -e intel_pt//u ls 63 perf record -e intel_pt//u ls
64 64
65 And profiled with 'perf report' e.g. 65 And profiled with 'perf report' e.g.
66 66
67 perf report 67 perf report
68 68
69 To also trace kernel space presents a problem, 69 To also trace kernel space presents a problem, namely kernel self-modifying
70 code. A fairly good kernel image is available 70 code. A fairly good kernel image is available in /proc/kcore but to get an
71 accurate image a copy of /proc/kcore needs to 71 accurate image a copy of /proc/kcore needs to be made under the same conditions
72 as the data capture. 'perf record' can make a 72 as the data capture. 'perf record' can make a copy of /proc/kcore if the option
73 --kcore is used, but access to /proc/kcore is 73 --kcore is used, but access to /proc/kcore is restricted e.g.
74 74
75 sudo perf record -o pt_ls --kcore -e i 75 sudo perf record -o pt_ls --kcore -e intel_pt// -- ls
76 76
77 which will create a directory named 'pt_ls' an 77 which will create a directory named 'pt_ls' and put the perf.data file (named
78 simply 'data') and copies of /proc/kcore, /pro 78 simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into
79 it. The other tools understand the directory 79 it. The other tools understand the directory format, so to use 'perf report'
80 becomes: 80 becomes:
81 81
82 sudo perf report -i pt_ls 82 sudo perf report -i pt_ls
83 83
84 Because samples are synthesized after-the-fact 84 Because samples are synthesized after-the-fact, the sampling period can be
85 selected for reporting. e.g. sample every micr 85 selected for reporting. e.g. sample every microsecond
86 86
87 sudo perf report pt_ls --itrace=i1usge 87 sudo perf report pt_ls --itrace=i1usge
88 88
89 See the sections below for more information ab 89 See the sections below for more information about the --itrace option.
90 90
91 Beware the smaller the period, the more sample 91 Beware the smaller the period, the more samples that are produced, and the
92 longer it takes to process them. 92 longer it takes to process them.
93 93
94 Also note that the coarseness of Intel PT timi 94 Also note that the coarseness of Intel PT timing information will start to
95 distort the statistical value of the sampling 95 distort the statistical value of the sampling as the sampling period becomes
96 smaller. 96 smaller.
97 97
98 To represent software control flow, "branches" 98 To represent software control flow, "branches" samples are produced. By default
99 a branch sample is synthesized for every singl 99 a branch sample is synthesized for every single branch. To get an idea what
100 data is available you can use the 'perf script 100 data is available you can use the 'perf script' tool with all itrace sampling
101 options, which will list all the samples. 101 options, which will list all the samples.
102 102
103 perf record -e intel_pt//u ls 103 perf record -e intel_pt//u ls
104 perf script --itrace=iybxwpe !! 104 perf script --itrace=ibxwpe
105 105
106 An interesting field that is not printed by de 106 An interesting field that is not printed by default is 'flags' which can be
107 displayed as follows: 107 displayed as follows:
108 108
109 perf script --itrace=iybxwpe -F+flags !! 109 perf script --itrace=ibxwpe -F+flags
110 110
111 The flags are "bcrosyiABExghDt" which stand fo !! 111 The flags are "bcrosyiABEx" which stand for branch, call, return, conditional,
112 system, asynchronous, interrupt, transaction a !! 112 system, asynchronous, interrupt, transaction abort, trace begin, trace end, and
113 in transaction, VM-entry, VM-exit, interrupt d !! 113 in transaction, respectively.
114 toggle respectively. <<
115 114
116 perf script also supports higher level ways to 115 perf script also supports higher level ways to dump instruction traces:
117 116
118 perf script --insn-trace=disasm <<
119 <<
120 or to use the xed disassembler, which requires <<
121 (see XED below): <<
122 <<
123 perf script --insn-trace --xed 117 perf script --insn-trace --xed
124 118
>> 119 Dump all instructions. This requires installing the xed tool (see XED below)
125 Dumping all instructions in a long trace can b 120 Dumping all instructions in a long trace can be fairly slow. It is usually better
126 to start with higher level decoding, like 121 to start with higher level decoding, like
127 122
128 perf script --call-trace 123 perf script --call-trace
129 124
130 or 125 or
131 126
132 perf script --call-ret-trace 127 perf script --call-ret-trace
133 128
134 and then select a time range of interest. The 129 and then select a time range of interest. The time range can then be examined
135 in detail with 130 in detail with
136 131
137 perf script --time starttime,stoptime !! 132 perf script --time starttime,stoptime --insn-trace --xed
138 133
139 While examining the trace it's also useful to 134 While examining the trace it's also useful to filter on specific CPUs using
140 the -C option 135 the -C option
141 136
142 perf script --time starttime,stoptime !! 137 perf script --time starttime,stoptime --insn-trace --xed -C 1
143 138
144 Dump all instructions in time range on CPU 1. 139 Dump all instructions in time range on CPU 1.
145 140
146 Another interesting field that is not printed 141 Another interesting field that is not printed by default is 'ipc' which can be
147 displayed as follows: 142 displayed as follows:
148 143
149 perf script --itrace=be -F+ipc 144 perf script --itrace=be -F+ipc
150 145
151 There are two ways that instructions-per-cycle 146 There are two ways that instructions-per-cycle (IPC) can be calculated depending
152 on the recording. 147 on the recording.
153 148
154 If the 'cyc' config term (see config terms sec !! 149 If the 'cyc' config term (see config terms section below) was used, then IPC is
155 and cycle events are calculated using the cycl !! 150 calculated using the cycle count from CYC packets, otherwise MTC packets are
156 MTC packets are used - refer to the 'mtc' conf !! 151 used - refer to the 'mtc' config term. When MTC is used, however, the values
157 the values are less accurate because the timin !! 152 are less accurate because the timing is less accurate.
158 153
159 Because Intel PT does not update the cycle cou 154 Because Intel PT does not update the cycle count on every branch or instruction,
160 the values will often be zero. When there are 155 the values will often be zero. When there are values, they will be the number
161 of instructions and number of cycles since the 156 of instructions and number of cycles since the last update, and thus represent
162 the average IPC cycle count since the last IPC !! 157 the average IPC since the last IPC for that event type. Note IPC for "branches"
163 Note IPC for "branches" events is calculated s !! 158 events is calculated separately from IPC for "instructions" events.
164 events. <<
165 <<
166 Even with the 'cyc' config term, it is possibl <<
167 every change of timestamp, but at the expense <<
168 specifying the itrace 'A' option. Due to the <<
169 actual number of cycles increases even though <<
170 The number of instructions is known, but if IP <<
171 low and so IPC is too high. Note that inaccur <<
172 sampling increases i.e. if the number of cycle <<
173 that becomes less significant if the number of <<
174 useful to use the 'A' option in conjunction wi <<
175 provide higher granularity cycle information. <<
176 159
177 Also note that the IPC instruction count may o 160 Also note that the IPC instruction count may or may not include the current
178 instruction. If the cycle count is associated 161 instruction. If the cycle count is associated with an asynchronous branch
179 (e.g. page fault or interrupt), then the instr 162 (e.g. page fault or interrupt), then the instruction count does not include the
180 current instruction, otherwise it does. That 163 current instruction, otherwise it does. That is consistent with whether or not
181 that instruction has retired when the cycle co 164 that instruction has retired when the cycle count is updated.
182 165
183 Another note, in the case of "branches" events 166 Another note, in the case of "branches" events, non-taken branches are not
184 presently sampled, so IPC values for them do n 167 presently sampled, so IPC values for them do not appear e.g. a CYC packet with a
185 TNT packet that starts with a non-taken branch 168 TNT packet that starts with a non-taken branch. To see every possible IPC
186 value, "instructions" events can be used e.g. 169 value, "instructions" events can be used e.g. --itrace=i0ns
187 170
188 While it is possible to create scripts to anal 171 While it is possible to create scripts to analyze the data, an alternative
189 approach is available to export the data to a 172 approach is available to export the data to a sqlite or postgresql database.
190 Refer to script export-to-sqlite.py or export- 173 Refer to script export-to-sqlite.py or export-to-postgresql.py for more details,
191 and to script exported-sql-viewer.py for an ex 174 and to script exported-sql-viewer.py for an example of using the database.
192 175
193 There is also script intel-pt-events.py which 176 There is also script intel-pt-events.py which provides an example of how to
194 unpack the raw data for power events and PTWRI !! 177 unpack the raw data for power events and PTWRITE.
195 branches, and supports 2 additional modes sele <<
196 <<
197 - --insn-trace - instruction trace <<
198 - --src-trace - source trace <<
199 <<
200 The intel-pt-events.py script also has options <<
201 <<
202 - --all-switch-events - display all switch ev <<
203 - --interleave [<n>] - interleave sample outp <<
204 no more than n samples for a CPU are displaye <<
205 Note this only affects the order of output, a <<
206 same. <<
207 178
208 As mentioned above, it is easy to capture too 179 As mentioned above, it is easy to capture too much data. One way to limit the
209 data captured is to use 'snapshot' mode which 180 data captured is to use 'snapshot' mode which is explained further below.
210 Refer to 'new snapshot option' and 'Intel PT m 181 Refer to 'new snapshot option' and 'Intel PT modes of operation' further below.
211 182
212 Another problem that will be experienced is de 183 Another problem that will be experienced is decoder errors. They can be caused
213 by inability to access the executed image, sel 184 by inability to access the executed image, self-modified or JIT-ed code, or the
214 inability to match side-band information (such 185 inability to match side-band information (such as context switches and mmaps)
215 which results in the decoder not knowing what 186 which results in the decoder not knowing what code was executed.
216 187
217 There is also the problem of perf not being ab 188 There is also the problem of perf not being able to copy the data fast enough,
218 resulting in data lost because the buffer was 189 resulting in data lost because the buffer was full. See 'Buffer handling' below
219 for more details. 190 for more details.
220 191
221 192
222 perf record 193 perf record
223 ----------- 194 -----------
224 195
225 new event 196 new event
226 ~~~~~~~~~ 197 ~~~~~~~~~
227 198
228 The Intel PT kernel driver creates a new PMU f 199 The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are
229 selected by providing the PMU name followed by 200 selected by providing the PMU name followed by the "config" separated by slashes.
230 An enhancement has been made to allow default 201 An enhancement has been made to allow default "config" e.g. the option
231 202
232 -e intel_pt// 203 -e intel_pt//
233 204
234 will use a default config value. Currently th 205 will use a default config value. Currently that is the same as
235 206
236 -e intel_pt/tsc,noretcomp=0/ 207 -e intel_pt/tsc,noretcomp=0/
237 208
238 which is the same as 209 which is the same as
239 210
240 -e intel_pt/tsc=1,noretcomp=0/ 211 -e intel_pt/tsc=1,noretcomp=0/
241 212
242 Note there are now new config terms - see sect 213 Note there are now new config terms - see section 'config terms' further below.
243 214
244 The config terms are listed in /sys/devices/in 215 The config terms are listed in /sys/devices/intel_pt/format. They are bit
245 fields within the config member of the struct 216 fields within the config member of the struct perf_event_attr which is
246 passed to the kernel by the perf_event_open sy 217 passed to the kernel by the perf_event_open system call. They correspond to bit
247 fields in the IA32_RTIT_CTL MSR. Here is a li 218 fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions:
248 219
249 $ grep -H . /sys/bus/event_source/devi 220 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
250 /sys/bus/event_source/devices/intel_pt 221 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1
251 /sys/bus/event_source/devices/intel_pt 222 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
252 /sys/bus/event_source/devices/intel_pt 223 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9
253 /sys/bus/event_source/devices/intel_pt 224 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
254 /sys/bus/event_source/devices/intel_pt 225 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
255 /sys/bus/event_source/devices/intel_pt 226 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
256 /sys/bus/event_source/devices/intel_pt 227 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10
257 228
258 Note that the default config must be overridde 229 Note that the default config must be overridden for each term i.e.
259 230
260 -e intel_pt/noretcomp=0/ 231 -e intel_pt/noretcomp=0/
261 232
262 is the same as: 233 is the same as:
263 234
264 -e intel_pt/tsc=1,noretcomp=0/ 235 -e intel_pt/tsc=1,noretcomp=0/
265 236
266 So, to disable TSC packets use: 237 So, to disable TSC packets use:
267 238
268 -e intel_pt/tsc=0/ 239 -e intel_pt/tsc=0/
269 240
270 It is also possible to specify the config valu 241 It is also possible to specify the config value explicitly:
271 242
272 -e intel_pt/config=0x400/ 243 -e intel_pt/config=0x400/
273 244
274 Note that, as with all events, the event is su 245 Note that, as with all events, the event is suffixed with event modifiers:
275 246
276 u userspace 247 u userspace
277 k kernel 248 k kernel
278 h hypervisor 249 h hypervisor
279 G guest 250 G guest
280 H host 251 H host
281 p precise ip 252 p precise ip
282 253
283 'h', 'G' and 'H' are for virtualization which !! 254 'h', 'G' and 'H' are for virtualization which is not supported by Intel PT.
284 'p' is also not relevant to Intel PT. So only 255 'p' is also not relevant to Intel PT. So only options 'u' and 'k' are
285 meaningful for Intel PT. 256 meaningful for Intel PT.
286 257
287 perf_event_attr is displayed if the -vv option 258 perf_event_attr is displayed if the -vv option is used e.g.
288 259
289 -------------------------------------- 260 ------------------------------------------------------------
290 perf_event_attr: 261 perf_event_attr:
291 type 6 262 type 6
292 size 112 263 size 112
293 config 0x400 264 config 0x400
294 { sample_period, sample_freq } 1 265 { sample_period, sample_freq } 1
295 sample_type IP|TI 266 sample_type IP|TID|TIME|CPU|IDENTIFIER
296 read_format ID 267 read_format ID
297 disabled 1 268 disabled 1
298 inherit 1 269 inherit 1
299 exclude_kernel 1 270 exclude_kernel 1
300 exclude_hv 1 271 exclude_hv 1
301 enable_on_exec 1 272 enable_on_exec 1
302 sample_id_all 1 273 sample_id_all 1
303 -------------------------------------- 274 ------------------------------------------------------------
304 sys_perf_event_open: pid 31104 cpu 0 275 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
305 sys_perf_event_open: pid 31104 cpu 1 276 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
306 sys_perf_event_open: pid 31104 cpu 2 277 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
307 sys_perf_event_open: pid 31104 cpu 3 278 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
308 -------------------------------------- 279 ------------------------------------------------------------
309 280
310 281
311 config terms 282 config terms
312 ~~~~~~~~~~~~ 283 ~~~~~~~~~~~~
313 284
314 The June 2015 version of Intel 64 and IA-32 Ar 285 The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
315 Manuals, Chapter 36 Intel Processor Trace, def 286 Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
316 Some of the features are reflect in new config 287 Some of the features are reflect in new config terms. All the config terms are
317 described below. 288 described below.
318 289
319 tsc Always supported. Produces TS 290 tsc Always supported. Produces TSC timestamp packets to provide
320 timing information. In some c 291 timing information. In some cases it is possible to decode
321 without timing information, fo 292 without timing information, for example a per-thread context
322 that does not overlap executab 293 that does not overlap executable memory maps.
323 294
324 The default config selects tsc 295 The default config selects tsc (i.e. tsc=1).
325 296
326 noretcomp Always supported. Disables "r 297 noretcomp Always supported. Disables "return compression" so a TIP packet
327 is produced when a function re 298 is produced when a function returns. Causes more packets to be
328 produced but might make decodi 299 produced but might make decoding more reliable.
329 300
330 The default config does not se 301 The default config does not select noretcomp (i.e. noretcomp=0).
331 302
332 psb_period Allows the frequency of PSB pa 303 psb_period Allows the frequency of PSB packets to be specified.
333 304
334 The PSB packet is a synchroniz 305 The PSB packet is a synchronization packet that provides a
335 starting point for decoding or 306 starting point for decoding or recovery from errors.
336 307
337 Support for psb_period is indi 308 Support for psb_period is indicated by:
338 309
339 /sys/bus/event_source/ 310 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
340 311
341 which contains "1" if the feat 312 which contains "1" if the feature is supported and "0"
342 otherwise. 313 otherwise.
343 314
344 Valid values are given by: 315 Valid values are given by:
345 316
346 /sys/bus/event_source/ 317 /sys/bus/event_source/devices/intel_pt/caps/psb_periods
347 318
348 which contains a hexadecimal v 319 which contains a hexadecimal value, the bits of which represent
349 valid values e.g. bit 2 set me 320 valid values e.g. bit 2 set means value 2 is valid.
350 321
351 The psb_period value is conver 322 The psb_period value is converted to the approximate number of
352 trace bytes between PSB packet 323 trace bytes between PSB packets as:
353 324
354 2 ^ (value + 11) 325 2 ^ (value + 11)
355 326
356 e.g. value 3 means 16KiB bytes 327 e.g. value 3 means 16KiB bytes between PSBs
357 328
358 If an invalid value is entered 329 If an invalid value is entered, the error message
359 will give a list of valid valu 330 will give a list of valid values e.g.
360 331
361 $ perf record -e intel 332 $ perf record -e intel_pt/psb_period=15/u uname
362 Invalid psb_period for 333 Invalid psb_period for intel_pt. Valid values are: 0-5
363 334
364 If MTC packets are selected, t 335 If MTC packets are selected, the default config selects a value
365 of 3 (i.e. psb_period=3) or th 336 of 3 (i.e. psb_period=3) or the nearest lower value that is
366 supported (0 is always support 337 supported (0 is always supported). Otherwise the default is 0.
367 338
368 If decoding is expected to be 339 If decoding is expected to be reliable and the buffer is large
369 then a large PSB period can be 340 then a large PSB period can be used.
370 341
371 Because a TSC packet is produc 342 Because a TSC packet is produced with PSB, the PSB period can
372 also affect the granularity to 343 also affect the granularity to timing information in the absence
373 of MTC or CYC. 344 of MTC or CYC.
374 345
375 mtc Produces MTC timing packets. 346 mtc Produces MTC timing packets.
376 347
377 MTC packets provide finer grai 348 MTC packets provide finer grain timestamp information than TSC
378 packets. MTC packets record t 349 packets. MTC packets record time using the hardware crystal
379 clock (CTC) which is related t 350 clock (CTC) which is related to TSC packets using a TMA packet.
380 351
381 Support for this feature is in 352 Support for this feature is indicated by:
382 353
383 /sys/bus/event_source/ 354 /sys/bus/event_source/devices/intel_pt/caps/mtc
384 355
385 which contains "1" if the feat 356 which contains "1" if the feature is supported and
386 "0" otherwise. 357 "0" otherwise.
387 358
388 The frequency of MTC packets c 359 The frequency of MTC packets can also be specified - see
389 mtc_period below. 360 mtc_period below.
390 361
391 mtc_period Specifies how frequently MTC p 362 mtc_period Specifies how frequently MTC packets are produced - see mtc
392 above for how to determine if 363 above for how to determine if MTC packets are supported.
393 364
394 Valid values are given by: 365 Valid values are given by:
395 366
396 /sys/bus/event_source/ 367 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods
397 368
398 which contains a hexadecimal v 369 which contains a hexadecimal value, the bits of which represent
399 valid values e.g. bit 2 set me 370 valid values e.g. bit 2 set means value 2 is valid.
400 371
401 The mtc_period value is conver 372 The mtc_period value is converted to the MTC frequency as:
402 373
403 CTC-frequency / (2 ^ v 374 CTC-frequency / (2 ^ value)
404 375
405 e.g. value 3 means one eighth 376 e.g. value 3 means one eighth of CTC-frequency
406 377
407 Where CTC is the hardware crys 378 Where CTC is the hardware crystal clock, the frequency of which
408 can be related to TSC via valu 379 can be related to TSC via values provided in cpuid leaf 0x15.
409 380
410 If an invalid value is entered 381 If an invalid value is entered, the error message
411 will give a list of valid valu 382 will give a list of valid values e.g.
412 383
413 $ perf record -e intel 384 $ perf record -e intel_pt/mtc_period=15/u uname
414 Invalid mtc_period for 385 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
415 386
416 The default value is 3 or the 387 The default value is 3 or the nearest lower value
417 that is supported (0 is always 388 that is supported (0 is always supported).
418 389
419 cyc Produces CYC timing packets. 390 cyc Produces CYC timing packets.
420 391
421 CYC packets provide even finer 392 CYC packets provide even finer grain timestamp information than
422 MTC and TSC packets. A CYC pa 393 MTC and TSC packets. A CYC packet contains the number of CPU
423 cycles since the last CYC pack 394 cycles since the last CYC packet. Unlike MTC and TSC packets,
424 CYC packets are only sent when 395 CYC packets are only sent when another packet is also sent.
425 396
426 Support for this feature is in 397 Support for this feature is indicated by:
427 398
428 /sys/bus/event_source/ 399 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
429 400
430 which contains "1" if the feat 401 which contains "1" if the feature is supported and
431 "0" otherwise. 402 "0" otherwise.
432 403
433 The number of CYC packets prod 404 The number of CYC packets produced can be reduced by specifying
434 a threshold - see cyc_thresh b 405 a threshold - see cyc_thresh below.
435 406
436 cyc_thresh Specifies how frequently CYC p 407 cyc_thresh Specifies how frequently CYC packets are produced - see cyc
437 above for how to determine if 408 above for how to determine if CYC packets are supported.
438 409
439 Valid cyc_thresh values are gi 410 Valid cyc_thresh values are given by:
440 411
441 /sys/bus/event_source/ 412 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
442 413
443 which contains a hexadecimal v 414 which contains a hexadecimal value, the bits of which represent
444 valid values e.g. bit 2 set me 415 valid values e.g. bit 2 set means value 2 is valid.
445 416
446 The cyc_thresh value represent 417 The cyc_thresh value represents the minimum number of CPU cycles
447 that must have passed before a 418 that must have passed before a CYC packet can be sent. The
448 number of CPU cycles is: 419 number of CPU cycles is:
449 420
450 2 ^ (value - 1) 421 2 ^ (value - 1)
451 422
452 e.g. value 4 means 8 CPU cycle 423 e.g. value 4 means 8 CPU cycles must pass before a CYC packet
453 can be sent. Note a CYC packe 424 can be sent. Note a CYC packet is still only sent when another
454 packet is sent, not at, e.g. e 425 packet is sent, not at, e.g. every 8 CPU cycles.
455 426
456 If an invalid value is entered 427 If an invalid value is entered, the error message
457 will give a list of valid valu 428 will give a list of valid values e.g.
458 429
459 $ perf record -e intel 430 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
460 Invalid cyc_thresh for 431 Invalid cyc_thresh for intel_pt. Valid values are: 0-12
461 432
462 CYC packets are not requested 433 CYC packets are not requested by default.
463 434
464 pt Specifies pass-through which e 435 pt Specifies pass-through which enables the 'branch' config term.
465 436
466 The default config selects 'pt 437 The default config selects 'pt' if it is available, so a user will
467 never need to specify this ter 438 never need to specify this term.
468 439
469 branch Enable branch tracing. Branch 440 branch Enable branch tracing. Branch tracing is enabled by default so to
470 disable branch tracing use 'br 441 disable branch tracing use 'branch=0'.
471 442
472 The default config selects 'br 443 The default config selects 'branch' if it is available.
473 444
474 ptw Enable PTWRITE packets which a 445 ptw Enable PTWRITE packets which are produced when a ptwrite instruction
475 is executed. 446 is executed.
476 447
477 Support for this feature is in 448 Support for this feature is indicated by:
478 449
479 /sys/bus/event_source/ 450 /sys/bus/event_source/devices/intel_pt/caps/ptwrite
480 451
481 which contains "1" if the feat 452 which contains "1" if the feature is supported and
482 "0" otherwise. 453 "0" otherwise.
483 454
484 As an alternative, refer to "E <<
485 <<
486 fup_on_ptw Enable a FUP packet to follow 455 fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet
487 provides the address of the pt 456 provides the address of the ptwrite instruction. In the absence of
488 fup_on_ptw, the decoder will u 457 fup_on_ptw, the decoder will use the address of the previous branch
489 if branch tracing is enabled, 458 if branch tracing is enabled, otherwise the address will be zero.
490 Note that fup_on_ptw will work 459 Note that fup_on_ptw will work even when branch tracing is disabled.
491 460
492 pwr_evt Enable power events. The powe 461 pwr_evt Enable power events. The power events provide information about
493 changes to the CPU C-state. 462 changes to the CPU C-state.
494 463
495 Support for this feature is in 464 Support for this feature is indicated by:
496 465
497 /sys/bus/event_source/ 466 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace
498 467
499 which contains "1" if the feat 468 which contains "1" if the feature is supported and
500 "0" otherwise. 469 "0" otherwise.
501 470
502 event Enable Event Trace. The event <<
503 events. <<
504 <<
505 Support for this feature is in <<
506 <<
507 /sys/bus/event_source/ <<
508 <<
509 which contains "1" if the feat <<
510 "0" otherwise. <<
511 <<
512 notnt Disable TNT packets. Without <<
513 executable code to reconstruct <<
514 and TIP.PGD packets still indi <<
515 return compression is disabled <<
516 The advantage of eliminating T <<
517 trace and corresponding tracin <<
518 <<
519 Support for this feature is in <<
520 <<
521 /sys/bus/event_source/ <<
522 <<
523 which contains "1" if the feat <<
524 "0" otherwise. <<
525 <<
526 471
527 AUX area sampling option 472 AUX area sampling option
528 ~~~~~~~~~~~~~~~~~~~~~~~~ 473 ~~~~~~~~~~~~~~~~~~~~~~~~
529 474
530 To select Intel PT "sampling" the AUX area sam 475 To select Intel PT "sampling" the AUX area sampling option can be used:
531 476
532 --aux-sample 477 --aux-sample
533 478
534 Optionally it can be followed by the sample si 479 Optionally it can be followed by the sample size in bytes e.g.
535 480
536 --aux-sample=8192 481 --aux-sample=8192
537 482
538 In addition, the Intel PT event to sample must 483 In addition, the Intel PT event to sample must be defined e.g.
539 484
540 -e intel_pt//u 485 -e intel_pt//u
541 486
542 Samples on other events will be created contai 487 Samples on other events will be created containing Intel PT data e.g. the
543 following will create Intel PT samples on the 488 following will create Intel PT samples on the branch-misses event, note the
544 events must be grouped using {}: 489 events must be grouped using {}:
545 490
546 perf record --aux-sample -e '{intel_pt 491 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}'
547 492
548 An alternative to '--aux-sample' is to add the 493 An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to
549 events. In this case, the grouping is implied 494 events. In this case, the grouping is implied e.g.
550 495
551 perf record -e intel_pt//u -e branch-m 496 perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u
552 497
553 is the same as: 498 is the same as:
554 499
555 perf record -e '{intel_pt//u,branch-mi 500 perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}'
556 501
557 but allows for also using an address filter e. 502 but allows for also using an address filter e.g.:
558 503
559 perf record -e intel_pt//u --filter 'f 504 perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls
560 505
561 It is important to select a sample size that i 506 It is important to select a sample size that is big enough to contain at least
562 one PSB packet. If not a warning will be disp 507 one PSB packet. If not a warning will be displayed:
563 508
564 Intel PT sample size (%zu) may be too 509 Intel PT sample size (%zu) may be too small for PSB period (%zu)
565 510
566 The calculation used for that is: if sample_si 511 The calculation used for that is: if sample_size <= psb_period + 256 display the
567 warning. When sampling is used, psb_period de 512 warning. When sampling is used, psb_period defaults to 0 (2KiB).
568 513
569 The default sample size is 4KiB. 514 The default sample size is 4KiB.
570 515
571 The sample size is passed in aux_sample_size i 516 The sample size is passed in aux_sample_size in struct perf_event_attr. The
572 sample size is limited by the maximum event si 517 sample size is limited by the maximum event size which is 64KiB. It is
573 difficult to know how big the event might be w 518 difficult to know how big the event might be without the trace sample attached,
574 but the tool validates that the sample size is 519 but the tool validates that the sample size is not greater than 60KiB.
575 520
576 521
577 new snapshot option 522 new snapshot option
578 ~~~~~~~~~~~~~~~~~~~ 523 ~~~~~~~~~~~~~~~~~~~
579 524
580 The difference between full trace and snapshot 525 The difference between full trace and snapshot from the kernel's perspective is
581 that in full trace we don't overwrite trace da 526 that in full trace we don't overwrite trace data that the user hasn't collected
582 yet (and indicated that by advancing aux_tail) 527 yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
583 the trace run and overwrite older data in the 528 the trace run and overwrite older data in the buffer so that whenever something
584 interesting happens, we can stop it and grab a 529 interesting happens, we can stop it and grab a snapshot of what was going on
585 around that interesting moment. 530 around that interesting moment.
586 531
587 To select snapshot mode a new option has been 532 To select snapshot mode a new option has been added:
588 533
589 -S 534 -S
590 535
591 Optionally it can be followed by the snapshot 536 Optionally it can be followed by the snapshot size e.g.
592 537
593 -S0x100000 538 -S0x100000
594 539
595 The default snapshot size is the auxtrace mmap 540 The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size
596 nor snapshot size is specified, then the defau 541 nor snapshot size is specified, then the default is 4MiB for privileged users
597 (or if /proc/sys/kernel/perf_event_paranoid < 542 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
598 If an unprivileged user does not specify mmap 543 If an unprivileged user does not specify mmap pages, the mmap pages will be
599 reduced as described in the 'new auxtrace mmap 544 reduced as described in the 'new auxtrace mmap size option' section below.
600 545
601 The snapshot size is displayed if the option - 546 The snapshot size is displayed if the option -vv is used e.g.
602 547
603 Intel PT snapshot size: %zu 548 Intel PT snapshot size: %zu
604 549
605 550
606 new auxtrace mmap size option 551 new auxtrace mmap size option
607 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 552 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
608 553
609 Intel PT buffer size is specified by an additi 554 Intel PT buffer size is specified by an addition to the -m option e.g.
610 555
611 -m,16 556 -m,16
612 557
613 selects a buffer size of 16 pages i.e. 64KiB. 558 selects a buffer size of 16 pages i.e. 64KiB.
614 559
615 Note that the existing functionality of -m is 560 Note that the existing functionality of -m is unchanged. The auxtrace mmap size
616 is specified by the optional addition of a com 561 is specified by the optional addition of a comma and the value.
617 562
618 The default auxtrace mmap size for Intel PT is 563 The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users
619 (or if /proc/sys/kernel/perf_event_paranoid < 564 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
620 If an unprivileged user does not specify mmap 565 If an unprivileged user does not specify mmap pages, the mmap pages will be
621 reduced from the default 512KiB/page_size to 2 566 reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the
622 user is likely to get an error as they exceed 567 user is likely to get an error as they exceed their mlock limit (Max locked
623 memory as shown in /proc/self/limits). Note t 568 memory as shown in /proc/self/limits). Note that perf does not count the first
624 512KiB (actually /proc/sys/kernel/perf_event_m 569 512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu
625 against the mlock limit so an unprivileged use 570 against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus
626 their mlock limit (which defaults to 64KiB but 571 their mlock limit (which defaults to 64KiB but is not multiplied by the number
627 of cpus). 572 of cpus).
628 573
629 In full-trace mode, powers of two are allowed 574 In full-trace mode, powers of two are allowed for buffer size, with a minimum
630 size of 2 pages. In snapshot mode or sampling 575 size of 2 pages. In snapshot mode or sampling mode, it is the same but the
631 minimum size is 1 page. 576 minimum size is 1 page.
632 577
633 The mmap size and auxtrace mmap size are displ 578 The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g.
634 579
635 mmap length 528384 580 mmap length 528384
636 auxtrace mmap length 4198400 581 auxtrace mmap length 4198400
637 582
638 583
639 Intel PT modes of operation 584 Intel PT modes of operation
640 ~~~~~~~~~~~~~~~~~~~~~~~~~~~ 585 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
641 586
642 Intel PT can be used in 3 modes: 587 Intel PT can be used in 3 modes:
643 full-trace mode 588 full-trace mode
644 sample mode 589 sample mode
645 snapshot mode 590 snapshot mode
646 591
647 Full-trace mode traces continuously e.g. 592 Full-trace mode traces continuously e.g.
648 593
649 perf record -e intel_pt//u uname 594 perf record -e intel_pt//u uname
650 595
651 Sample mode attaches a Intel PT sample to othe 596 Sample mode attaches a Intel PT sample to other events e.g.
652 597
653 perf record --aux-sample -e intel_pt// 598 perf record --aux-sample -e intel_pt//u -e branch-misses:u
654 599
655 Snapshot mode captures the available data when 600 Snapshot mode captures the available data when a signal is sent or "snapshot"
656 control command is issued. e.g. using a signal 601 control command is issued. e.g. using a signal
657 602
658 perf record -v -e intel_pt//u -S ./loo 603 perf record -v -e intel_pt//u -S ./loopy 1000000000 &
659 [1] 11435 604 [1] 11435
660 kill -USR2 11435 605 kill -USR2 11435
661 Recording AUX area tracing snapshot 606 Recording AUX area tracing snapshot
662 607
663 Note that the signal sent is SIGUSR2. 608 Note that the signal sent is SIGUSR2.
664 Note that "Recording AUX area tracing snapshot 609 Note that "Recording AUX area tracing snapshot" is displayed because the -v
665 option is used. 610 option is used.
666 611
667 The advantage of using "snapshot" control comm 612 The advantage of using "snapshot" control command is that the access is
668 controlled by access to a FIFO e.g. 613 controlled by access to a FIFO e.g.
669 614
670 $ mkfifo perf.control 615 $ mkfifo perf.control
671 $ mkfifo perf.ack 616 $ mkfifo perf.ack
672 $ cat perf.ack & 617 $ cat perf.ack &
673 [1] 15235 618 [1] 15235
674 $ sudo ~/bin/perf record --control fif 619 $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 &
675 [2] 15243 620 [2] 15243
676 $ ps -e | grep perf 621 $ ps -e | grep perf
677 15244 pts/1 00:00:00 perf 622 15244 pts/1 00:00:00 perf
678 $ kill -USR2 15244 623 $ kill -USR2 15244
679 bash: kill: (15244) - Operation not pe 624 bash: kill: (15244) - Operation not permitted
680 $ echo snapshot > perf.control 625 $ echo snapshot > perf.control
681 ack 626 ack
682 627
683 The 3 Intel PT modes of operation cannot be us 628 The 3 Intel PT modes of operation cannot be used together.
684 629
685 630
686 Buffer handling 631 Buffer handling
687 ~~~~~~~~~~~~~~~ 632 ~~~~~~~~~~~~~~~
688 633
689 There may be buffer limitations (i.e. single T 634 There may be buffer limitations (i.e. single ToPa entry) which means that actual
690 buffer sizes are limited to powers of 2 up to !! 635 buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to
691 provide other sizes, and in particular an arbi 636 provide other sizes, and in particular an arbitrarily large size, multiple
692 buffers are logically concatenated. However a 637 buffers are logically concatenated. However an interrupt must be used to switch
693 between buffers. That has two potential probl 638 between buffers. That has two potential problems:
694 a) the interrupt may not be handled in 639 a) the interrupt may not be handled in time so that the current buffer
695 becomes full and some trace data is lo 640 becomes full and some trace data is lost.
696 b) the interrupts may slow the system 641 b) the interrupts may slow the system and affect the performance
697 results. 642 results.
698 643
699 If trace data is lost, the driver sets 'trunca 644 If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event
700 which the tools report as an error. 645 which the tools report as an error.
701 646
702 In full-trace mode, the driver waits for data 647 In full-trace mode, the driver waits for data to be copied out before allowing
703 the (logical) buffer to wrap-around. If data 648 the (logical) buffer to wrap-around. If data is not copied out quickly enough,
704 again 'truncated' is set in the PERF_RECORD_AU 649 again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to
705 wait, the intel_pt event gets disabled. Becau 650 wait, the intel_pt event gets disabled. Because it is difficult to know when
706 that happens, perf tools always re-enable the 651 that happens, perf tools always re-enable the intel_pt event after copying out
707 data. 652 data.
708 653
709 654
710 Intel PT and build ids 655 Intel PT and build ids
711 ~~~~~~~~~~~~~~~~~~~~~~ 656 ~~~~~~~~~~~~~~~~~~~~~~
712 657
713 By default "perf record" post-processes the ev 658 By default "perf record" post-processes the event stream to find all build ids
714 for executables for all addresses sampled. De 659 for executables for all addresses sampled. Deliberately, Intel PT is not
715 decoded for that purpose (it would take too lo 660 decoded for that purpose (it would take too long). Instead the build ids for
716 all executables encountered (due to mmap, comm 661 all executables encountered (due to mmap, comm or task events) are included
717 in the perf.data file. 662 in the perf.data file.
718 663
719 To see buildids included in the perf.data file 664 To see buildids included in the perf.data file use the command:
720 665
721 perf buildid-list 666 perf buildid-list
722 667
723 If the perf.data file contains Intel PT data, 668 If the perf.data file contains Intel PT data, that is the same as:
724 669
725 perf buildid-list --with-hits 670 perf buildid-list --with-hits
726 671
727 672
728 Snapshot mode and event disabling 673 Snapshot mode and event disabling
729 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 674 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
730 675
731 In order to make a snapshot, the intel_pt even 676 In order to make a snapshot, the intel_pt event is disabled using an IOCTL,
732 namely PERF_EVENT_IOC_DISABLE. However doing 677 namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the
733 collection of side-band information. In order 678 collection of side-band information. In order to prevent that, a dummy
734 software event has been introduced that permit 679 software event has been introduced that permits tracking events (like mmaps) to
735 continue to be recorded while intel_pt is disa 680 continue to be recorded while intel_pt is disabled. That is important to ensure
736 there is complete side-band information to all 681 there is complete side-band information to allow the decoding of subsequent
737 snapshots. 682 snapshots.
738 683
739 A test has been created for that. To find the 684 A test has been created for that. To find the test:
740 685
741 perf test list 686 perf test list
742 ... 687 ...
743 23: Test using a dummy software event 688 23: Test using a dummy software event to keep tracking
744 689
745 To run the test: 690 To run the test:
746 691
747 perf test 23 692 perf test 23
748 23: Test using a dummy software event 693 23: Test using a dummy software event to keep tracking : Ok
749 694
750 695
751 perf record modes (nothing new here) 696 perf record modes (nothing new here)
752 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 697 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
753 698
754 perf record essentially operates in one of thr 699 perf record essentially operates in one of three modes:
755 per thread 700 per thread
756 per cpu 701 per cpu
757 workload only 702 workload only
758 703
759 "per thread" mode is selected by -t or by --pe 704 "per thread" mode is selected by -t or by --per-thread (with -p or -u or just a
760 workload). 705 workload).
761 "per cpu" is selected by -C or -a. 706 "per cpu" is selected by -C or -a.
762 "workload only" mode is selected by not using 707 "workload only" mode is selected by not using the other options but providing a
763 command to run (i.e. the workload). 708 command to run (i.e. the workload).
764 709
765 In per-thread mode an exact list of threads is 710 In per-thread mode an exact list of threads is traced. There is no inheritance.
766 Each thread has its own event buffer. 711 Each thread has its own event buffer.
767 712
768 In per-cpu mode all processes (or processes fr 713 In per-cpu mode all processes (or processes from the selected cgroup i.e. -G
769 option, or processes selected with -p or -u) a 714 option, or processes selected with -p or -u) are traced. Each cpu has its own
770 buffer. Inheritance is allowed. 715 buffer. Inheritance is allowed.
771 716
772 In workload-only mode, the workload is traced 717 In workload-only mode, the workload is traced but with per-cpu buffers.
773 Inheritance is allowed. Note that you can now 718 Inheritance is allowed. Note that you can now trace a workload in per-thread
774 mode by using the --per-thread option. 719 mode by using the --per-thread option.
775 720
776 721
777 Privileged vs non-privileged users 722 Privileged vs non-privileged users
778 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 723 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
779 724
780 Unless /proc/sys/kernel/perf_event_paranoid is 725 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users
781 have memory limits imposed upon them. That af 726 have memory limits imposed upon them. That affects what buffer sizes they can
782 have as outlined above. 727 have as outlined above.
783 728
784 The v4.2 kernel introduced support for a conte 729 The v4.2 kernel introduced support for a context switch metadata event,
785 PERF_RECORD_SWITCH, which allows unprivileged 730 PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes
786 are scheduled out and in, just not by whom, wh 731 are scheduled out and in, just not by whom, which is left for the
787 PERF_RECORD_SWITCH_CPU_WIDE, that is only acce 732 PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context,
788 which in turn requires CAP_PERFMON or CAP_SYS_ 733 which in turn requires CAP_PERFMON or CAP_SYS_ADMIN.
789 734
790 Please see the 45ac1403f564 ("perf: Add PERF_R 735 Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context
791 switches") commit, that introduces these metad 736 switches") commit, that introduces these metadata events for further info.
792 737
793 When working with kernels < v4.2, the followin 738 When working with kernels < v4.2, the following considerations must be taken,
794 as the sched:sched_switch tracepoints will be 739 as the sched:sched_switch tracepoints will be used to receive such information:
795 740
796 Unless /proc/sys/kernel/perf_event_paranoid is 741 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are
797 not permitted to use tracepoints which means t 742 not permitted to use tracepoints which means there is insufficient side-band
798 information to decode Intel PT in per-cpu mode 743 information to decode Intel PT in per-cpu mode, and potentially workload-only
799 mode too if the workload creates new processes 744 mode too if the workload creates new processes.
800 745
801 Note also, that to use tracepoints, read-acces 746 Note also, that to use tracepoints, read-access to debugfs is required. So if
802 debugfs is not mounted or the user does not ha 747 debugfs is not mounted or the user does not have read-access, it will again not
803 be possible to decode Intel PT in per-cpu mode 748 be possible to decode Intel PT in per-cpu mode.
804 749
805 750
806 sched_switch tracepoint 751 sched_switch tracepoint
807 ~~~~~~~~~~~~~~~~~~~~~~~ 752 ~~~~~~~~~~~~~~~~~~~~~~~
808 753
809 The sched_switch tracepoint is used to provide 754 The sched_switch tracepoint is used to provide side-band data for Intel PT
810 decoding in kernels where the PERF_RECORD_SWIT 755 decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't
811 available. 756 available.
812 757
813 The sched_switch events are automatically adde 758 The sched_switch events are automatically added. e.g. the second event shown
814 below: 759 below:
815 760
816 $ perf record -vv -e intel_pt//u uname 761 $ perf record -vv -e intel_pt//u uname
817 -------------------------------------- 762 ------------------------------------------------------------
818 perf_event_attr: 763 perf_event_attr:
819 type 6 764 type 6
820 size 112 765 size 112
821 config 0x400 766 config 0x400
822 { sample_period, sample_freq } 1 767 { sample_period, sample_freq } 1
823 sample_type IP|TI 768 sample_type IP|TID|TIME|CPU|IDENTIFIER
824 read_format ID 769 read_format ID
825 disabled 1 770 disabled 1
826 inherit 1 771 inherit 1
827 exclude_kernel 1 772 exclude_kernel 1
828 exclude_hv 1 773 exclude_hv 1
829 enable_on_exec 1 774 enable_on_exec 1
830 sample_id_all 1 775 sample_id_all 1
831 -------------------------------------- 776 ------------------------------------------------------------
832 sys_perf_event_open: pid 31104 cpu 0 777 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
833 sys_perf_event_open: pid 31104 cpu 1 778 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
834 sys_perf_event_open: pid 31104 cpu 2 779 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
835 sys_perf_event_open: pid 31104 cpu 3 780 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
836 -------------------------------------- 781 ------------------------------------------------------------
837 perf_event_attr: 782 perf_event_attr:
838 type 2 783 type 2
839 size 112 784 size 112
840 config 0x108 785 config 0x108
841 { sample_period, sample_freq } 1 786 { sample_period, sample_freq } 1
842 sample_type IP|TI 787 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER
843 read_format ID 788 read_format ID
844 inherit 1 789 inherit 1
845 sample_id_all 1 790 sample_id_all 1
846 exclude_guest 1 791 exclude_guest 1
847 -------------------------------------- 792 ------------------------------------------------------------
848 sys_perf_event_open: pid -1 cpu 0 gr 793 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8
849 sys_perf_event_open: pid -1 cpu 1 gr 794 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8
850 sys_perf_event_open: pid -1 cpu 2 gr 795 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8
851 sys_perf_event_open: pid -1 cpu 3 gr 796 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8
852 -------------------------------------- 797 ------------------------------------------------------------
853 perf_event_attr: 798 perf_event_attr:
854 type 1 799 type 1
855 size 112 800 size 112
856 config 0x9 801 config 0x9
857 { sample_period, sample_freq } 1 802 { sample_period, sample_freq } 1
858 sample_type IP|TI 803 sample_type IP|TID|TIME|IDENTIFIER
859 read_format ID 804 read_format ID
860 disabled 1 805 disabled 1
861 inherit 1 806 inherit 1
862 exclude_kernel 1 807 exclude_kernel 1
863 exclude_hv 1 808 exclude_hv 1
864 mmap 1 809 mmap 1
865 comm 1 810 comm 1
866 enable_on_exec 1 811 enable_on_exec 1
867 task 1 812 task 1
868 sample_id_all 1 813 sample_id_all 1
869 mmap2 1 814 mmap2 1
870 comm_exec 1 815 comm_exec 1
871 -------------------------------------- 816 ------------------------------------------------------------
872 sys_perf_event_open: pid 31104 cpu 0 817 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
873 sys_perf_event_open: pid 31104 cpu 1 818 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
874 sys_perf_event_open: pid 31104 cpu 2 819 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
875 sys_perf_event_open: pid 31104 cpu 3 820 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
876 mmap size 528384B 821 mmap size 528384B
877 AUX area mmap length 4194304 822 AUX area mmap length 4194304
878 perf event ring buffer mmapped per cpu 823 perf event ring buffer mmapped per cpu
879 Synthesizing auxtrace information 824 Synthesizing auxtrace information
880 Linux 825 Linux
881 [ perf record: Woken up 1 times to wri 826 [ perf record: Woken up 1 times to write data ]
882 [ perf record: Captured and wrote 0.04 827 [ perf record: Captured and wrote 0.042 MB perf.data ]
883 828
884 Note, the sched_switch event is only added if 829 Note, the sched_switch event is only added if the user is permitted to use it
885 and only in per-cpu mode. 830 and only in per-cpu mode.
886 831
887 Note also, the sched_switch event is only adde 832 Note also, the sched_switch event is only added if TSC packets are requested.
888 That is because, in the absence of timing info 833 That is because, in the absence of timing information, the sched_switch events
889 cannot be matched against the Intel PT trace. 834 cannot be matched against the Intel PT trace.
890 835
891 836
892 perf script 837 perf script
893 ----------- 838 -----------
894 839
895 By default, perf script will decode trace data 840 By default, perf script will decode trace data found in the perf.data file.
896 This can be further controlled by new option - 841 This can be further controlled by new option --itrace.
897 842
898 843
899 New --itrace option 844 New --itrace option
900 ~~~~~~~~~~~~~~~~~~~ 845 ~~~~~~~~~~~~~~~~~~~
901 846
902 Having no option is the same as 847 Having no option is the same as
903 848
904 --itrace 849 --itrace
905 850
906 which, in turn, is the same as 851 which, in turn, is the same as
907 852
908 --itrace=cepwxy !! 853 --itrace=cepwx
909 854
910 The letters are: 855 The letters are:
911 856
912 i synthesize "instructions" even 857 i synthesize "instructions" events
913 y synthesize "cycles" events <<
914 b synthesize "branches" events 858 b synthesize "branches" events
915 x synthesize "transactions" even 859 x synthesize "transactions" events
916 w synthesize "ptwrite" events 860 w synthesize "ptwrite" events
917 p synthesize "power" events (inc !! 861 p synthesize "power" events
918 c synthesize branches events (ca 862 c synthesize branches events (calls only)
919 r synthesize branches events (re 863 r synthesize branches events (returns only)
920 o synthesize PEBS-via-PT events <<
921 I synthesize Event Trace events <<
922 e synthesize tracing error event 864 e synthesize tracing error events
923 d create a debug log 865 d create a debug log
924 g synthesize a call chain (use w 866 g synthesize a call chain (use with i or x)
925 G synthesize a call chain on exi 867 G synthesize a call chain on existing event records
926 l synthesize last branch entries 868 l synthesize last branch entries (use with i or x)
927 L synthesize last branch entries 869 L synthesize last branch entries on existing event records
928 s skip initial number of events 870 s skip initial number of events
929 q quicker (less detailed) decodi 871 q quicker (less detailed) decoding
930 A approximate IPC <<
931 Z prefer to ignore timestamps (s <<
932 872
933 "Instructions" events look like they were reco 873 "Instructions" events look like they were recorded by "perf record -e
934 instructions". 874 instructions".
935 875
936 "Cycles" events look like they were recorded b <<
937 (ie., the default). Note that even with CYC pa <<
938 these are not fully accurate, since CYC packet <<
939 instruction, only when some other event (like <<
940 TNT packet representing multiple branches) hap <<
941 be emitted. Thus, it is more effective for att <<
942 (and possibly basic blocks) than to individual <<
943 is not even perfect for functions (although it <<
944 option is active). <<
945 <<
946 "Branches" events look like they were recorded 876 "Branches" events look like they were recorded by "perf record -e branches". "c"
947 and "r" can be combined to get calls and retur 877 and "r" can be combined to get calls and returns.
948 878
949 "Transactions" events correspond to the start 879 "Transactions" events correspond to the start or end of transactions. The
950 'flags' field can be used in perf script to de 880 'flags' field can be used in perf script to determine whether the event is a
951 transaction start, commit or abort. !! 881 tranasaction start, commit or abort.
952 882
953 Note that "instructions", "cycles", "branches" !! 883 Note that "instructions", "branches" and "transactions" events depend on code
954 depend on code flow packets which can be disab !! 884 flow packets which can be disabled by using the config term "branch=0". Refer
955 "branch=0". Refer to the config terms section !! 885 to the config terms section above.
956 886
957 "ptwrite" events record the payload of the ptw 887 "ptwrite" events record the payload of the ptwrite instruction and whether
958 "fup_on_ptw" was used. "ptwrite" events depen 888 "fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are
959 recorded only if the "ptw" config term was use 889 recorded only if the "ptw" config term was used. Refer to the config terms
960 section above. perf script "synth" field disp 890 section above. perf script "synth" field displays "ptwrite" information like
961 this: "ip: 0 payload: 0x123456789abcdef0" whe 891 this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was
962 used. 892 used.
963 893
964 "Power" events correspond to power event packe 894 "Power" events correspond to power event packets and CBR (core-to-bus ratio)
965 packets. While CBR packets are always recorde 895 packets. While CBR packets are always recorded when tracing is enabled, power
966 event packets are recorded only if the "pwr_ev 896 event packets are recorded only if the "pwr_evt" config term was used. Refer to
967 the config terms section above. The power eve 897 the config terms section above. The power events record information about
968 C-state changes, whereas CBR is indicative of 898 C-state changes, whereas CBR is indicative of CPU frequency. perf script
969 "event,synth" fields display information like 899 "event,synth" fields display information like this:
970 <<
971 cbr: cbr: 22 freq: 2189 MHz (200%) 900 cbr: cbr: 22 freq: 2189 MHz (200%)
972 mwait: hints: 0x60 extensions: 0x1 901 mwait: hints: 0x60 extensions: 0x1
973 pwre: hw: 0 cstate: 2 sub-cstate: 0 902 pwre: hw: 0 cstate: 2 sub-cstate: 0
974 exstop: ip: 1 903 exstop: ip: 1
975 pwrx: deepest cstate: 2 last cstate: 904 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4
976 <<
977 Where: 905 Where:
978 <<
979 "cbr" includes the frequency and the p 906 "cbr" includes the frequency and the percentage of maximum non-turbo
980 "mwait" shows mwait hints and extensio 907 "mwait" shows mwait hints and extensions
981 "pwre" shows C-state transitions (to a 908 "pwre" shows C-state transitions (to a C-state deeper than C0) and
982 whether initiated by hardware 909 whether initiated by hardware
983 "exstop" indicates execution stopped a 910 "exstop" indicates execution stopped and whether the IP was recorded
984 exactly, 911 exactly,
985 "pwrx" indicates return to C0 912 "pwrx" indicates return to C0
986 <<
987 For more details refer to the Intel 64 and IA- 913 For more details refer to the Intel 64 and IA-32 Architectures Software
988 Developer Manuals. 914 Developer Manuals.
989 915
990 PSB events show when a PSB+ occurred and also <<
991 Emitting a PSB+ can cause a CPU a slight delay <<
992 of code with Intel PT, it is useful to know if <<
993 by Intel PT or not. <<
994 <<
995 Error events show where the decoder lost the t 916 Error events show where the decoder lost the trace. Error events
996 are quite important. Users must know if what 917 are quite important. Users must know if what they are seeing is a complete
997 picture or not. The "e" option may be followed 918 picture or not. The "e" option may be followed by flags which affect what errors
998 will or will not be reported. Each flag must 919 will or will not be reported. Each flag must be preceded by either '+' or '-'.
999 The flags supported by Intel PT are: 920 The flags supported by Intel PT are:
1000 <<
1001 -o Suppress overflow err 921 -o Suppress overflow errors
1002 -l Suppress trace data l 922 -l Suppress trace data lost errors
1003 <<
1004 For example, for errors but not overflow or d 923 For example, for errors but not overflow or data lost errors:
1005 924
1006 --itrace=e-o-l 925 --itrace=e-o-l
1007 926
1008 The "d" option will cause the creation of a f 927 The "d" option will cause the creation of a file "intel_pt.log" containing all
1009 decoded packets and instructions. Note that 928 decoded packets and instructions. Note that this option slows down the decoder
1010 and that the resulting file may be very large 929 and that the resulting file may be very large. The "d" option may be followed
1011 by flags which affect what debug messages wil 930 by flags which affect what debug messages will or will not be logged. Each flag
1012 must be preceded by either '+' or '-'. The fl 931 must be preceded by either '+' or '-'. The flags support by Intel PT are:
1013 <<
1014 -a Suppress logging of p 932 -a Suppress logging of perf events
1015 +a Log all perf events 933 +a Log all perf events
1016 +e Output only on decodi <<
1017 +o Output to stdout inst <<
1018 <<
1019 By default, logged perf events are filtered b 934 By default, logged perf events are filtered by any specified time ranges, but
1020 flag +a overrides that. The +e flag can be u !! 935 flag +a overrides that.
1021 default, the log size in that case is 16384 b <<
1022 linkperf:perf-config[1] e.g. perf config itra <<
1023 936
1024 In addition, the period of the "instructions" 937 In addition, the period of the "instructions" event can be specified. e.g.
1025 938
1026 --itrace=i10us 939 --itrace=i10us
1027 940
1028 sets the period to 10us i.e. one instruction 941 sets the period to 10us i.e. one instruction sample is synthesized for each 10
1029 microseconds of trace. Alternatives to "us" 942 microseconds of trace. Alternatives to "us" are "ms" (milliseconds),
1030 "ns" (nanoseconds), "t" (TSC ticks) or "i" (i 943 "ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
1031 944
1032 "ms", "us" and "ns" are converted to TSC tick 945 "ms", "us" and "ns" are converted to TSC ticks.
1033 946
1034 The timing information included with Intel PT 947 The timing information included with Intel PT does not give the time of every
1035 instruction. Consequently, for the purpose o 948 instruction. Consequently, for the purpose of sampling, the decoder estimates
1036 the time since the last timing packet based o 949 the time since the last timing packet based on 1 tick per instruction. The time
1037 on the sample is *not* adjusted and reflects 950 on the sample is *not* adjusted and reflects the last known value of TSC.
1038 951
1039 For Intel PT, the default period is 100us. 952 For Intel PT, the default period is 100us.
1040 953
1041 Setting it to a zero period means "as often a 954 Setting it to a zero period means "as often as possible".
1042 955
1043 In the case of Intel PT that is the same as a 956 In the case of Intel PT that is the same as a period of 1 and a unit of
1044 'instructions' (i.e. --itrace=i1i). 957 'instructions' (i.e. --itrace=i1i).
1045 958
1046 Also the call chain size (default 16, max. 10 959 Also the call chain size (default 16, max. 1024) for instructions or
1047 transactions events can be specified. e.g. 960 transactions events can be specified. e.g.
1048 961
1049 --itrace=ig32 962 --itrace=ig32
1050 --itrace=xg32 963 --itrace=xg32
1051 964
1052 Also the number of last branch entries (defau 965 Also the number of last branch entries (default 64, max. 1024) for instructions or
1053 transactions events can be specified. e.g. 966 transactions events can be specified. e.g.
1054 967
1055 --itrace=il10 968 --itrace=il10
1056 --itrace=xl10 969 --itrace=xl10
1057 970
1058 Note that last branch entries are cleared for 971 Note that last branch entries are cleared for each sample, so there is no overlap
1059 from one sample to the next. 972 from one sample to the next.
1060 973
1061 The G and L options are designed in particula 974 The G and L options are designed in particular for sample mode, and work much
1062 like g and l but add call chain and branch st 975 like g and l but add call chain and branch stack to the other selected events
1063 instead of synthesized events. For example, t 976 instead of synthesized events. For example, to record branch-misses events for
1064 'ls' and then add a call chain derived from t 977 'ls' and then add a call chain derived from the Intel PT trace:
1065 978
1066 perf record --aux-sample -e '{intel_p 979 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls
1067 perf report --itrace=Ge 980 perf report --itrace=Ge
1068 981
1069 Although in fact G is a default for perf repo 982 Although in fact G is a default for perf report, so that is the same as just:
1070 983
1071 perf report 984 perf report
1072 985
1073 One caveat with the G and L options is that t 986 One caveat with the G and L options is that they work poorly with "Large PEBS".
1074 Large PEBS means PEBS records will be accumul 987 Large PEBS means PEBS records will be accumulated by hardware and the written
1075 into the event buffer in one go. That reduce 988 into the event buffer in one go. That reduces interrupts, but can give very
1076 late timestamps. Because the Intel PT trace 989 late timestamps. Because the Intel PT trace is synchronized by timestamps,
1077 the PEBS events do not match the trace. Curr 990 the PEBS events do not match the trace. Currently, Large PEBS is used only in
1078 certain circumstances: 991 certain circumstances:
1079 - hardware supports it 992 - hardware supports it
1080 - PEBS is used 993 - PEBS is used
1081 - event period is specified, instead 994 - event period is specified, instead of frequency
1082 - the sample type is limited to the f 995 - the sample type is limited to the following flags:
1083 PERF_SAMPLE_IP | PERF_SAMPLE_ 996 PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR |
1084 PERF_SAMPLE_ID | PERF_SAMPLE_ 997 PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID |
1085 PERF_SAMPLE_DATA_SRC | PERF_S 998 PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER |
1086 PERF_SAMPLE_TRANSACTION | PER 999 PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR |
1087 PERF_SAMPLE_REGS_INTR | PERF_ 1000 PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER |
1088 PERF_SAMPLE_PERIOD (and somet 1001 PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME
1089 Because Intel PT sample mode uses a different 1002 Because Intel PT sample mode uses a different sample type to the list above,
1090 Large PEBS is not used with Intel PT sample m 1003 Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other
1091 cases, avoid specifying the event period i.e. 1004 cases, avoid specifying the event period i.e. avoid the 'perf record' -c option,
1092 --count option, or 'period' config term. 1005 --count option, or 'period' config term.
1093 1006
1094 To disable trace decoding entirely, use the o 1007 To disable trace decoding entirely, use the option --no-itrace.
1095 1008
1096 It is also possible to skip events generated 1009 It is also possible to skip events generated (instructions, branches, transactions)
1097 at the beginning. This is useful to ignore in 1010 at the beginning. This is useful to ignore initialization code.
1098 1011
1099 --itrace=i0nss1000000 1012 --itrace=i0nss1000000
1100 1013
1101 skips the first million instructions. 1014 skips the first million instructions.
1102 1015
1103 The q option changes the way the trace is dec 1016 The q option changes the way the trace is decoded. The decoding is much faster
1104 but much less detailed. Specifically, with t 1017 but much less detailed. Specifically, with the q option, the decoder does not
1105 decode TNT packets, and does not walk object 1018 decode TNT packets, and does not walk object code, but gets the ip from FUP and
1106 TIP packets. The q option can be used with t 1019 TIP packets. The q option can be used with the b and i options but the period
1107 is not used. The q option decodes more quick 1020 is not used. The q option decodes more quickly, but is useful only if the
1108 control flow of interest is represented or in 1021 control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or
1109 TIP.PGD packets (refer below). However the q 1022 TIP.PGD packets (refer below). However the q option could be used to find time
1110 ranges that could then be decoded fully using 1023 ranges that could then be decoded fully using the --time option.
1111 1024
1112 What will *not* be decoded with the (single) 1025 What will *not* be decoded with the (single) q option:
1113 1026
1114 - direct calls and jmps 1027 - direct calls and jmps
1115 - conditional branches 1028 - conditional branches
1116 - non-branch instructions 1029 - non-branch instructions
1117 1030
1118 What *will* be decoded with the (single) q op 1031 What *will* be decoded with the (single) q option:
1119 1032
1120 - asynchronous branches such as inter 1033 - asynchronous branches such as interrupts
1121 - indirect branches 1034 - indirect branches
1122 - function return target address *if* 1035 - function return target address *if* the noretcomp config term (refer
1123 config terms section) was used 1036 config terms section) was used
1124 - start of (control-flow) tracing 1037 - start of (control-flow) tracing
1125 - end of (control-flow) tracing, if i 1038 - end of (control-flow) tracing, if it is not out of context
1126 - power events, ptwrite, transaction 1039 - power events, ptwrite, transaction start and abort
1127 - instruction pointer associated with 1040 - instruction pointer associated with PSB packets
1128 1041
1129 Note the q option does not specify what event 1042 Note the q option does not specify what events will be synthesized e.g. the p
1130 option must be used also to show power events 1043 option must be used also to show power events.
1131 1044
1132 Repeating the q option (double-q i.e. qq) res 1045 Repeating the q option (double-q i.e. qq) results in even faster decoding and even
1133 less detail. The decoder decodes only extend 1046 less detail. The decoder decodes only extended PSB (PSB+) packets, getting the
1134 instruction pointer if there is a FUP packet 1047 instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and
1135 PSBEND). Note PSB packets occur regularly in 1048 PSBEND). Note PSB packets occur regularly in the trace based on the psb_period
1136 config term (refer config terms section). Th 1049 config term (refer config terms section). There will be a FUP packet if the
1137 PSB+ occurs while control flow is being trace 1050 PSB+ occurs while control flow is being traced.
1138 1051
1139 What will *not* be decoded with the qq option 1052 What will *not* be decoded with the qq option:
1140 1053
1141 - everything except instruction point 1054 - everything except instruction pointer associated with PSB packets
1142 1055
1143 What *will* be decoded with the qq option: 1056 What *will* be decoded with the qq option:
1144 1057
1145 - instruction pointer associated with 1058 - instruction pointer associated with PSB packets
1146 1059
1147 The Z option is equivalent to having recorded <<
1148 (i.e. config term tsc=0). It can be useful to <<
1149 decoding a trace of a virtual machine. <<
1150 <<
1151 <<
1152 dlfilter-show-cycles.so <<
1153 ~~~~~~~~~~~~~~~~~~~~~~~ <<
1154 <<
1155 Cycles can be displayed using dlfilter-show-c <<
1156 option can be useful to provide higher granul <<
1157 <<
1158 perf script --itrace=A --call-trace - <<
1159 <<
1160 To see a list of dlfilters: <<
1161 <<
1162 perf script -v --list-dlfilters <<
1163 <<
1164 See also linkperf:perf-dlfilters[1] <<
1165 <<
1166 1060
1167 dump option 1061 dump option
1168 ~~~~~~~~~~~ 1062 ~~~~~~~~~~~
1169 1063
1170 perf script has an option (-D) to "dump" the 1064 perf script has an option (-D) to "dump" the events i.e. display the binary
1171 data. 1065 data.
1172 1066
1173 When -D is used, Intel PT packets are display 1067 When -D is used, Intel PT packets are displayed. The packet decoder does not
1174 pay attention to PSB packets, but just decode 1068 pay attention to PSB packets, but just decodes the bytes - so the packets seen
1175 by the actual decoder may not be identical in 1069 by the actual decoder may not be identical in places where the data is corrupt.
1176 One example of that would be when the buffer- 1070 One example of that would be when the buffer-switching interrupt has been too
1177 slow, and the buffer has been filled complete 1071 slow, and the buffer has been filled completely. In that case, the last packet
1178 in the buffer might be truncated and immediat 1072 in the buffer might be truncated and immediately followed by a PSB as the trace
1179 continues in the next buffer. 1073 continues in the next buffer.
1180 1074
1181 To disable the display of Intel PT packets, c 1075 To disable the display of Intel PT packets, combine the -D option with
1182 --no-itrace. 1076 --no-itrace.
1183 1077
1184 1078
1185 perf report 1079 perf report
1186 ----------- 1080 -----------
1187 1081
1188 By default, perf report will decode trace dat 1082 By default, perf report will decode trace data found in the perf.data file.
1189 This can be further controlled by new option 1083 This can be further controlled by new option --itrace exactly the same as
1190 perf script, with the exception that the defa 1084 perf script, with the exception that the default is --itrace=igxe.
1191 1085
1192 1086
1193 perf inject 1087 perf inject
1194 ----------- 1088 -----------
1195 1089
1196 perf inject also accepts the --itrace option 1090 perf inject also accepts the --itrace option in which case tracing data is
1197 removed and replaced with the synthesized eve 1091 removed and replaced with the synthesized events. e.g.
1198 1092
1199 perf inject --itrace -i perf.data -o 1093 perf inject --itrace -i perf.data -o perf.data.new
1200 1094
1201 Below is an example of using Intel PT with au 1095 Below is an example of using Intel PT with autofdo. It requires autofdo
1202 (https://github.com/google/autofdo) and gcc v 1096 (https://github.com/google/autofdo) and gcc version 5. The bubble
1203 sort example is from the AutoFDO tutorial (ht 1097 sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial)
1204 amended to take the number of elements as a p 1098 amended to take the number of elements as a parameter.
1205 1099
1206 $ gcc-5 -O3 sort.c -o sort_optimized 1100 $ gcc-5 -O3 sort.c -o sort_optimized
1207 $ ./sort_optimized 30000 1101 $ ./sort_optimized 30000
1208 Bubble sorting array of 30000 element 1102 Bubble sorting array of 30000 elements
1209 2254 ms 1103 2254 ms
1210 1104
1211 $ cat ~/.perfconfig 1105 $ cat ~/.perfconfig
1212 [intel-pt] 1106 [intel-pt]
1213 mispred-all = on 1107 mispred-all = on
1214 1108
1215 $ perf record -e intel_pt//u ./sort 3 1109 $ perf record -e intel_pt//u ./sort 3000
1216 Bubble sorting array of 3000 elements 1110 Bubble sorting array of 3000 elements
1217 58 ms 1111 58 ms
1218 [ perf record: Woken up 2 times to wr 1112 [ perf record: Woken up 2 times to write data ]
1219 [ perf record: Captured and wrote 3.9 1113 [ perf record: Captured and wrote 3.939 MB perf.data ]
1220 $ perf inject -i perf.data -o inj --i 1114 $ perf inject -i perf.data -o inj --itrace=i100usle --strip
1221 $ ./create_gcov --binary=./sort --pro 1115 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1
1222 $ gcc-5 -O3 -fauto-profile=sort.gcov 1116 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
1223 $ ./sort_autofdo 30000 1117 $ ./sort_autofdo 30000
1224 Bubble sorting array of 30000 element 1118 Bubble sorting array of 30000 elements
1225 2155 ms 1119 2155 ms
1226 1120
1227 Note there is currently no advantage to using 1121 Note there is currently no advantage to using Intel PT instead of LBR, but
1228 that may change in the future if greater use 1122 that may change in the future if greater use is made of the data.
1229 1123
1230 1124
1231 PEBS via Intel PT 1125 PEBS via Intel PT
1232 ----------------- 1126 -----------------
1233 1127
1234 Some hardware has the feature to redirect PEB 1128 Some hardware has the feature to redirect PEBS records to the Intel PT trace.
1235 Recording is selected by using the aux-output 1129 Recording is selected by using the aux-output config term e.g.
1236 1130
1237 perf record -c 10000 -e '{intel_pt/br 1131 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname
1238 1132
1239 Originally, software only supported redirecti !! 1133 Note that currently, software only supports redirecting at most one PEBS event.
1240 was not able to differentiate one event from <<
1241 kernels and perf tools add support for the PE <<
1242 To check for the presence of that event in a <<
1243 <<
1244 perf script -D --no-itrace | grep PER <<
1245 1134
1246 To display PEBS events from the Intel PT trac 1135 To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g.
1247 1136
1248 perf script --itrace=oe 1137 perf script --itrace=oe
1249 1138
1250 XED 1139 XED
1251 --- 1140 ---
1252 1141
1253 include::build-xed.txt[] 1142 include::build-xed.txt[]
1254 <<
1255 <<
1256 Tracing Virtual Machines (kernel only) <<
1257 -------------------------------------- <<
1258 <<
1259 Currently, kernel tracing is supported with e <<
1260 (i.e. no TSC timestamps) or VM Time Correlati <<
1261 using 'perf inject' and requires unchanging V <<
1262 <<
1263 Other limitations and caveats <<
1264 <<
1265 VMX controls may suppress packets needed for <<
1266 VMX controls may block the perf NMI to the h <<
1267 Guest kernel self-modifying code (e.g. jump <<
1268 Guest thread information is unknown <<
1269 Guest VCPU is unknown but may be able to be <<
1270 Callchains are not supported <<
1271 <<
1272 Example using "timeless" decoding <<
1273 <<
1274 Start VM <<
1275 <<
1276 $ sudo virsh start kubuntu20.04 <<
1277 Domain kubuntu20.04 started <<
1278 <<
1279 Mount the guest file system. Note sshfs need <<
1280 <<
1281 $ mkdir vm0 <<
1282 $ sshfs -o direct_io root@vm0:/ vm0 <<
1283 <<
1284 Copy the guest /proc/kallsyms, /proc/modules <<
1285 <<
1286 $ perf buildid-cache -v --kcore vm0/proc/kco <<
1287 kcore added to build-id cache directory /hom <<
1288 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/ <<
1289 <<
1290 Find the VM process <<
1291 <<
1292 $ ps -eLl | grep 'KVM\|PID' <<
1293 F S UID PID PPID LWP C PRI NI <<
1294 3 S 64055 1430 1 1440 1 80 0 <<
1295 3 S 64055 1430 1 1441 1 80 0 <<
1296 3 S 64055 1430 1 1442 1 80 0 <<
1297 3 S 64055 1430 1 1443 2 80 0 <<
1298 <<
1299 Start an open-ended perf record, tracing the <<
1300 TSC is not supported and tsc=0 must be specif <<
1301 However, IPC can still be determined, hence c <<
1302 Only kernel decoding is supported, so 'k' mus <<
1303 Intel PT traces both the host and the guest s <<
1304 Without timestamps, --per-thread must be spec <<
1305 <<
1306 $ sudo perf kvm --guest --host --guestkallsy <<
1307 ^C <<
1308 [ perf record: Woken up 1 times to write dat <<
1309 [ perf record: Captured and wrote 5.829 MB ] <<
1310 <<
1311 perf script can be used to provide an instruc <<
1312 <<
1313 $ perf script --guestkallsyms $KALLSYMS --in <<
1314 CPU 0/KVM 1440 ffffffff82133cdd __vm <<
1315 CPU 0/KVM 1440 ffffffff82133ce1 __vm <<
1316 CPU 0/KVM 1440 ffffffff82133ce5 __vm <<
1317 CPU 0/KVM 1440 ffffffff82133ce9 __vm <<
1318 CPU 0/KVM 1440 ffffffff82133ced __vm <<
1319 CPU 0/KVM 1440 ffffffff82133cf1 __vm <<
1320 CPU 0/KVM 1440 ffffffff82133cf5 __vm <<
1321 CPU 0/KVM 1440 ffffffff82133cf9 __vm <<
1322 CPU 0/KVM 1440 ffffffff82133cfc __vm <<
1323 CPU 0/KVM 1440 ffffffff82133c40 vmx_ <<
1324 CPU 0/KVM 1440 ffffffff82133c42 vmx_ <<
1325 :1440 1440 ffffffffbb678b06 nati <<
1326 :1440 1440 ffffffffbb678b0b nati <<
1327 :1440 1440 ffffffffbb666646 lapi <<
1328 :1440 1440 ffffffffbb666648 lapi <<
1329 :1440 1440 ffffffffbb66664a lapi <<
1330 :1440 1440 ffffffffbb66664b lapi <<
1331 :1440 1440 ffffffffbb74607f cloc <<
1332 :1440 1440 ffffffffbb746081 cloc <<
1333 :1440 1440 ffffffffbb74603c cloc <<
1334 :1440 1440 ffffffffbb74603d cloc <<
1335 <<
1336 Example using VM Time Correlation <<
1337 <<
1338 Start VM <<
1339 <<
1340 $ sudo virsh start kubuntu20.04 <<
1341 Domain kubuntu20.04 started <<
1342 <<
1343 Mount the guest file system. Note sshfs need <<
1344 <<
1345 $ mkdir -p vm0 <<
1346 $ sshfs -o direct_io root@vm0:/ vm0 <<
1347 <<
1348 Copy the guest /proc/kallsyms, /proc/modules <<
1349 <<
1350 $ perf buildid-cache -v --kcore vm0/proc/kco <<
1351 same kcore found in /home/user/.debug/[kerne <<
1352 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\ <<
1353 <<
1354 Find the VM process <<
1355 <<
1356 $ ps -eLl | grep 'KVM\|PID' <<
1357 F S UID PID PPID LWP C PRI NI <<
1358 3 S 64055 16998 1 17005 13 80 0 <<
1359 3 S 64055 16998 1 17006 4 80 0 <<
1360 3 S 64055 16998 1 17007 3 80 0 <<
1361 3 S 64055 16998 1 17008 4 80 0 <<
1362 <<
1363 Start an open-ended perf record, tracing the <<
1364 IPC can be determined, hence cyc=1 can be add <<
1365 Only kernel decoding is supported, so 'k' mus <<
1366 Intel PT traces both the host and the guest s <<
1367 <<
1368 $ sudo perf kvm --guest --host --guestkallsy <<
1369 ^C[ perf record: Woken up 1 times to write d <<
1370 [ perf record: Captured and wrote 9.041 MB p <<
1371 <<
1372 Now 'perf inject' can be used to determine th <<
1373 only 7-bytes, so the TSC Offset might differ <<
1374 have no effect i.e. the resulting timestamps <<
1375 <<
1376 $ perf inject -i perf.data.kvm --vm-time-cor <<
1377 ERROR: Unknown TSC Offset for VMCS 0x1bff6a <<
1378 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c4 <<
1379 ERROR: Unknown TSC Offset for VMCS 0x1cbc08 <<
1380 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c4 <<
1381 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8 <<
1382 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c4 <<
1383 ERROR: Unknown TSC Offset for VMCS 0x1cbce9 <<
1384 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c4 <<
1385 <<
1386 Each virtual CPU has a different Virtual Mach <<
1387 shown above with the calculated TSC Offset. F <<
1388 they should all be the same for the same virt <<
1389 <<
1390 Now that the TSC Offset is known, it can be p <<
1391 <<
1392 $ perf inject -i perf.data.kvm --vm-time-cor <<
1393 <<
1394 Note the options for 'perf inject' --vm-time- <<
1395 <<
1396 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <V <<
1397 <<
1398 So it is possible to specify different TSC Of <<
1399 The option "dry-run" will cause the file to b <<
1400 Note it is also possible to get a intel_pt.lo <<
1401 <<
1402 There were no errors so, do it for real <<
1403 <<
1404 $ perf inject -i perf.data.kvm --vm-time-cor <<
1405 <<
1406 'perf script' can be used to see if there are <<
1407 <<
1408 $ perf script -i perf.data.kvm --guestkallsy <<
1409 <<
1410 There were none. <<
1411 <<
1412 'perf script' can be used to provide an instr <<
1413 <<
1414 $ perf script -i perf.data.kvm --guestkallsy <<
1415 CPU 1/KVM 17006 [001] 11500.262865593: <<
1416 CPU 1/KVM 17006 [001] 11500.262865593: <<
1417 CPU 1/KVM 17006 [001] 11500.262865593: <<
1418 CPU 1/KVM 17006 [001] 11500.262865593: <<
1419 CPU 1/KVM 17006 [001] 11500.262865593: <<
1420 CPU 1/KVM 17006 [001] 11500.262865593: <<
1421 CPU 1/KVM 17006 [001] 11500.262865593: <<
1422 CPU 1/KVM 17006 [001] 11500.262865593: <<
1423 CPU 1/KVM 17006 [001] 11500.262865593: <<
1424 CPU 1/KVM 17006 [001] 11500.262865593: <<
1425 CPU 1/KVM 17006 [001] 11500.262866075: <<
1426 :17006 17006 [001] 11500.262869216: <<
1427 :17006 17006 [001] 11500.262869216: <<
1428 :17006 17006 [001] 11500.262869216: <<
1429 :17006 17006 [001] 11500.262869216: <<
1430 :17006 17006 [001] 11500.262869216: <<
1431 :17006 17006 [001] 11500.262869216: <<
1432 :17006 17006 [001] 11500.262869216: <<
1433 :17006 17006 [001] 11500.262869216: <<
1434 :17006 17006 [001] 11500.262869216: <<
1435 :17006 17006 [001] 11500.262869216: <<
1436 <<
1437 <<
1438 Tracing Virtual Machines (including user spac <<
1439 --------------------------------------------- <<
1440 <<
1441 It is possible to use perf record to record s <<
1442 Sideband events from the guest perf.data file <<
1443 <<
1444 Here is an example of the steps needed: <<
1445 <<
1446 On the guest machine: <<
1447 <<
1448 Check that no-kvmclock kernel command line op <<
1449 <<
1450 Note, this is essential to enable time correl <<
1451 <<
1452 $ cat /proc/cmdline <<
1453 BOOT_IMAGE=/boot/vmlinuz-5.10.0-16-amd64 roo <<
1454 <<
1455 There is no BPF support at present so, if pos <<
1456 <<
1457 $ echo 0 | sudo tee /proc/sys/net/core/bpf_j <<
1458 0 <<
1459 <<
1460 Start perf record to collect sideband events: <<
1461 <<
1462 $ sudo perf record -o guest-sideband-testing <<
1463 <<
1464 On the host machine: <<
1465 <<
1466 Start perf record to collect Intel PT trace: <<
1467 <<
1468 Note, the host trace will get very big, very <<
1469 <<
1470 $ sudo perf record -o guest-sideband-testing <<
1471 <<
1472 On the guest machine: <<
1473 <<
1474 Run a small test case, just 'uname' in this e <<
1475 <<
1476 $ uname <<
1477 Linux <<
1478 <<
1479 On the host machine: <<
1480 <<
1481 Stop the Intel PT trace: <<
1482 <<
1483 ^C <<
1484 [ perf record: Woken up 1 times to write dat <<
1485 [ perf record: Captured and wrote 76.122 MB <<
1486 <<
1487 On the guest machine: <<
1488 <<
1489 Stop the Intel PT trace: <<
1490 <<
1491 ^C <<
1492 [ perf record: Woken up 1 times to write dat <<
1493 [ perf record: Captured and wrote 1.247 MB g <<
1494 <<
1495 And then copy guest-sideband-testing-guest-pe <<
1496 <<
1497 On the host machine: <<
1498 <<
1499 With the 2 perf.data recordings, and with the <<
1500 <<
1501 Identify the TSC Offset: <<
1502 <<
1503 $ perf inject -i guest-sideband-testing-host <<
1504 VMCS: 0x103fc6 TSC Offset 0xfffffa6ae070cb2 <<
1505 VMCS: 0x103ff2 TSC Offset 0xfffffa6ae070cb2 <<
1506 VMCS: 0x10fdaa TSC Offset 0xfffffa6ae070cb2 <<
1507 VMCS: 0x24d57c TSC Offset 0xfffffa6ae070cb2 <<
1508 <<
1509 Correct Intel PT TSC timestamps for the guest <<
1510 <<
1511 $ perf inject -i guest-sideband-testing-host <<
1512 <<
1513 Identify the guest machine PID: <<
1514 <<
1515 $ perf script -i guest-sideband-testing-host <<
1516 CPU 0/KVM 0 [000] 0.000000: PE <<
1517 CPU 1/KVM 0 [000] 0.000000: PE <<
1518 CPU 2/KVM 0 [000] 0.000000: PE <<
1519 CPU 3/KVM 0 [000] 0.000000: PE <<
1520 <<
1521 Note, the QEMU option -name debug-threads=on <<
1522 can be used to determine which thread is runn <<
1523 <<
1524 Create a guestmount, assuming the guest machi <<
1525 <<
1526 $ mkdir -p ~/guestmount/13376 <<
1527 $ sshfs -o direct_io vm_to_test:/ ~/guestmou <<
1528 <<
1529 Inject the guest perf.data file into the host <<
1530 <<
1531 Note, due to the guestmount option, guest obj <<
1532 If needed, VDSO can be copied manually in a f <<
1533 <<
1534 $ perf inject -i guest-sideband-testing-host <<
1535 <<
1536 Show an excerpt from the result. In this cas <<
1537 <<
1538 Notes: <<
1539 <<
1540 - the CPU displayed, [002] in this ca <<
1541 - events happening in the virtual mac <<
1542 - only calls and errors are displayed <<
1543 - branches entering and exiting the v <<
1544 <<
1545 $ perf script -i inj --itrace=ce -F+machine_ <<
1546 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1547 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1548 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1549 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1550 VM:13376 VCPU:003 uname 3404/340 <<
1551 VM:13376 VCPU:003 uname 3404/340 <<
1552 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1553 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1554 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1555 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1556 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1557 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1558 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1559 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1560 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1561 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1562 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1563 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1564 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1565 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1566 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1567 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1568 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1569 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1570 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1571 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1572 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1573 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1574 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1575 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1576 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1577 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1578 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1579 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1580 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1581 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1582 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1583 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1584 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1585 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1586 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1587 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1588 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1589 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1590 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1591 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1592 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1593 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1594 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1595 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1596 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1597 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1598 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1599 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1600 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1601 VM:13376 VCPU:003 uname 3404/340 <<
1602 VM:13376 VCPU:003 uname 3404/340 <<
1603 VM:13376 VCPU:003 uname 3404/340 <<
1604 VM:13376 VCPU:003 uname 3404/340 <<
1605 VM:13376 VCPU:003 uname 3404/340 <<
1606 VM:13376 VCPU:003 uname 3404/340 <<
1607 VM:13376 VCPU:003 uname 3404/340 <<
1608 VM:13376 VCPU:003 uname 3404/340 <<
1609 <<
1610 <<
1611 Tracing Virtual Machines - Guest Code <<
1612 ------------------------------------- <<
1613 <<
1614 A common case for KVM test programs is that t <<
1615 hypervisor, creating, running and destroying <<
1616 providing the guest object code from its own <<
1617 the VM is not running an OS, but only the fun <<
1618 hypervisor test program, and conveniently, lo <<
1619 addresses. To support that, option "--guest-c <<
1620 and perf kvm report. <<
1621 <<
1622 Here is an example tracing a test program fro <<
1623 <<
1624 # perf record --kcore -e intel_pt/cyc/ -- to <<
1625 [ perf record: Woken up 1 times to write dat <<
1626 [ perf record: Captured and wrote 0.280 MB p <<
1627 # perf script --guest-code --itrace=bep --ns <<
1628 [SNIP] <<
1629 tsc_msrs_test 18436 [007] 10897.962087733: <<
1630 tsc_msrs_test 18436 [007] 10897.962087733: <<
1631 tsc_msrs_test 18436 [007] 10897.962087733: <<
1632 tsc_msrs_test 18436 [007] 10897.962087836: <<
1633 [guest/18436] 18436 [007] 10897.962087836: <<
1634 [guest/18436] 18436 [007] 10897.962087836: <<
1635 [guest/18436] 18436 [007] 10897.962088248: <<
1636 tsc_msrs_test 18436 [007] 10897.962088248: <<
1637 tsc_msrs_test 18436 [007] 10897.962088248: <<
1638 tsc_msrs_test 18436 [007] 10897.962088256: <<
1639 tsc_msrs_test 18436 [007] 10897.962088270: <<
1640 [SNIP] <<
1641 tsc_msrs_test 18436 [007] 10897.962089321: <<
1642 tsc_msrs_test 18436 [007] 10897.962089321: <<
1643 tsc_msrs_test 18436 [007] 10897.962089321: <<
1644 tsc_msrs_test 18436 [007] 10897.962089424: <<
1645 [guest/18436] 18436 [007] 10897.962089424: <<
1646 [guest/18436] 18436 [007] 10897.962089701: <<
1647 [guest/18436] 18436 [007] 10897.962089701: <<
1648 [guest/18436] 18436 [007] 10897.962089701: <<
1649 [guest/18436] 18436 [007] 10897.962089701: <<
1650 [guest/18436] 18436 [007] 10897.962089878: <<
1651 tsc_msrs_test 18436 [007] 10897.962089878: <<
1652 tsc_msrs_test 18436 [007] 10897.962089878: <<
1653 tsc_msrs_test 18436 [007] 10897.962089887: <<
1654 tsc_msrs_test 18436 [007] 10897.962089901: <<
1655 [SNIP] <<
1656 <<
1657 # perf kvm --guest-code --guest --host repor <<
1658 <<
1659 # To display the perf.data header info, plea <<
1660 # <<
1661 # <<
1662 # Total Lost Samples: 0 <<
1663 # <<
1664 # Samples: 12 of event 'instructions' <<
1665 # Event count (approx.): 2274583 <<
1666 # <<
1667 # Children Self Command Shared <<
1668 # ........ ........ ............. ....... <<
1669 # <<
1670 54.70% 0.00% tsc_msrs_test [kernel. <<
1671 | <<
1672 ---entry_SYSCALL_64_after_hwframe <<
1673 do_syscall_64 <<
1674 | <<
1675 |--29.44%--syscall_exit_to_use <<
1676 | exit_to_user_mode_p <<
1677 | task_work_run <<
1678 | __fput <<
1679 <<
1680 <<
1681 Event Trace <<
1682 ----------- <<
1683 <<
1684 Event Trace records information about asynchr <<
1685 faults, VM exits and entries. The informatio <<
1686 and also the Interrupt Flag is recorded on th <<
1687 contains a type field to identify one of the <<
1688 <<
1689 1 INTR interrupt, fa <<
1690 2 IRET interrupt ret <<
1691 3 SMI system manage <<
1692 4 RSM resume from s <<
1693 5 SIPI startup inter <<
1694 6 INIT INIT signal <<
1695 7 VMENTRY VM-Entry <<
1696 8 VMEXIT VM-Entry <<
1697 9 VMEXIT_INTR VM-Exit due t <<
1698 10 SHUTDOWN Shutdown <<
1699 <<
1700 For more details, refer to the Intel 64 and I <<
1701 Developer Manuals (version 076 or later). <<
1702 <<
1703 The capability to do Event Trace is indicated <<
1704 /sys/bus/event_source/devices/intel_pt/caps/e <<
1705 <<
1706 Event trace is selected for recording using t <<
1707 <<
1708 perf record -e intel_pt/event/u uname <<
1709 <<
1710 Event trace events are output using the --itr <<
1711 <<
1712 perf script --itrace=Ie <<
1713 <<
1714 perf script displays events containing CFE ty <<
1715 in the form: <<
1716 <<
1717 evt: hw int (t) cfe: <<
1718 <<
1719 The IP flag indicates if the event binds to a <<
1720 flow control packet generation is enabled, as <<
1721 set. <<
1722 <<
1723 perf script displays events containing change <<
1724 <<
1725 iflag: t IFLAG <<
1726 <<
1727 where "via branch" indicates a branch (interr <<
1728 "non branch" indicates an instruction such as <<
1729 <<
1730 In addition, the current state of the interru <<
1731 or absence of the "D" (interrupt disabled) pe <<
1732 flag is changed, then the "t" flag is also in <<
1733 <<
1734 no flag, interrupts enabled I <<
1735 t interrupts become disabled IF <<
1736 D interrupts are disabled IF=0 <<
1737 Dt interrupts become enabled IF <<
1738 <<
1739 The intel-pt-events.py script illustrates how <<
1740 using a Python script. <<
1741 <<
1742 <<
1743 TNT Disable <<
1744 ----------- <<
1745 <<
1746 TNT packets are disabled using the "notnt" co <<
1747 <<
1748 perf record -e intel_pt/notnt/u uname <<
1749 <<
1750 In that case the --itrace q option is forced <<
1751 to reconstruct the control flow is not possib <<
1752 <<
1753 <<
1754 Emulated PTWRITE <<
1755 ---------------- <<
1756 <<
1757 Later perf tools support a method to emulate <<
1758 can be useful if hardware does not support th <<
1759 <<
1760 Instead of using the ptwrite instruction, a f <<
1761 a trace that encodes the payload data into TN <<
1762 of the function: <<
1763 <<
1764 #include <stdint.h> <<
1765 <<
1766 void perf_emulate_ptwrite(uint64_t x) <<
1767 __attribute__((externally_visible, noipa, no <<
1768 <<
1769 #define PERF_EMULATE_PTWRITE_8_BITS \ <<
1770 "1: shl %rax\n" \ <<
1771 " jc 1f\n" \ <<
1772 "1: shl %rax\n" \ <<
1773 " jc 1f\n" \ <<
1774 "1: shl %rax\n" \ <<
1775 " jc 1f\n" \ <<
1776 "1: shl %rax\n" \ <<
1777 " jc 1f\n" \ <<
1778 "1: shl %rax\n" \ <<
1779 " jc 1f\n" \ <<
1780 "1: shl %rax\n" \ <<
1781 " jc 1f\n" \ <<
1782 "1: shl %rax\n" \ <<
1783 " jc 1f\n" \ <<
1784 "1: shl %rax\n" \ <<
1785 " jc 1f\n" <<
1786 <<
1787 /* Undefined instruction */ <<
1788 #define PERF_EMULATE_PTWRITE_UD2 ".by <<
1789 <<
1790 #define PERF_EMULATE_PTWRITE_MAGIC PE <<
1791 <<
1792 void perf_emulate_ptwrite(uint64_t x __attri <<
1793 { <<
1794 /* Assumes SysV ABI : x passed in r <<
1795 __asm__ volatile ( <<
1796 "jmp 1f\n" <<
1797 PERF_EMULATE_PTWRITE_MAGIC <<
1798 "1: mov %rdi, %rax\n" <<
1799 PERF_EMULATE_PTWRITE_8_BITS <<
1800 PERF_EMULATE_PTWRITE_8_BITS <<
1801 PERF_EMULATE_PTWRITE_8_BITS <<
1802 PERF_EMULATE_PTWRITE_8_BITS <<
1803 PERF_EMULATE_PTWRITE_8_BITS <<
1804 PERF_EMULATE_PTWRITE_8_BITS <<
1805 PERF_EMULATE_PTWRITE_8_BITS <<
1806 PERF_EMULATE_PTWRITE_8_BITS <<
1807 "1: ret\n" <<
1808 ); <<
1809 } <<
1810 <<
1811 For example, a test program with the function <<
1812 <<
1813 #include <stdio.h> <<
1814 #include <stdint.h> <<
1815 #include <stdlib.h> <<
1816 <<
1817 #include "perf_emulate_ptwrite.h" <<
1818 <<
1819 int main(int argc, char *argv[]) <<
1820 { <<
1821 uint64_t x = 0; <<
1822 <<
1823 if (argc > 1) <<
1824 x = strtoull(argv[1], NULL, <<
1825 perf_emulate_ptwrite(x); <<
1826 return 0; <<
1827 } <<
1828 <<
1829 Can be compiled and traced: <<
1830 <<
1831 $ gcc -Wall -Wextra -O3 -g -o eg_ptw eg_ptw. <<
1832 $ perf record -e intel_pt//u ./eg_ptw 0x1234 <<
1833 [ perf record: Woken up 1 times to write dat <<
1834 [ perf record: Captured and wrote 0.017 MB p <<
1835 $ perf script --itrace=ew <<
1836 eg_ptw 19875 [007] 8061.235912: <<
1837 $ <<
1838 <<
1839 <<
1840 Pipe mode <<
1841 --------- <<
1842 Pipe mode is a problem for Intel PT and possi <<
1843 It's not recommended to use a pipe as data ou <<
1844 of the following reason. <<
1845 <<
1846 Essentially the auxtrace buffers do not behav <<
1847 event buffers. That is because the head and <<
1848 software, but in the auxtrace case the data i <<
1849 So the head and tail do not get updated as da <<
1850 <<
1851 In the Intel PT case, the head and tail are u <<
1852 is disabled by software, for example: <<
1853 - full-trace, system wide : when buffer p <<
1854 - full-trace, not system-wide : when buff <<
1855 context s <<
1856 - snapshot mode : as above but also when <<
1857 - sample mode : as above but also when a <<
1858 <<
1859 That means finished-round ordering doesn't wo <<
1860 can turn up that has data that extends back i <<
1861 very beginning of tracing. <<
1862 <<
1863 For a perf.data file, that problem is solved <<
1864 and queuing up the auxtrace buffers in advanc <<
1865 <<
1866 For pipe mode, the order of events and timest <<
1867 be messed up. <<
1868 <<
1869 <<
1870 EXAMPLE <<
1871 ------- <<
1872 <<
1873 Examples can be found on perf wiki page "Perf <<
1874 <<
1875 https://perf.wiki.kernel.org/index.php/Perf_t <<
1876 <<
1877 1143
1878 SEE ALSO 1144 SEE ALSO
1879 -------- 1145 --------
1880 1146
1881 linkperf:perf-record[1], linkperf:perf-script 1147 linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1],
1882 linkperf:perf-inject[1] 1148 linkperf:perf-inject[1]
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