1 perf-intel-pt(1) 1 perf-intel-pt(1)
2 ================ 2 ================
3 3
4 NAME 4 NAME
5 ---- 5 ----
6 perf-intel-pt - Support for Intel Processor Tr 6 perf-intel-pt - Support for Intel Processor Trace within perf tools
7 7
8 SYNOPSIS 8 SYNOPSIS
9 -------- 9 --------
10 [verse] 10 [verse]
11 'perf record' -e intel_pt// 11 'perf record' -e intel_pt//
12 12
13 DESCRIPTION 13 DESCRIPTION
14 ----------- 14 -----------
15 15
16 Intel Processor Trace (Intel PT) is an extensi 16 Intel Processor Trace (Intel PT) is an extension of Intel Architecture that
17 collects information about software execution 17 collects information about software execution such as control flow, execution
18 modes and timings and formats it into highly c 18 modes and timings and formats it into highly compressed binary packets.
19 Technical details are documented in the Intel 19 Technical details are documented in the Intel 64 and IA-32 Architectures
20 Software Developer Manuals, Chapter 36 Intel P 20 Software Developer Manuals, Chapter 36 Intel Processor Trace.
21 21
22 Intel PT is first supported in Intel Core M an 22 Intel PT is first supported in Intel Core M and 5th generation Intel Core
23 processors that are based on the Intel micro-a 23 processors that are based on the Intel micro-architecture code name Broadwell.
24 24
25 Trace data is collected by 'perf record' and s 25 Trace data is collected by 'perf record' and stored within the perf.data file.
26 See below for options to 'perf record'. 26 See below for options to 'perf record'.
27 27
28 Trace data must be 'decoded' which involves wa 28 Trace data must be 'decoded' which involves walking the object code and matching
29 the trace data packets. For example a TNT pack 29 the trace data packets. For example a TNT packet only tells whether a
30 conditional branch was taken or not taken, so 30 conditional branch was taken or not taken, so to make use of that packet the
31 decoder must know precisely which instruction 31 decoder must know precisely which instruction was being executed.
32 32
33 Decoding is done on-the-fly. The decoder outp 33 Decoding is done on-the-fly. The decoder outputs samples in the same format as
34 samples output by perf hardware events, for ex 34 samples output by perf hardware events, for example as though the "instructions"
35 or "branches" events had been recorded. Prese 35 or "branches" events had been recorded. Presently 3 tools support this:
36 'perf script', 'perf report' and 'perf inject' 36 'perf script', 'perf report' and 'perf inject'. See below for more information
37 on using those tools. 37 on using those tools.
38 38
39 The main distinguishing feature of Intel PT is 39 The main distinguishing feature of Intel PT is that the decoder can determine
40 the exact flow of software execution. Intel P 40 the exact flow of software execution. Intel PT can be used to understand why
41 and how did software get to a certain point, o 41 and how did software get to a certain point, or behave a certain way. The
42 software does not have to be recompiled, so In 42 software does not have to be recompiled, so Intel PT works with debug or release
43 builds, however the executed images are needed 43 builds, however the executed images are needed - which makes use in JIT-compiled
44 environments, or with self-modified code, a ch 44 environments, or with self-modified code, a challenge. Also symbols need to be
45 provided to make sense of addresses. 45 provided to make sense of addresses.
46 46
47 A limitation of Intel PT is that it produces h 47 A limitation of Intel PT is that it produces huge amounts of trace data
48 (hundreds of megabytes per second per core) wh 48 (hundreds of megabytes per second per core) which takes a long time to decode,
49 for example two or three orders of magnitude l 49 for example two or three orders of magnitude longer than it took to collect.
50 Another limitation is the performance impact o 50 Another limitation is the performance impact of tracing, something that will
51 vary depending on the use-case and architectur 51 vary depending on the use-case and architecture.
52 52
53 53
54 Quickstart 54 Quickstart
55 ---------- 55 ----------
56 56
57 It is important to start small. That is becau 57 It is important to start small. That is because it is easy to capture vastly
58 more data than can possibly be processed. 58 more data than can possibly be processed.
59 59
60 The simplest thing to do with Intel PT is user 60 The simplest thing to do with Intel PT is userspace profiling of small programs.
61 Data is captured with 'perf record' e.g. to tr 61 Data is captured with 'perf record' e.g. to trace 'ls' userspace-only:
62 62
63 perf record -e intel_pt//u ls 63 perf record -e intel_pt//u ls
64 64
65 And profiled with 'perf report' e.g. 65 And profiled with 'perf report' e.g.
66 66
67 perf report 67 perf report
68 68
69 To also trace kernel space presents a problem, 69 To also trace kernel space presents a problem, namely kernel self-modifying
70 code. A fairly good kernel image is available 70 code. A fairly good kernel image is available in /proc/kcore but to get an
71 accurate image a copy of /proc/kcore needs to 71 accurate image a copy of /proc/kcore needs to be made under the same conditions
72 as the data capture. 'perf record' can make a 72 as the data capture. 'perf record' can make a copy of /proc/kcore if the option
73 --kcore is used, but access to /proc/kcore is 73 --kcore is used, but access to /proc/kcore is restricted e.g.
74 74
75 sudo perf record -o pt_ls --kcore -e i 75 sudo perf record -o pt_ls --kcore -e intel_pt// -- ls
76 76
77 which will create a directory named 'pt_ls' an 77 which will create a directory named 'pt_ls' and put the perf.data file (named
78 simply 'data') and copies of /proc/kcore, /pro 78 simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into
79 it. The other tools understand the directory 79 it. The other tools understand the directory format, so to use 'perf report'
80 becomes: 80 becomes:
81 81
82 sudo perf report -i pt_ls 82 sudo perf report -i pt_ls
83 83
84 Because samples are synthesized after-the-fact 84 Because samples are synthesized after-the-fact, the sampling period can be
85 selected for reporting. e.g. sample every micr 85 selected for reporting. e.g. sample every microsecond
86 86
87 sudo perf report pt_ls --itrace=i1usge 87 sudo perf report pt_ls --itrace=i1usge
88 88
89 See the sections below for more information ab 89 See the sections below for more information about the --itrace option.
90 90
91 Beware the smaller the period, the more sample 91 Beware the smaller the period, the more samples that are produced, and the
92 longer it takes to process them. 92 longer it takes to process them.
93 93
94 Also note that the coarseness of Intel PT timi 94 Also note that the coarseness of Intel PT timing information will start to
95 distort the statistical value of the sampling 95 distort the statistical value of the sampling as the sampling period becomes
96 smaller. 96 smaller.
97 97
98 To represent software control flow, "branches" 98 To represent software control flow, "branches" samples are produced. By default
99 a branch sample is synthesized for every singl 99 a branch sample is synthesized for every single branch. To get an idea what
100 data is available you can use the 'perf script 100 data is available you can use the 'perf script' tool with all itrace sampling
101 options, which will list all the samples. 101 options, which will list all the samples.
102 102
103 perf record -e intel_pt//u ls 103 perf record -e intel_pt//u ls
104 perf script --itrace=iybxwpe !! 104 perf script --itrace=ibxwpe
105 105
106 An interesting field that is not printed by de 106 An interesting field that is not printed by default is 'flags' which can be
107 displayed as follows: 107 displayed as follows:
108 108
109 perf script --itrace=iybxwpe -F+flags !! 109 perf script --itrace=ibxwpe -F+flags
110 110
111 The flags are "bcrosyiABExghDt" which stand fo !! 111 The flags are "bcrosyiABExgh" which stand for branch, call, return, conditional,
112 system, asynchronous, interrupt, transaction a 112 system, asynchronous, interrupt, transaction abort, trace begin, trace end,
113 in transaction, VM-entry, VM-exit, interrupt d !! 113 in transaction, VM-entry, and VM-exit respectively.
114 toggle respectively. <<
115 114
116 perf script also supports higher level ways to 115 perf script also supports higher level ways to dump instruction traces:
117 116
118 perf script --insn-trace=disasm <<
119 <<
120 or to use the xed disassembler, which requires <<
121 (see XED below): <<
122 <<
123 perf script --insn-trace --xed 117 perf script --insn-trace --xed
124 118
>> 119 Dump all instructions. This requires installing the xed tool (see XED below)
125 Dumping all instructions in a long trace can b 120 Dumping all instructions in a long trace can be fairly slow. It is usually better
126 to start with higher level decoding, like 121 to start with higher level decoding, like
127 122
128 perf script --call-trace 123 perf script --call-trace
129 124
130 or 125 or
131 126
132 perf script --call-ret-trace 127 perf script --call-ret-trace
133 128
134 and then select a time range of interest. The 129 and then select a time range of interest. The time range can then be examined
135 in detail with 130 in detail with
136 131
137 perf script --time starttime,stoptime !! 132 perf script --time starttime,stoptime --insn-trace --xed
138 133
139 While examining the trace it's also useful to 134 While examining the trace it's also useful to filter on specific CPUs using
140 the -C option 135 the -C option
141 136
142 perf script --time starttime,stoptime !! 137 perf script --time starttime,stoptime --insn-trace --xed -C 1
143 138
144 Dump all instructions in time range on CPU 1. 139 Dump all instructions in time range on CPU 1.
145 140
146 Another interesting field that is not printed 141 Another interesting field that is not printed by default is 'ipc' which can be
147 displayed as follows: 142 displayed as follows:
148 143
149 perf script --itrace=be -F+ipc 144 perf script --itrace=be -F+ipc
150 145
151 There are two ways that instructions-per-cycle 146 There are two ways that instructions-per-cycle (IPC) can be calculated depending
152 on the recording. 147 on the recording.
153 148
154 If the 'cyc' config term (see config terms sec !! 149 If the 'cyc' config term (see config terms section below) was used, then IPC is
155 and cycle events are calculated using the cycl !! 150 calculated using the cycle count from CYC packets, otherwise MTC packets are
156 MTC packets are used - refer to the 'mtc' conf !! 151 used - refer to the 'mtc' config term. When MTC is used, however, the values
157 the values are less accurate because the timin !! 152 are less accurate because the timing is less accurate.
158 153
159 Because Intel PT does not update the cycle cou 154 Because Intel PT does not update the cycle count on every branch or instruction,
160 the values will often be zero. When there are 155 the values will often be zero. When there are values, they will be the number
161 of instructions and number of cycles since the 156 of instructions and number of cycles since the last update, and thus represent
162 the average IPC cycle count since the last IPC !! 157 the average IPC since the last IPC for that event type. Note IPC for "branches"
163 Note IPC for "branches" events is calculated s !! 158 events is calculated separately from IPC for "instructions" events.
164 events. <<
165 159
166 Even with the 'cyc' config term, it is possibl 160 Even with the 'cyc' config term, it is possible to produce IPC information for
167 every change of timestamp, but at the expense 161 every change of timestamp, but at the expense of accuracy. That is selected by
168 specifying the itrace 'A' option. Due to the 162 specifying the itrace 'A' option. Due to the granularity of timestamps, the
169 actual number of cycles increases even though 163 actual number of cycles increases even though the cycles reported does not.
170 The number of instructions is known, but if IP 164 The number of instructions is known, but if IPC is reported, cycles can be too
171 low and so IPC is too high. Note that inaccur 165 low and so IPC is too high. Note that inaccuracy decreases as the period of
172 sampling increases i.e. if the number of cycle 166 sampling increases i.e. if the number of cycles is too low by a small amount,
173 that becomes less significant if the number of 167 that becomes less significant if the number of cycles is large. It may also be
174 useful to use the 'A' option in conjunction wi 168 useful to use the 'A' option in conjunction with dlfilter-show-cycles.so to
175 provide higher granularity cycle information. 169 provide higher granularity cycle information.
176 170
177 Also note that the IPC instruction count may o 171 Also note that the IPC instruction count may or may not include the current
178 instruction. If the cycle count is associated 172 instruction. If the cycle count is associated with an asynchronous branch
179 (e.g. page fault or interrupt), then the instr 173 (e.g. page fault or interrupt), then the instruction count does not include the
180 current instruction, otherwise it does. That 174 current instruction, otherwise it does. That is consistent with whether or not
181 that instruction has retired when the cycle co 175 that instruction has retired when the cycle count is updated.
182 176
183 Another note, in the case of "branches" events 177 Another note, in the case of "branches" events, non-taken branches are not
184 presently sampled, so IPC values for them do n 178 presently sampled, so IPC values for them do not appear e.g. a CYC packet with a
185 TNT packet that starts with a non-taken branch 179 TNT packet that starts with a non-taken branch. To see every possible IPC
186 value, "instructions" events can be used e.g. 180 value, "instructions" events can be used e.g. --itrace=i0ns
187 181
188 While it is possible to create scripts to anal 182 While it is possible to create scripts to analyze the data, an alternative
189 approach is available to export the data to a 183 approach is available to export the data to a sqlite or postgresql database.
190 Refer to script export-to-sqlite.py or export- 184 Refer to script export-to-sqlite.py or export-to-postgresql.py for more details,
191 and to script exported-sql-viewer.py for an ex 185 and to script exported-sql-viewer.py for an example of using the database.
192 186
193 There is also script intel-pt-events.py which 187 There is also script intel-pt-events.py which provides an example of how to
194 unpack the raw data for power events and PTWRI 188 unpack the raw data for power events and PTWRITE. The script also displays
195 branches, and supports 2 additional modes sele 189 branches, and supports 2 additional modes selected by option:
196 190
197 - --insn-trace - instruction trace !! 191 --insn-trace - instruction trace
198 - --src-trace - source trace !! 192 --src-trace - source trace
199 <<
200 The intel-pt-events.py script also has options <<
201 <<
202 - --all-switch-events - display all switch ev <<
203 - --interleave [<n>] - interleave sample outp <<
204 no more than n samples for a CPU are displaye <<
205 Note this only affects the order of output, a <<
206 same. <<
207 193
208 As mentioned above, it is easy to capture too 194 As mentioned above, it is easy to capture too much data. One way to limit the
209 data captured is to use 'snapshot' mode which 195 data captured is to use 'snapshot' mode which is explained further below.
210 Refer to 'new snapshot option' and 'Intel PT m 196 Refer to 'new snapshot option' and 'Intel PT modes of operation' further below.
211 197
212 Another problem that will be experienced is de 198 Another problem that will be experienced is decoder errors. They can be caused
213 by inability to access the executed image, sel 199 by inability to access the executed image, self-modified or JIT-ed code, or the
214 inability to match side-band information (such 200 inability to match side-band information (such as context switches and mmaps)
215 which results in the decoder not knowing what 201 which results in the decoder not knowing what code was executed.
216 202
217 There is also the problem of perf not being ab 203 There is also the problem of perf not being able to copy the data fast enough,
218 resulting in data lost because the buffer was 204 resulting in data lost because the buffer was full. See 'Buffer handling' below
219 for more details. 205 for more details.
220 206
221 207
222 perf record 208 perf record
223 ----------- 209 -----------
224 210
225 new event 211 new event
226 ~~~~~~~~~ 212 ~~~~~~~~~
227 213
228 The Intel PT kernel driver creates a new PMU f 214 The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are
229 selected by providing the PMU name followed by 215 selected by providing the PMU name followed by the "config" separated by slashes.
230 An enhancement has been made to allow default 216 An enhancement has been made to allow default "config" e.g. the option
231 217
232 -e intel_pt// 218 -e intel_pt//
233 219
234 will use a default config value. Currently th 220 will use a default config value. Currently that is the same as
235 221
236 -e intel_pt/tsc,noretcomp=0/ 222 -e intel_pt/tsc,noretcomp=0/
237 223
238 which is the same as 224 which is the same as
239 225
240 -e intel_pt/tsc=1,noretcomp=0/ 226 -e intel_pt/tsc=1,noretcomp=0/
241 227
242 Note there are now new config terms - see sect 228 Note there are now new config terms - see section 'config terms' further below.
243 229
244 The config terms are listed in /sys/devices/in 230 The config terms are listed in /sys/devices/intel_pt/format. They are bit
245 fields within the config member of the struct 231 fields within the config member of the struct perf_event_attr which is
246 passed to the kernel by the perf_event_open sy 232 passed to the kernel by the perf_event_open system call. They correspond to bit
247 fields in the IA32_RTIT_CTL MSR. Here is a li 233 fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions:
248 234
249 $ grep -H . /sys/bus/event_source/devi 235 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
250 /sys/bus/event_source/devices/intel_pt 236 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1
251 /sys/bus/event_source/devices/intel_pt 237 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
252 /sys/bus/event_source/devices/intel_pt 238 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9
253 /sys/bus/event_source/devices/intel_pt 239 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
254 /sys/bus/event_source/devices/intel_pt 240 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
255 /sys/bus/event_source/devices/intel_pt 241 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
256 /sys/bus/event_source/devices/intel_pt 242 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10
257 243
258 Note that the default config must be overridde 244 Note that the default config must be overridden for each term i.e.
259 245
260 -e intel_pt/noretcomp=0/ 246 -e intel_pt/noretcomp=0/
261 247
262 is the same as: 248 is the same as:
263 249
264 -e intel_pt/tsc=1,noretcomp=0/ 250 -e intel_pt/tsc=1,noretcomp=0/
265 251
266 So, to disable TSC packets use: 252 So, to disable TSC packets use:
267 253
268 -e intel_pt/tsc=0/ 254 -e intel_pt/tsc=0/
269 255
270 It is also possible to specify the config valu 256 It is also possible to specify the config value explicitly:
271 257
272 -e intel_pt/config=0x400/ 258 -e intel_pt/config=0x400/
273 259
274 Note that, as with all events, the event is su 260 Note that, as with all events, the event is suffixed with event modifiers:
275 261
276 u userspace 262 u userspace
277 k kernel 263 k kernel
278 h hypervisor 264 h hypervisor
279 G guest 265 G guest
280 H host 266 H host
281 p precise ip 267 p precise ip
282 268
283 'h', 'G' and 'H' are for virtualization which !! 269 'h', 'G' and 'H' are for virtualization which is not supported by Intel PT.
284 'p' is also not relevant to Intel PT. So only 270 'p' is also not relevant to Intel PT. So only options 'u' and 'k' are
285 meaningful for Intel PT. 271 meaningful for Intel PT.
286 272
287 perf_event_attr is displayed if the -vv option 273 perf_event_attr is displayed if the -vv option is used e.g.
288 274
289 -------------------------------------- 275 ------------------------------------------------------------
290 perf_event_attr: 276 perf_event_attr:
291 type 6 277 type 6
292 size 112 278 size 112
293 config 0x400 279 config 0x400
294 { sample_period, sample_freq } 1 280 { sample_period, sample_freq } 1
295 sample_type IP|TI 281 sample_type IP|TID|TIME|CPU|IDENTIFIER
296 read_format ID 282 read_format ID
297 disabled 1 283 disabled 1
298 inherit 1 284 inherit 1
299 exclude_kernel 1 285 exclude_kernel 1
300 exclude_hv 1 286 exclude_hv 1
301 enable_on_exec 1 287 enable_on_exec 1
302 sample_id_all 1 288 sample_id_all 1
303 -------------------------------------- 289 ------------------------------------------------------------
304 sys_perf_event_open: pid 31104 cpu 0 290 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
305 sys_perf_event_open: pid 31104 cpu 1 291 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
306 sys_perf_event_open: pid 31104 cpu 2 292 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
307 sys_perf_event_open: pid 31104 cpu 3 293 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
308 -------------------------------------- 294 ------------------------------------------------------------
309 295
310 296
311 config terms 297 config terms
312 ~~~~~~~~~~~~ 298 ~~~~~~~~~~~~
313 299
314 The June 2015 version of Intel 64 and IA-32 Ar 300 The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
315 Manuals, Chapter 36 Intel Processor Trace, def 301 Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
316 Some of the features are reflect in new config 302 Some of the features are reflect in new config terms. All the config terms are
317 described below. 303 described below.
318 304
319 tsc Always supported. Produces TS 305 tsc Always supported. Produces TSC timestamp packets to provide
320 timing information. In some c 306 timing information. In some cases it is possible to decode
321 without timing information, fo 307 without timing information, for example a per-thread context
322 that does not overlap executab 308 that does not overlap executable memory maps.
323 309
324 The default config selects tsc 310 The default config selects tsc (i.e. tsc=1).
325 311
326 noretcomp Always supported. Disables "r 312 noretcomp Always supported. Disables "return compression" so a TIP packet
327 is produced when a function re 313 is produced when a function returns. Causes more packets to be
328 produced but might make decodi 314 produced but might make decoding more reliable.
329 315
330 The default config does not se 316 The default config does not select noretcomp (i.e. noretcomp=0).
331 317
332 psb_period Allows the frequency of PSB pa 318 psb_period Allows the frequency of PSB packets to be specified.
333 319
334 The PSB packet is a synchroniz 320 The PSB packet is a synchronization packet that provides a
335 starting point for decoding or 321 starting point for decoding or recovery from errors.
336 322
337 Support for psb_period is indi 323 Support for psb_period is indicated by:
338 324
339 /sys/bus/event_source/ 325 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
340 326
341 which contains "1" if the feat 327 which contains "1" if the feature is supported and "0"
342 otherwise. 328 otherwise.
343 329
344 Valid values are given by: 330 Valid values are given by:
345 331
346 /sys/bus/event_source/ 332 /sys/bus/event_source/devices/intel_pt/caps/psb_periods
347 333
348 which contains a hexadecimal v 334 which contains a hexadecimal value, the bits of which represent
349 valid values e.g. bit 2 set me 335 valid values e.g. bit 2 set means value 2 is valid.
350 336
351 The psb_period value is conver 337 The psb_period value is converted to the approximate number of
352 trace bytes between PSB packet 338 trace bytes between PSB packets as:
353 339
354 2 ^ (value + 11) 340 2 ^ (value + 11)
355 341
356 e.g. value 3 means 16KiB bytes 342 e.g. value 3 means 16KiB bytes between PSBs
357 343
358 If an invalid value is entered 344 If an invalid value is entered, the error message
359 will give a list of valid valu 345 will give a list of valid values e.g.
360 346
361 $ perf record -e intel 347 $ perf record -e intel_pt/psb_period=15/u uname
362 Invalid psb_period for 348 Invalid psb_period for intel_pt. Valid values are: 0-5
363 349
364 If MTC packets are selected, t 350 If MTC packets are selected, the default config selects a value
365 of 3 (i.e. psb_period=3) or th 351 of 3 (i.e. psb_period=3) or the nearest lower value that is
366 supported (0 is always support 352 supported (0 is always supported). Otherwise the default is 0.
367 353
368 If decoding is expected to be 354 If decoding is expected to be reliable and the buffer is large
369 then a large PSB period can be 355 then a large PSB period can be used.
370 356
371 Because a TSC packet is produc 357 Because a TSC packet is produced with PSB, the PSB period can
372 also affect the granularity to 358 also affect the granularity to timing information in the absence
373 of MTC or CYC. 359 of MTC or CYC.
374 360
375 mtc Produces MTC timing packets. 361 mtc Produces MTC timing packets.
376 362
377 MTC packets provide finer grai 363 MTC packets provide finer grain timestamp information than TSC
378 packets. MTC packets record t 364 packets. MTC packets record time using the hardware crystal
379 clock (CTC) which is related t 365 clock (CTC) which is related to TSC packets using a TMA packet.
380 366
381 Support for this feature is in 367 Support for this feature is indicated by:
382 368
383 /sys/bus/event_source/ 369 /sys/bus/event_source/devices/intel_pt/caps/mtc
384 370
385 which contains "1" if the feat 371 which contains "1" if the feature is supported and
386 "0" otherwise. 372 "0" otherwise.
387 373
388 The frequency of MTC packets c 374 The frequency of MTC packets can also be specified - see
389 mtc_period below. 375 mtc_period below.
390 376
391 mtc_period Specifies how frequently MTC p 377 mtc_period Specifies how frequently MTC packets are produced - see mtc
392 above for how to determine if 378 above for how to determine if MTC packets are supported.
393 379
394 Valid values are given by: 380 Valid values are given by:
395 381
396 /sys/bus/event_source/ 382 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods
397 383
398 which contains a hexadecimal v 384 which contains a hexadecimal value, the bits of which represent
399 valid values e.g. bit 2 set me 385 valid values e.g. bit 2 set means value 2 is valid.
400 386
401 The mtc_period value is conver 387 The mtc_period value is converted to the MTC frequency as:
402 388
403 CTC-frequency / (2 ^ v 389 CTC-frequency / (2 ^ value)
404 390
405 e.g. value 3 means one eighth 391 e.g. value 3 means one eighth of CTC-frequency
406 392
407 Where CTC is the hardware crys 393 Where CTC is the hardware crystal clock, the frequency of which
408 can be related to TSC via valu 394 can be related to TSC via values provided in cpuid leaf 0x15.
409 395
410 If an invalid value is entered 396 If an invalid value is entered, the error message
411 will give a list of valid valu 397 will give a list of valid values e.g.
412 398
413 $ perf record -e intel 399 $ perf record -e intel_pt/mtc_period=15/u uname
414 Invalid mtc_period for 400 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
415 401
416 The default value is 3 or the 402 The default value is 3 or the nearest lower value
417 that is supported (0 is always 403 that is supported (0 is always supported).
418 404
419 cyc Produces CYC timing packets. 405 cyc Produces CYC timing packets.
420 406
421 CYC packets provide even finer 407 CYC packets provide even finer grain timestamp information than
422 MTC and TSC packets. A CYC pa 408 MTC and TSC packets. A CYC packet contains the number of CPU
423 cycles since the last CYC pack 409 cycles since the last CYC packet. Unlike MTC and TSC packets,
424 CYC packets are only sent when 410 CYC packets are only sent when another packet is also sent.
425 411
426 Support for this feature is in 412 Support for this feature is indicated by:
427 413
428 /sys/bus/event_source/ 414 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
429 415
430 which contains "1" if the feat 416 which contains "1" if the feature is supported and
431 "0" otherwise. 417 "0" otherwise.
432 418
433 The number of CYC packets prod 419 The number of CYC packets produced can be reduced by specifying
434 a threshold - see cyc_thresh b 420 a threshold - see cyc_thresh below.
435 421
436 cyc_thresh Specifies how frequently CYC p 422 cyc_thresh Specifies how frequently CYC packets are produced - see cyc
437 above for how to determine if 423 above for how to determine if CYC packets are supported.
438 424
439 Valid cyc_thresh values are gi 425 Valid cyc_thresh values are given by:
440 426
441 /sys/bus/event_source/ 427 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
442 428
443 which contains a hexadecimal v 429 which contains a hexadecimal value, the bits of which represent
444 valid values e.g. bit 2 set me 430 valid values e.g. bit 2 set means value 2 is valid.
445 431
446 The cyc_thresh value represent 432 The cyc_thresh value represents the minimum number of CPU cycles
447 that must have passed before a 433 that must have passed before a CYC packet can be sent. The
448 number of CPU cycles is: 434 number of CPU cycles is:
449 435
450 2 ^ (value - 1) 436 2 ^ (value - 1)
451 437
452 e.g. value 4 means 8 CPU cycle 438 e.g. value 4 means 8 CPU cycles must pass before a CYC packet
453 can be sent. Note a CYC packe 439 can be sent. Note a CYC packet is still only sent when another
454 packet is sent, not at, e.g. e 440 packet is sent, not at, e.g. every 8 CPU cycles.
455 441
456 If an invalid value is entered 442 If an invalid value is entered, the error message
457 will give a list of valid valu 443 will give a list of valid values e.g.
458 444
459 $ perf record -e intel 445 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
460 Invalid cyc_thresh for 446 Invalid cyc_thresh for intel_pt. Valid values are: 0-12
461 447
462 CYC packets are not requested 448 CYC packets are not requested by default.
463 449
464 pt Specifies pass-through which e 450 pt Specifies pass-through which enables the 'branch' config term.
465 451
466 The default config selects 'pt 452 The default config selects 'pt' if it is available, so a user will
467 never need to specify this ter 453 never need to specify this term.
468 454
469 branch Enable branch tracing. Branch 455 branch Enable branch tracing. Branch tracing is enabled by default so to
470 disable branch tracing use 'br 456 disable branch tracing use 'branch=0'.
471 457
472 The default config selects 'br 458 The default config selects 'branch' if it is available.
473 459
474 ptw Enable PTWRITE packets which a 460 ptw Enable PTWRITE packets which are produced when a ptwrite instruction
475 is executed. 461 is executed.
476 462
477 Support for this feature is in 463 Support for this feature is indicated by:
478 464
479 /sys/bus/event_source/ 465 /sys/bus/event_source/devices/intel_pt/caps/ptwrite
480 466
481 which contains "1" if the feat 467 which contains "1" if the feature is supported and
482 "0" otherwise. 468 "0" otherwise.
483 469
484 As an alternative, refer to "E <<
485 <<
486 fup_on_ptw Enable a FUP packet to follow 470 fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet
487 provides the address of the pt 471 provides the address of the ptwrite instruction. In the absence of
488 fup_on_ptw, the decoder will u 472 fup_on_ptw, the decoder will use the address of the previous branch
489 if branch tracing is enabled, 473 if branch tracing is enabled, otherwise the address will be zero.
490 Note that fup_on_ptw will work 474 Note that fup_on_ptw will work even when branch tracing is disabled.
491 475
492 pwr_evt Enable power events. The powe 476 pwr_evt Enable power events. The power events provide information about
493 changes to the CPU C-state. 477 changes to the CPU C-state.
494 478
495 Support for this feature is in 479 Support for this feature is indicated by:
496 480
497 /sys/bus/event_source/ 481 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace
498 482
499 which contains "1" if the feat 483 which contains "1" if the feature is supported and
500 "0" otherwise. 484 "0" otherwise.
501 485
502 event Enable Event Trace. The event <<
503 events. <<
504 <<
505 Support for this feature is in <<
506 <<
507 /sys/bus/event_source/ <<
508 <<
509 which contains "1" if the feat <<
510 "0" otherwise. <<
511 <<
512 notnt Disable TNT packets. Without <<
513 executable code to reconstruct <<
514 and TIP.PGD packets still indi <<
515 return compression is disabled <<
516 The advantage of eliminating T <<
517 trace and corresponding tracin <<
518 <<
519 Support for this feature is in <<
520 <<
521 /sys/bus/event_source/ <<
522 <<
523 which contains "1" if the feat <<
524 "0" otherwise. <<
525 <<
526 486
527 AUX area sampling option 487 AUX area sampling option
528 ~~~~~~~~~~~~~~~~~~~~~~~~ 488 ~~~~~~~~~~~~~~~~~~~~~~~~
529 489
530 To select Intel PT "sampling" the AUX area sam 490 To select Intel PT "sampling" the AUX area sampling option can be used:
531 491
532 --aux-sample 492 --aux-sample
533 493
534 Optionally it can be followed by the sample si 494 Optionally it can be followed by the sample size in bytes e.g.
535 495
536 --aux-sample=8192 496 --aux-sample=8192
537 497
538 In addition, the Intel PT event to sample must 498 In addition, the Intel PT event to sample must be defined e.g.
539 499
540 -e intel_pt//u 500 -e intel_pt//u
541 501
542 Samples on other events will be created contai 502 Samples on other events will be created containing Intel PT data e.g. the
543 following will create Intel PT samples on the 503 following will create Intel PT samples on the branch-misses event, note the
544 events must be grouped using {}: 504 events must be grouped using {}:
545 505
546 perf record --aux-sample -e '{intel_pt 506 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}'
547 507
548 An alternative to '--aux-sample' is to add the 508 An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to
549 events. In this case, the grouping is implied 509 events. In this case, the grouping is implied e.g.
550 510
551 perf record -e intel_pt//u -e branch-m 511 perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u
552 512
553 is the same as: 513 is the same as:
554 514
555 perf record -e '{intel_pt//u,branch-mi 515 perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}'
556 516
557 but allows for also using an address filter e. 517 but allows for also using an address filter e.g.:
558 518
559 perf record -e intel_pt//u --filter 'f 519 perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls
560 520
561 It is important to select a sample size that i 521 It is important to select a sample size that is big enough to contain at least
562 one PSB packet. If not a warning will be disp 522 one PSB packet. If not a warning will be displayed:
563 523
564 Intel PT sample size (%zu) may be too 524 Intel PT sample size (%zu) may be too small for PSB period (%zu)
565 525
566 The calculation used for that is: if sample_si 526 The calculation used for that is: if sample_size <= psb_period + 256 display the
567 warning. When sampling is used, psb_period de 527 warning. When sampling is used, psb_period defaults to 0 (2KiB).
568 528
569 The default sample size is 4KiB. 529 The default sample size is 4KiB.
570 530
571 The sample size is passed in aux_sample_size i 531 The sample size is passed in aux_sample_size in struct perf_event_attr. The
572 sample size is limited by the maximum event si 532 sample size is limited by the maximum event size which is 64KiB. It is
573 difficult to know how big the event might be w 533 difficult to know how big the event might be without the trace sample attached,
574 but the tool validates that the sample size is 534 but the tool validates that the sample size is not greater than 60KiB.
575 535
576 536
577 new snapshot option 537 new snapshot option
578 ~~~~~~~~~~~~~~~~~~~ 538 ~~~~~~~~~~~~~~~~~~~
579 539
580 The difference between full trace and snapshot 540 The difference between full trace and snapshot from the kernel's perspective is
581 that in full trace we don't overwrite trace da 541 that in full trace we don't overwrite trace data that the user hasn't collected
582 yet (and indicated that by advancing aux_tail) 542 yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
583 the trace run and overwrite older data in the 543 the trace run and overwrite older data in the buffer so that whenever something
584 interesting happens, we can stop it and grab a 544 interesting happens, we can stop it and grab a snapshot of what was going on
585 around that interesting moment. 545 around that interesting moment.
586 546
587 To select snapshot mode a new option has been 547 To select snapshot mode a new option has been added:
588 548
589 -S 549 -S
590 550
591 Optionally it can be followed by the snapshot 551 Optionally it can be followed by the snapshot size e.g.
592 552
593 -S0x100000 553 -S0x100000
594 554
595 The default snapshot size is the auxtrace mmap 555 The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size
596 nor snapshot size is specified, then the defau 556 nor snapshot size is specified, then the default is 4MiB for privileged users
597 (or if /proc/sys/kernel/perf_event_paranoid < 557 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
598 If an unprivileged user does not specify mmap 558 If an unprivileged user does not specify mmap pages, the mmap pages will be
599 reduced as described in the 'new auxtrace mmap 559 reduced as described in the 'new auxtrace mmap size option' section below.
600 560
601 The snapshot size is displayed if the option - 561 The snapshot size is displayed if the option -vv is used e.g.
602 562
603 Intel PT snapshot size: %zu 563 Intel PT snapshot size: %zu
604 564
605 565
606 new auxtrace mmap size option 566 new auxtrace mmap size option
607 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 567 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
608 568
609 Intel PT buffer size is specified by an additi 569 Intel PT buffer size is specified by an addition to the -m option e.g.
610 570
611 -m,16 571 -m,16
612 572
613 selects a buffer size of 16 pages i.e. 64KiB. 573 selects a buffer size of 16 pages i.e. 64KiB.
614 574
615 Note that the existing functionality of -m is 575 Note that the existing functionality of -m is unchanged. The auxtrace mmap size
616 is specified by the optional addition of a com 576 is specified by the optional addition of a comma and the value.
617 577
618 The default auxtrace mmap size for Intel PT is 578 The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users
619 (or if /proc/sys/kernel/perf_event_paranoid < 579 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
620 If an unprivileged user does not specify mmap 580 If an unprivileged user does not specify mmap pages, the mmap pages will be
621 reduced from the default 512KiB/page_size to 2 581 reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the
622 user is likely to get an error as they exceed 582 user is likely to get an error as they exceed their mlock limit (Max locked
623 memory as shown in /proc/self/limits). Note t 583 memory as shown in /proc/self/limits). Note that perf does not count the first
624 512KiB (actually /proc/sys/kernel/perf_event_m 584 512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu
625 against the mlock limit so an unprivileged use 585 against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus
626 their mlock limit (which defaults to 64KiB but 586 their mlock limit (which defaults to 64KiB but is not multiplied by the number
627 of cpus). 587 of cpus).
628 588
629 In full-trace mode, powers of two are allowed 589 In full-trace mode, powers of two are allowed for buffer size, with a minimum
630 size of 2 pages. In snapshot mode or sampling 590 size of 2 pages. In snapshot mode or sampling mode, it is the same but the
631 minimum size is 1 page. 591 minimum size is 1 page.
632 592
633 The mmap size and auxtrace mmap size are displ 593 The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g.
634 594
635 mmap length 528384 595 mmap length 528384
636 auxtrace mmap length 4198400 596 auxtrace mmap length 4198400
637 597
638 598
639 Intel PT modes of operation 599 Intel PT modes of operation
640 ~~~~~~~~~~~~~~~~~~~~~~~~~~~ 600 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
641 601
642 Intel PT can be used in 3 modes: 602 Intel PT can be used in 3 modes:
643 full-trace mode 603 full-trace mode
644 sample mode 604 sample mode
645 snapshot mode 605 snapshot mode
646 606
647 Full-trace mode traces continuously e.g. 607 Full-trace mode traces continuously e.g.
648 608
649 perf record -e intel_pt//u uname 609 perf record -e intel_pt//u uname
650 610
651 Sample mode attaches a Intel PT sample to othe 611 Sample mode attaches a Intel PT sample to other events e.g.
652 612
653 perf record --aux-sample -e intel_pt// 613 perf record --aux-sample -e intel_pt//u -e branch-misses:u
654 614
655 Snapshot mode captures the available data when 615 Snapshot mode captures the available data when a signal is sent or "snapshot"
656 control command is issued. e.g. using a signal 616 control command is issued. e.g. using a signal
657 617
658 perf record -v -e intel_pt//u -S ./loo 618 perf record -v -e intel_pt//u -S ./loopy 1000000000 &
659 [1] 11435 619 [1] 11435
660 kill -USR2 11435 620 kill -USR2 11435
661 Recording AUX area tracing snapshot 621 Recording AUX area tracing snapshot
662 622
663 Note that the signal sent is SIGUSR2. 623 Note that the signal sent is SIGUSR2.
664 Note that "Recording AUX area tracing snapshot 624 Note that "Recording AUX area tracing snapshot" is displayed because the -v
665 option is used. 625 option is used.
666 626
667 The advantage of using "snapshot" control comm 627 The advantage of using "snapshot" control command is that the access is
668 controlled by access to a FIFO e.g. 628 controlled by access to a FIFO e.g.
669 629
670 $ mkfifo perf.control 630 $ mkfifo perf.control
671 $ mkfifo perf.ack 631 $ mkfifo perf.ack
672 $ cat perf.ack & 632 $ cat perf.ack &
673 [1] 15235 633 [1] 15235
674 $ sudo ~/bin/perf record --control fif 634 $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 &
675 [2] 15243 635 [2] 15243
676 $ ps -e | grep perf 636 $ ps -e | grep perf
677 15244 pts/1 00:00:00 perf 637 15244 pts/1 00:00:00 perf
678 $ kill -USR2 15244 638 $ kill -USR2 15244
679 bash: kill: (15244) - Operation not pe 639 bash: kill: (15244) - Operation not permitted
680 $ echo snapshot > perf.control 640 $ echo snapshot > perf.control
681 ack 641 ack
682 642
683 The 3 Intel PT modes of operation cannot be us 643 The 3 Intel PT modes of operation cannot be used together.
684 644
685 645
686 Buffer handling 646 Buffer handling
687 ~~~~~~~~~~~~~~~ 647 ~~~~~~~~~~~~~~~
688 648
689 There may be buffer limitations (i.e. single T 649 There may be buffer limitations (i.e. single ToPa entry) which means that actual
690 buffer sizes are limited to powers of 2 up to !! 650 buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to
691 provide other sizes, and in particular an arbi 651 provide other sizes, and in particular an arbitrarily large size, multiple
692 buffers are logically concatenated. However a 652 buffers are logically concatenated. However an interrupt must be used to switch
693 between buffers. That has two potential probl 653 between buffers. That has two potential problems:
694 a) the interrupt may not be handled in 654 a) the interrupt may not be handled in time so that the current buffer
695 becomes full and some trace data is lo 655 becomes full and some trace data is lost.
696 b) the interrupts may slow the system 656 b) the interrupts may slow the system and affect the performance
697 results. 657 results.
698 658
699 If trace data is lost, the driver sets 'trunca 659 If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event
700 which the tools report as an error. 660 which the tools report as an error.
701 661
702 In full-trace mode, the driver waits for data 662 In full-trace mode, the driver waits for data to be copied out before allowing
703 the (logical) buffer to wrap-around. If data 663 the (logical) buffer to wrap-around. If data is not copied out quickly enough,
704 again 'truncated' is set in the PERF_RECORD_AU 664 again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to
705 wait, the intel_pt event gets disabled. Becau 665 wait, the intel_pt event gets disabled. Because it is difficult to know when
706 that happens, perf tools always re-enable the 666 that happens, perf tools always re-enable the intel_pt event after copying out
707 data. 667 data.
708 668
709 669
710 Intel PT and build ids 670 Intel PT and build ids
711 ~~~~~~~~~~~~~~~~~~~~~~ 671 ~~~~~~~~~~~~~~~~~~~~~~
712 672
713 By default "perf record" post-processes the ev 673 By default "perf record" post-processes the event stream to find all build ids
714 for executables for all addresses sampled. De 674 for executables for all addresses sampled. Deliberately, Intel PT is not
715 decoded for that purpose (it would take too lo 675 decoded for that purpose (it would take too long). Instead the build ids for
716 all executables encountered (due to mmap, comm 676 all executables encountered (due to mmap, comm or task events) are included
717 in the perf.data file. 677 in the perf.data file.
718 678
719 To see buildids included in the perf.data file 679 To see buildids included in the perf.data file use the command:
720 680
721 perf buildid-list 681 perf buildid-list
722 682
723 If the perf.data file contains Intel PT data, 683 If the perf.data file contains Intel PT data, that is the same as:
724 684
725 perf buildid-list --with-hits 685 perf buildid-list --with-hits
726 686
727 687
728 Snapshot mode and event disabling 688 Snapshot mode and event disabling
729 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 689 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
730 690
731 In order to make a snapshot, the intel_pt even 691 In order to make a snapshot, the intel_pt event is disabled using an IOCTL,
732 namely PERF_EVENT_IOC_DISABLE. However doing 692 namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the
733 collection of side-band information. In order 693 collection of side-band information. In order to prevent that, a dummy
734 software event has been introduced that permit 694 software event has been introduced that permits tracking events (like mmaps) to
735 continue to be recorded while intel_pt is disa 695 continue to be recorded while intel_pt is disabled. That is important to ensure
736 there is complete side-band information to all 696 there is complete side-band information to allow the decoding of subsequent
737 snapshots. 697 snapshots.
738 698
739 A test has been created for that. To find the 699 A test has been created for that. To find the test:
740 700
741 perf test list 701 perf test list
742 ... 702 ...
743 23: Test using a dummy software event 703 23: Test using a dummy software event to keep tracking
744 704
745 To run the test: 705 To run the test:
746 706
747 perf test 23 707 perf test 23
748 23: Test using a dummy software event 708 23: Test using a dummy software event to keep tracking : Ok
749 709
750 710
751 perf record modes (nothing new here) 711 perf record modes (nothing new here)
752 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 712 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
753 713
754 perf record essentially operates in one of thr 714 perf record essentially operates in one of three modes:
755 per thread 715 per thread
756 per cpu 716 per cpu
757 workload only 717 workload only
758 718
759 "per thread" mode is selected by -t or by --pe 719 "per thread" mode is selected by -t or by --per-thread (with -p or -u or just a
760 workload). 720 workload).
761 "per cpu" is selected by -C or -a. 721 "per cpu" is selected by -C or -a.
762 "workload only" mode is selected by not using 722 "workload only" mode is selected by not using the other options but providing a
763 command to run (i.e. the workload). 723 command to run (i.e. the workload).
764 724
765 In per-thread mode an exact list of threads is 725 In per-thread mode an exact list of threads is traced. There is no inheritance.
766 Each thread has its own event buffer. 726 Each thread has its own event buffer.
767 727
768 In per-cpu mode all processes (or processes fr 728 In per-cpu mode all processes (or processes from the selected cgroup i.e. -G
769 option, or processes selected with -p or -u) a 729 option, or processes selected with -p or -u) are traced. Each cpu has its own
770 buffer. Inheritance is allowed. 730 buffer. Inheritance is allowed.
771 731
772 In workload-only mode, the workload is traced 732 In workload-only mode, the workload is traced but with per-cpu buffers.
773 Inheritance is allowed. Note that you can now 733 Inheritance is allowed. Note that you can now trace a workload in per-thread
774 mode by using the --per-thread option. 734 mode by using the --per-thread option.
775 735
776 736
777 Privileged vs non-privileged users 737 Privileged vs non-privileged users
778 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 738 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
779 739
780 Unless /proc/sys/kernel/perf_event_paranoid is 740 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users
781 have memory limits imposed upon them. That af 741 have memory limits imposed upon them. That affects what buffer sizes they can
782 have as outlined above. 742 have as outlined above.
783 743
784 The v4.2 kernel introduced support for a conte 744 The v4.2 kernel introduced support for a context switch metadata event,
785 PERF_RECORD_SWITCH, which allows unprivileged 745 PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes
786 are scheduled out and in, just not by whom, wh 746 are scheduled out and in, just not by whom, which is left for the
787 PERF_RECORD_SWITCH_CPU_WIDE, that is only acce 747 PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context,
788 which in turn requires CAP_PERFMON or CAP_SYS_ 748 which in turn requires CAP_PERFMON or CAP_SYS_ADMIN.
789 749
790 Please see the 45ac1403f564 ("perf: Add PERF_R 750 Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context
791 switches") commit, that introduces these metad 751 switches") commit, that introduces these metadata events for further info.
792 752
793 When working with kernels < v4.2, the followin 753 When working with kernels < v4.2, the following considerations must be taken,
794 as the sched:sched_switch tracepoints will be 754 as the sched:sched_switch tracepoints will be used to receive such information:
795 755
796 Unless /proc/sys/kernel/perf_event_paranoid is 756 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are
797 not permitted to use tracepoints which means t 757 not permitted to use tracepoints which means there is insufficient side-band
798 information to decode Intel PT in per-cpu mode 758 information to decode Intel PT in per-cpu mode, and potentially workload-only
799 mode too if the workload creates new processes 759 mode too if the workload creates new processes.
800 760
801 Note also, that to use tracepoints, read-acces 761 Note also, that to use tracepoints, read-access to debugfs is required. So if
802 debugfs is not mounted or the user does not ha 762 debugfs is not mounted or the user does not have read-access, it will again not
803 be possible to decode Intel PT in per-cpu mode 763 be possible to decode Intel PT in per-cpu mode.
804 764
805 765
806 sched_switch tracepoint 766 sched_switch tracepoint
807 ~~~~~~~~~~~~~~~~~~~~~~~ 767 ~~~~~~~~~~~~~~~~~~~~~~~
808 768
809 The sched_switch tracepoint is used to provide 769 The sched_switch tracepoint is used to provide side-band data for Intel PT
810 decoding in kernels where the PERF_RECORD_SWIT 770 decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't
811 available. 771 available.
812 772
813 The sched_switch events are automatically adde 773 The sched_switch events are automatically added. e.g. the second event shown
814 below: 774 below:
815 775
816 $ perf record -vv -e intel_pt//u uname 776 $ perf record -vv -e intel_pt//u uname
817 -------------------------------------- 777 ------------------------------------------------------------
818 perf_event_attr: 778 perf_event_attr:
819 type 6 779 type 6
820 size 112 780 size 112
821 config 0x400 781 config 0x400
822 { sample_period, sample_freq } 1 782 { sample_period, sample_freq } 1
823 sample_type IP|TI 783 sample_type IP|TID|TIME|CPU|IDENTIFIER
824 read_format ID 784 read_format ID
825 disabled 1 785 disabled 1
826 inherit 1 786 inherit 1
827 exclude_kernel 1 787 exclude_kernel 1
828 exclude_hv 1 788 exclude_hv 1
829 enable_on_exec 1 789 enable_on_exec 1
830 sample_id_all 1 790 sample_id_all 1
831 -------------------------------------- 791 ------------------------------------------------------------
832 sys_perf_event_open: pid 31104 cpu 0 792 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
833 sys_perf_event_open: pid 31104 cpu 1 793 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
834 sys_perf_event_open: pid 31104 cpu 2 794 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
835 sys_perf_event_open: pid 31104 cpu 3 795 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
836 -------------------------------------- 796 ------------------------------------------------------------
837 perf_event_attr: 797 perf_event_attr:
838 type 2 798 type 2
839 size 112 799 size 112
840 config 0x108 800 config 0x108
841 { sample_period, sample_freq } 1 801 { sample_period, sample_freq } 1
842 sample_type IP|TI 802 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER
843 read_format ID 803 read_format ID
844 inherit 1 804 inherit 1
845 sample_id_all 1 805 sample_id_all 1
846 exclude_guest 1 806 exclude_guest 1
847 -------------------------------------- 807 ------------------------------------------------------------
848 sys_perf_event_open: pid -1 cpu 0 gr 808 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8
849 sys_perf_event_open: pid -1 cpu 1 gr 809 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8
850 sys_perf_event_open: pid -1 cpu 2 gr 810 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8
851 sys_perf_event_open: pid -1 cpu 3 gr 811 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8
852 -------------------------------------- 812 ------------------------------------------------------------
853 perf_event_attr: 813 perf_event_attr:
854 type 1 814 type 1
855 size 112 815 size 112
856 config 0x9 816 config 0x9
857 { sample_period, sample_freq } 1 817 { sample_period, sample_freq } 1
858 sample_type IP|TI 818 sample_type IP|TID|TIME|IDENTIFIER
859 read_format ID 819 read_format ID
860 disabled 1 820 disabled 1
861 inherit 1 821 inherit 1
862 exclude_kernel 1 822 exclude_kernel 1
863 exclude_hv 1 823 exclude_hv 1
864 mmap 1 824 mmap 1
865 comm 1 825 comm 1
866 enable_on_exec 1 826 enable_on_exec 1
867 task 1 827 task 1
868 sample_id_all 1 828 sample_id_all 1
869 mmap2 1 829 mmap2 1
870 comm_exec 1 830 comm_exec 1
871 -------------------------------------- 831 ------------------------------------------------------------
872 sys_perf_event_open: pid 31104 cpu 0 832 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
873 sys_perf_event_open: pid 31104 cpu 1 833 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
874 sys_perf_event_open: pid 31104 cpu 2 834 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
875 sys_perf_event_open: pid 31104 cpu 3 835 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
876 mmap size 528384B 836 mmap size 528384B
877 AUX area mmap length 4194304 837 AUX area mmap length 4194304
878 perf event ring buffer mmapped per cpu 838 perf event ring buffer mmapped per cpu
879 Synthesizing auxtrace information 839 Synthesizing auxtrace information
880 Linux 840 Linux
881 [ perf record: Woken up 1 times to wri 841 [ perf record: Woken up 1 times to write data ]
882 [ perf record: Captured and wrote 0.04 842 [ perf record: Captured and wrote 0.042 MB perf.data ]
883 843
884 Note, the sched_switch event is only added if 844 Note, the sched_switch event is only added if the user is permitted to use it
885 and only in per-cpu mode. 845 and only in per-cpu mode.
886 846
887 Note also, the sched_switch event is only adde 847 Note also, the sched_switch event is only added if TSC packets are requested.
888 That is because, in the absence of timing info 848 That is because, in the absence of timing information, the sched_switch events
889 cannot be matched against the Intel PT trace. 849 cannot be matched against the Intel PT trace.
890 850
891 851
892 perf script 852 perf script
893 ----------- 853 -----------
894 854
895 By default, perf script will decode trace data 855 By default, perf script will decode trace data found in the perf.data file.
896 This can be further controlled by new option - 856 This can be further controlled by new option --itrace.
897 857
898 858
899 New --itrace option 859 New --itrace option
900 ~~~~~~~~~~~~~~~~~~~ 860 ~~~~~~~~~~~~~~~~~~~
901 861
902 Having no option is the same as 862 Having no option is the same as
903 863
904 --itrace 864 --itrace
905 865
906 which, in turn, is the same as 866 which, in turn, is the same as
907 867
908 --itrace=cepwxy !! 868 --itrace=cepwx
909 869
910 The letters are: 870 The letters are:
911 871
912 i synthesize "instructions" even 872 i synthesize "instructions" events
913 y synthesize "cycles" events <<
914 b synthesize "branches" events 873 b synthesize "branches" events
915 x synthesize "transactions" even 874 x synthesize "transactions" events
916 w synthesize "ptwrite" events 875 w synthesize "ptwrite" events
917 p synthesize "power" events (inc 876 p synthesize "power" events (incl. PSB events)
918 c synthesize branches events (ca 877 c synthesize branches events (calls only)
919 r synthesize branches events (re 878 r synthesize branches events (returns only)
920 o synthesize PEBS-via-PT events <<
921 I synthesize Event Trace events <<
922 e synthesize tracing error event 879 e synthesize tracing error events
923 d create a debug log 880 d create a debug log
924 g synthesize a call chain (use w 881 g synthesize a call chain (use with i or x)
925 G synthesize a call chain on exi 882 G synthesize a call chain on existing event records
926 l synthesize last branch entries 883 l synthesize last branch entries (use with i or x)
927 L synthesize last branch entries 884 L synthesize last branch entries on existing event records
928 s skip initial number of events 885 s skip initial number of events
929 q quicker (less detailed) decodi 886 q quicker (less detailed) decoding
930 A approximate IPC 887 A approximate IPC
931 Z prefer to ignore timestamps (s 888 Z prefer to ignore timestamps (so-called "timeless" decoding)
932 889
933 "Instructions" events look like they were reco 890 "Instructions" events look like they were recorded by "perf record -e
934 instructions". 891 instructions".
935 892
936 "Cycles" events look like they were recorded b <<
937 (ie., the default). Note that even with CYC pa <<
938 these are not fully accurate, since CYC packet <<
939 instruction, only when some other event (like <<
940 TNT packet representing multiple branches) hap <<
941 be emitted. Thus, it is more effective for att <<
942 (and possibly basic blocks) than to individual <<
943 is not even perfect for functions (although it <<
944 option is active). <<
945 <<
946 "Branches" events look like they were recorded 893 "Branches" events look like they were recorded by "perf record -e branches". "c"
947 and "r" can be combined to get calls and retur 894 and "r" can be combined to get calls and returns.
948 895
949 "Transactions" events correspond to the start 896 "Transactions" events correspond to the start or end of transactions. The
950 'flags' field can be used in perf script to de 897 'flags' field can be used in perf script to determine whether the event is a
951 transaction start, commit or abort. 898 transaction start, commit or abort.
952 899
953 Note that "instructions", "cycles", "branches" !! 900 Note that "instructions", "branches" and "transactions" events depend on code
954 depend on code flow packets which can be disab !! 901 flow packets which can be disabled by using the config term "branch=0". Refer
955 "branch=0". Refer to the config terms section !! 902 to the config terms section above.
956 903
957 "ptwrite" events record the payload of the ptw 904 "ptwrite" events record the payload of the ptwrite instruction and whether
958 "fup_on_ptw" was used. "ptwrite" events depen 905 "fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are
959 recorded only if the "ptw" config term was use 906 recorded only if the "ptw" config term was used. Refer to the config terms
960 section above. perf script "synth" field disp 907 section above. perf script "synth" field displays "ptwrite" information like
961 this: "ip: 0 payload: 0x123456789abcdef0" whe 908 this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was
962 used. 909 used.
963 910
964 "Power" events correspond to power event packe 911 "Power" events correspond to power event packets and CBR (core-to-bus ratio)
965 packets. While CBR packets are always recorde 912 packets. While CBR packets are always recorded when tracing is enabled, power
966 event packets are recorded only if the "pwr_ev 913 event packets are recorded only if the "pwr_evt" config term was used. Refer to
967 the config terms section above. The power eve 914 the config terms section above. The power events record information about
968 C-state changes, whereas CBR is indicative of 915 C-state changes, whereas CBR is indicative of CPU frequency. perf script
969 "event,synth" fields display information like 916 "event,synth" fields display information like this:
970 <<
971 cbr: cbr: 22 freq: 2189 MHz (200%) 917 cbr: cbr: 22 freq: 2189 MHz (200%)
972 mwait: hints: 0x60 extensions: 0x1 918 mwait: hints: 0x60 extensions: 0x1
973 pwre: hw: 0 cstate: 2 sub-cstate: 0 919 pwre: hw: 0 cstate: 2 sub-cstate: 0
974 exstop: ip: 1 920 exstop: ip: 1
975 pwrx: deepest cstate: 2 last cstate: 921 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4
976 <<
977 Where: 922 Where:
978 <<
979 "cbr" includes the frequency and the p 923 "cbr" includes the frequency and the percentage of maximum non-turbo
980 "mwait" shows mwait hints and extensio 924 "mwait" shows mwait hints and extensions
981 "pwre" shows C-state transitions (to a 925 "pwre" shows C-state transitions (to a C-state deeper than C0) and
982 whether initiated by hardware 926 whether initiated by hardware
983 "exstop" indicates execution stopped a 927 "exstop" indicates execution stopped and whether the IP was recorded
984 exactly, 928 exactly,
985 "pwrx" indicates return to C0 929 "pwrx" indicates return to C0
986 <<
987 For more details refer to the Intel 64 and IA- 930 For more details refer to the Intel 64 and IA-32 Architectures Software
988 Developer Manuals. 931 Developer Manuals.
989 932
990 PSB events show when a PSB+ occurred and also 933 PSB events show when a PSB+ occurred and also the byte-offset in the trace.
991 Emitting a PSB+ can cause a CPU a slight delay 934 Emitting a PSB+ can cause a CPU a slight delay. When doing timing analysis
992 of code with Intel PT, it is useful to know if 935 of code with Intel PT, it is useful to know if a timing bubble was caused
993 by Intel PT or not. 936 by Intel PT or not.
994 937
995 Error events show where the decoder lost the t 938 Error events show where the decoder lost the trace. Error events
996 are quite important. Users must know if what 939 are quite important. Users must know if what they are seeing is a complete
997 picture or not. The "e" option may be followed 940 picture or not. The "e" option may be followed by flags which affect what errors
998 will or will not be reported. Each flag must 941 will or will not be reported. Each flag must be preceded by either '+' or '-'.
999 The flags supported by Intel PT are: 942 The flags supported by Intel PT are:
1000 <<
1001 -o Suppress overflow err 943 -o Suppress overflow errors
1002 -l Suppress trace data l 944 -l Suppress trace data lost errors
1003 <<
1004 For example, for errors but not overflow or d 945 For example, for errors but not overflow or data lost errors:
1005 946
1006 --itrace=e-o-l 947 --itrace=e-o-l
1007 948
1008 The "d" option will cause the creation of a f 949 The "d" option will cause the creation of a file "intel_pt.log" containing all
1009 decoded packets and instructions. Note that 950 decoded packets and instructions. Note that this option slows down the decoder
1010 and that the resulting file may be very large 951 and that the resulting file may be very large. The "d" option may be followed
1011 by flags which affect what debug messages wil 952 by flags which affect what debug messages will or will not be logged. Each flag
1012 must be preceded by either '+' or '-'. The fl 953 must be preceded by either '+' or '-'. The flags support by Intel PT are:
1013 <<
1014 -a Suppress logging of p 954 -a Suppress logging of perf events
1015 +a Log all perf events 955 +a Log all perf events
1016 +e Output only on decodi <<
1017 +o Output to stdout inst 956 +o Output to stdout instead of "intel_pt.log"
1018 <<
1019 By default, logged perf events are filtered b 957 By default, logged perf events are filtered by any specified time ranges, but
1020 flag +a overrides that. The +e flag can be u !! 958 flag +a overrides that.
1021 default, the log size in that case is 16384 b <<
1022 linkperf:perf-config[1] e.g. perf config itra <<
1023 959
1024 In addition, the period of the "instructions" 960 In addition, the period of the "instructions" event can be specified. e.g.
1025 961
1026 --itrace=i10us 962 --itrace=i10us
1027 963
1028 sets the period to 10us i.e. one instruction 964 sets the period to 10us i.e. one instruction sample is synthesized for each 10
1029 microseconds of trace. Alternatives to "us" 965 microseconds of trace. Alternatives to "us" are "ms" (milliseconds),
1030 "ns" (nanoseconds), "t" (TSC ticks) or "i" (i 966 "ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
1031 967
1032 "ms", "us" and "ns" are converted to TSC tick 968 "ms", "us" and "ns" are converted to TSC ticks.
1033 969
1034 The timing information included with Intel PT 970 The timing information included with Intel PT does not give the time of every
1035 instruction. Consequently, for the purpose o 971 instruction. Consequently, for the purpose of sampling, the decoder estimates
1036 the time since the last timing packet based o 972 the time since the last timing packet based on 1 tick per instruction. The time
1037 on the sample is *not* adjusted and reflects 973 on the sample is *not* adjusted and reflects the last known value of TSC.
1038 974
1039 For Intel PT, the default period is 100us. 975 For Intel PT, the default period is 100us.
1040 976
1041 Setting it to a zero period means "as often a 977 Setting it to a zero period means "as often as possible".
1042 978
1043 In the case of Intel PT that is the same as a 979 In the case of Intel PT that is the same as a period of 1 and a unit of
1044 'instructions' (i.e. --itrace=i1i). 980 'instructions' (i.e. --itrace=i1i).
1045 981
1046 Also the call chain size (default 16, max. 10 982 Also the call chain size (default 16, max. 1024) for instructions or
1047 transactions events can be specified. e.g. 983 transactions events can be specified. e.g.
1048 984
1049 --itrace=ig32 985 --itrace=ig32
1050 --itrace=xg32 986 --itrace=xg32
1051 987
1052 Also the number of last branch entries (defau 988 Also the number of last branch entries (default 64, max. 1024) for instructions or
1053 transactions events can be specified. e.g. 989 transactions events can be specified. e.g.
1054 990
1055 --itrace=il10 991 --itrace=il10
1056 --itrace=xl10 992 --itrace=xl10
1057 993
1058 Note that last branch entries are cleared for 994 Note that last branch entries are cleared for each sample, so there is no overlap
1059 from one sample to the next. 995 from one sample to the next.
1060 996
1061 The G and L options are designed in particula 997 The G and L options are designed in particular for sample mode, and work much
1062 like g and l but add call chain and branch st 998 like g and l but add call chain and branch stack to the other selected events
1063 instead of synthesized events. For example, t 999 instead of synthesized events. For example, to record branch-misses events for
1064 'ls' and then add a call chain derived from t 1000 'ls' and then add a call chain derived from the Intel PT trace:
1065 1001
1066 perf record --aux-sample -e '{intel_p 1002 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls
1067 perf report --itrace=Ge 1003 perf report --itrace=Ge
1068 1004
1069 Although in fact G is a default for perf repo 1005 Although in fact G is a default for perf report, so that is the same as just:
1070 1006
1071 perf report 1007 perf report
1072 1008
1073 One caveat with the G and L options is that t 1009 One caveat with the G and L options is that they work poorly with "Large PEBS".
1074 Large PEBS means PEBS records will be accumul 1010 Large PEBS means PEBS records will be accumulated by hardware and the written
1075 into the event buffer in one go. That reduce 1011 into the event buffer in one go. That reduces interrupts, but can give very
1076 late timestamps. Because the Intel PT trace 1012 late timestamps. Because the Intel PT trace is synchronized by timestamps,
1077 the PEBS events do not match the trace. Curr 1013 the PEBS events do not match the trace. Currently, Large PEBS is used only in
1078 certain circumstances: 1014 certain circumstances:
1079 - hardware supports it 1015 - hardware supports it
1080 - PEBS is used 1016 - PEBS is used
1081 - event period is specified, instead 1017 - event period is specified, instead of frequency
1082 - the sample type is limited to the f 1018 - the sample type is limited to the following flags:
1083 PERF_SAMPLE_IP | PERF_SAMPLE_ 1019 PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR |
1084 PERF_SAMPLE_ID | PERF_SAMPLE_ 1020 PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID |
1085 PERF_SAMPLE_DATA_SRC | PERF_S 1021 PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER |
1086 PERF_SAMPLE_TRANSACTION | PER 1022 PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR |
1087 PERF_SAMPLE_REGS_INTR | PERF_ 1023 PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER |
1088 PERF_SAMPLE_PERIOD (and somet 1024 PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME
1089 Because Intel PT sample mode uses a different 1025 Because Intel PT sample mode uses a different sample type to the list above,
1090 Large PEBS is not used with Intel PT sample m 1026 Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other
1091 cases, avoid specifying the event period i.e. 1027 cases, avoid specifying the event period i.e. avoid the 'perf record' -c option,
1092 --count option, or 'period' config term. 1028 --count option, or 'period' config term.
1093 1029
1094 To disable trace decoding entirely, use the o 1030 To disable trace decoding entirely, use the option --no-itrace.
1095 1031
1096 It is also possible to skip events generated 1032 It is also possible to skip events generated (instructions, branches, transactions)
1097 at the beginning. This is useful to ignore in 1033 at the beginning. This is useful to ignore initialization code.
1098 1034
1099 --itrace=i0nss1000000 1035 --itrace=i0nss1000000
1100 1036
1101 skips the first million instructions. 1037 skips the first million instructions.
1102 1038
1103 The q option changes the way the trace is dec 1039 The q option changes the way the trace is decoded. The decoding is much faster
1104 but much less detailed. Specifically, with t 1040 but much less detailed. Specifically, with the q option, the decoder does not
1105 decode TNT packets, and does not walk object 1041 decode TNT packets, and does not walk object code, but gets the ip from FUP and
1106 TIP packets. The q option can be used with t 1042 TIP packets. The q option can be used with the b and i options but the period
1107 is not used. The q option decodes more quick 1043 is not used. The q option decodes more quickly, but is useful only if the
1108 control flow of interest is represented or in 1044 control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or
1109 TIP.PGD packets (refer below). However the q 1045 TIP.PGD packets (refer below). However the q option could be used to find time
1110 ranges that could then be decoded fully using 1046 ranges that could then be decoded fully using the --time option.
1111 1047
1112 What will *not* be decoded with the (single) 1048 What will *not* be decoded with the (single) q option:
1113 1049
1114 - direct calls and jmps 1050 - direct calls and jmps
1115 - conditional branches 1051 - conditional branches
1116 - non-branch instructions 1052 - non-branch instructions
1117 1053
1118 What *will* be decoded with the (single) q op 1054 What *will* be decoded with the (single) q option:
1119 1055
1120 - asynchronous branches such as inter 1056 - asynchronous branches such as interrupts
1121 - indirect branches 1057 - indirect branches
1122 - function return target address *if* 1058 - function return target address *if* the noretcomp config term (refer
1123 config terms section) was used 1059 config terms section) was used
1124 - start of (control-flow) tracing 1060 - start of (control-flow) tracing
1125 - end of (control-flow) tracing, if i 1061 - end of (control-flow) tracing, if it is not out of context
1126 - power events, ptwrite, transaction 1062 - power events, ptwrite, transaction start and abort
1127 - instruction pointer associated with 1063 - instruction pointer associated with PSB packets
1128 1064
1129 Note the q option does not specify what event 1065 Note the q option does not specify what events will be synthesized e.g. the p
1130 option must be used also to show power events 1066 option must be used also to show power events.
1131 1067
1132 Repeating the q option (double-q i.e. qq) res 1068 Repeating the q option (double-q i.e. qq) results in even faster decoding and even
1133 less detail. The decoder decodes only extend 1069 less detail. The decoder decodes only extended PSB (PSB+) packets, getting the
1134 instruction pointer if there is a FUP packet 1070 instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and
1135 PSBEND). Note PSB packets occur regularly in 1071 PSBEND). Note PSB packets occur regularly in the trace based on the psb_period
1136 config term (refer config terms section). Th 1072 config term (refer config terms section). There will be a FUP packet if the
1137 PSB+ occurs while control flow is being trace 1073 PSB+ occurs while control flow is being traced.
1138 1074
1139 What will *not* be decoded with the qq option 1075 What will *not* be decoded with the qq option:
1140 1076
1141 - everything except instruction point 1077 - everything except instruction pointer associated with PSB packets
1142 1078
1143 What *will* be decoded with the qq option: 1079 What *will* be decoded with the qq option:
1144 1080
1145 - instruction pointer associated with 1081 - instruction pointer associated with PSB packets
1146 1082
1147 The Z option is equivalent to having recorded 1083 The Z option is equivalent to having recorded a trace without TSC
1148 (i.e. config term tsc=0). It can be useful to 1084 (i.e. config term tsc=0). It can be useful to avoid timestamp issues when
1149 decoding a trace of a virtual machine. 1085 decoding a trace of a virtual machine.
1150 1086
1151 1087
1152 dlfilter-show-cycles.so 1088 dlfilter-show-cycles.so
1153 ~~~~~~~~~~~~~~~~~~~~~~~ 1089 ~~~~~~~~~~~~~~~~~~~~~~~
1154 1090
1155 Cycles can be displayed using dlfilter-show-c 1091 Cycles can be displayed using dlfilter-show-cycles.so in which case the itrace A
1156 option can be useful to provide higher granul 1092 option can be useful to provide higher granularity cycle information:
1157 1093
1158 perf script --itrace=A --call-trace - 1094 perf script --itrace=A --call-trace --dlfilter dlfilter-show-cycles.so
1159 1095
1160 To see a list of dlfilters: 1096 To see a list of dlfilters:
1161 1097
1162 perf script -v --list-dlfilters 1098 perf script -v --list-dlfilters
1163 1099
1164 See also linkperf:perf-dlfilters[1] 1100 See also linkperf:perf-dlfilters[1]
1165 1101
1166 1102
1167 dump option 1103 dump option
1168 ~~~~~~~~~~~ 1104 ~~~~~~~~~~~
1169 1105
1170 perf script has an option (-D) to "dump" the 1106 perf script has an option (-D) to "dump" the events i.e. display the binary
1171 data. 1107 data.
1172 1108
1173 When -D is used, Intel PT packets are display 1109 When -D is used, Intel PT packets are displayed. The packet decoder does not
1174 pay attention to PSB packets, but just decode 1110 pay attention to PSB packets, but just decodes the bytes - so the packets seen
1175 by the actual decoder may not be identical in 1111 by the actual decoder may not be identical in places where the data is corrupt.
1176 One example of that would be when the buffer- 1112 One example of that would be when the buffer-switching interrupt has been too
1177 slow, and the buffer has been filled complete 1113 slow, and the buffer has been filled completely. In that case, the last packet
1178 in the buffer might be truncated and immediat 1114 in the buffer might be truncated and immediately followed by a PSB as the trace
1179 continues in the next buffer. 1115 continues in the next buffer.
1180 1116
1181 To disable the display of Intel PT packets, c 1117 To disable the display of Intel PT packets, combine the -D option with
1182 --no-itrace. 1118 --no-itrace.
1183 1119
1184 1120
1185 perf report 1121 perf report
1186 ----------- 1122 -----------
1187 1123
1188 By default, perf report will decode trace dat 1124 By default, perf report will decode trace data found in the perf.data file.
1189 This can be further controlled by new option 1125 This can be further controlled by new option --itrace exactly the same as
1190 perf script, with the exception that the defa 1126 perf script, with the exception that the default is --itrace=igxe.
1191 1127
1192 1128
1193 perf inject 1129 perf inject
1194 ----------- 1130 -----------
1195 1131
1196 perf inject also accepts the --itrace option 1132 perf inject also accepts the --itrace option in which case tracing data is
1197 removed and replaced with the synthesized eve 1133 removed and replaced with the synthesized events. e.g.
1198 1134
1199 perf inject --itrace -i perf.data -o 1135 perf inject --itrace -i perf.data -o perf.data.new
1200 1136
1201 Below is an example of using Intel PT with au 1137 Below is an example of using Intel PT with autofdo. It requires autofdo
1202 (https://github.com/google/autofdo) and gcc v 1138 (https://github.com/google/autofdo) and gcc version 5. The bubble
1203 sort example is from the AutoFDO tutorial (ht 1139 sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial)
1204 amended to take the number of elements as a p 1140 amended to take the number of elements as a parameter.
1205 1141
1206 $ gcc-5 -O3 sort.c -o sort_optimized 1142 $ gcc-5 -O3 sort.c -o sort_optimized
1207 $ ./sort_optimized 30000 1143 $ ./sort_optimized 30000
1208 Bubble sorting array of 30000 element 1144 Bubble sorting array of 30000 elements
1209 2254 ms 1145 2254 ms
1210 1146
1211 $ cat ~/.perfconfig 1147 $ cat ~/.perfconfig
1212 [intel-pt] 1148 [intel-pt]
1213 mispred-all = on 1149 mispred-all = on
1214 1150
1215 $ perf record -e intel_pt//u ./sort 3 1151 $ perf record -e intel_pt//u ./sort 3000
1216 Bubble sorting array of 3000 elements 1152 Bubble sorting array of 3000 elements
1217 58 ms 1153 58 ms
1218 [ perf record: Woken up 2 times to wr 1154 [ perf record: Woken up 2 times to write data ]
1219 [ perf record: Captured and wrote 3.9 1155 [ perf record: Captured and wrote 3.939 MB perf.data ]
1220 $ perf inject -i perf.data -o inj --i 1156 $ perf inject -i perf.data -o inj --itrace=i100usle --strip
1221 $ ./create_gcov --binary=./sort --pro 1157 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1
1222 $ gcc-5 -O3 -fauto-profile=sort.gcov 1158 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
1223 $ ./sort_autofdo 30000 1159 $ ./sort_autofdo 30000
1224 Bubble sorting array of 30000 element 1160 Bubble sorting array of 30000 elements
1225 2155 ms 1161 2155 ms
1226 1162
1227 Note there is currently no advantage to using 1163 Note there is currently no advantage to using Intel PT instead of LBR, but
1228 that may change in the future if greater use 1164 that may change in the future if greater use is made of the data.
1229 1165
1230 1166
1231 PEBS via Intel PT 1167 PEBS via Intel PT
1232 ----------------- 1168 -----------------
1233 1169
1234 Some hardware has the feature to redirect PEB 1170 Some hardware has the feature to redirect PEBS records to the Intel PT trace.
1235 Recording is selected by using the aux-output 1171 Recording is selected by using the aux-output config term e.g.
1236 1172
1237 perf record -c 10000 -e '{intel_pt/br 1173 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname
1238 1174
1239 Originally, software only supported redirecti 1175 Originally, software only supported redirecting at most one PEBS event because it
1240 was not able to differentiate one event from 1176 was not able to differentiate one event from another. To overcome that, more recent
1241 kernels and perf tools add support for the PE 1177 kernels and perf tools add support for the PERF_RECORD_AUX_OUTPUT_HW_ID side-band event.
1242 To check for the presence of that event in a 1178 To check for the presence of that event in a PEBS-via-PT trace:
1243 1179
1244 perf script -D --no-itrace | grep PER 1180 perf script -D --no-itrace | grep PERF_RECORD_AUX_OUTPUT_HW_ID
1245 1181
1246 To display PEBS events from the Intel PT trac 1182 To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g.
1247 1183
1248 perf script --itrace=oe 1184 perf script --itrace=oe
1249 1185
1250 XED 1186 XED
1251 --- 1187 ---
1252 1188
1253 include::build-xed.txt[] 1189 include::build-xed.txt[]
1254 1190
1255 1191
1256 Tracing Virtual Machines (kernel only) !! 1192 Tracing Virtual Machines
1257 -------------------------------------- !! 1193 ------------------------
1258 1194
1259 Currently, kernel tracing is supported with e !! 1195 Currently, only kernel tracing is supported and only with either "timeless" decoding
1260 (i.e. no TSC timestamps) or VM Time Correlati 1196 (i.e. no TSC timestamps) or VM Time Correlation. VM Time Correlation is an extra step
1261 using 'perf inject' and requires unchanging V 1197 using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling.
1262 1198
1263 Other limitations and caveats 1199 Other limitations and caveats
1264 1200
1265 VMX controls may suppress packets needed for 1201 VMX controls may suppress packets needed for decoding resulting in decoding errors
1266 VMX controls may block the perf NMI to the h 1202 VMX controls may block the perf NMI to the host potentially resulting in lost trace data
1267 Guest kernel self-modifying code (e.g. jump 1203 Guest kernel self-modifying code (e.g. jump labels or JIT-compiled eBPF) will result in decoding errors
1268 Guest thread information is unknown 1204 Guest thread information is unknown
1269 Guest VCPU is unknown but may be able to be 1205 Guest VCPU is unknown but may be able to be inferred from the host thread
1270 Callchains are not supported 1206 Callchains are not supported
1271 1207
1272 Example using "timeless" decoding 1208 Example using "timeless" decoding
1273 1209
1274 Start VM 1210 Start VM
1275 1211
1276 $ sudo virsh start kubuntu20.04 1212 $ sudo virsh start kubuntu20.04
1277 Domain kubuntu20.04 started 1213 Domain kubuntu20.04 started
1278 1214
1279 Mount the guest file system. Note sshfs need 1215 Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore.
1280 1216
1281 $ mkdir vm0 1217 $ mkdir vm0
1282 $ sshfs -o direct_io root@vm0:/ vm0 1218 $ sshfs -o direct_io root@vm0:/ vm0
1283 1219
1284 Copy the guest /proc/kallsyms, /proc/modules 1220 Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore
1285 1221
1286 $ perf buildid-cache -v --kcore vm0/proc/kco 1222 $ perf buildid-cache -v --kcore vm0/proc/kcore
1287 kcore added to build-id cache directory /hom 1223 kcore added to build-id cache directory /home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306
1288 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/ 1224 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306/kallsyms
1289 1225
1290 Find the VM process 1226 Find the VM process
1291 1227
1292 $ ps -eLl | grep 'KVM\|PID' 1228 $ ps -eLl | grep 'KVM\|PID'
1293 F S UID PID PPID LWP C PRI NI 1229 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD
1294 3 S 64055 1430 1 1440 1 80 0 1230 3 S 64055 1430 1 1440 1 80 0 - 1921718 - ? 00:02:47 CPU 0/KVM
1295 3 S 64055 1430 1 1441 1 80 0 1231 3 S 64055 1430 1 1441 1 80 0 - 1921718 - ? 00:02:41 CPU 1/KVM
1296 3 S 64055 1430 1 1442 1 80 0 1232 3 S 64055 1430 1 1442 1 80 0 - 1921718 - ? 00:02:38 CPU 2/KVM
1297 3 S 64055 1430 1 1443 2 80 0 1233 3 S 64055 1430 1 1443 2 80 0 - 1921718 - ? 00:03:18 CPU 3/KVM
1298 1234
1299 Start an open-ended perf record, tracing the 1235 Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop.
1300 TSC is not supported and tsc=0 must be specif 1236 TSC is not supported and tsc=0 must be specified. That means mtc is useless, so add mtc=0.
1301 However, IPC can still be determined, hence c 1237 However, IPC can still be determined, hence cyc=1 can be added.
1302 Only kernel decoding is supported, so 'k' mus 1238 Only kernel decoding is supported, so 'k' must be specified.
1303 Intel PT traces both the host and the guest s 1239 Intel PT traces both the host and the guest so --guest and --host need to be specified.
1304 Without timestamps, --per-thread must be spec 1240 Without timestamps, --per-thread must be specified to distinguish threads.
1305 1241
1306 $ sudo perf kvm --guest --host --guestkallsy 1242 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/tsc=0,mtc=0,cyc=1/k -p 1430 --per-thread
1307 ^C 1243 ^C
1308 [ perf record: Woken up 1 times to write dat 1244 [ perf record: Woken up 1 times to write data ]
1309 [ perf record: Captured and wrote 5.829 MB ] 1245 [ perf record: Captured and wrote 5.829 MB ]
1310 1246
1311 perf script can be used to provide an instruc 1247 perf script can be used to provide an instruction trace
1312 1248
1313 $ perf script --guestkallsyms $KALLSYMS --in !! 1249 $ perf script --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21
1314 CPU 0/KVM 1440 ffffffff82133cdd __vm 1250 CPU 0/KVM 1440 ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9
1315 CPU 0/KVM 1440 ffffffff82133ce1 __vm 1251 CPU 0/KVM 1440 ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10
1316 CPU 0/KVM 1440 ffffffff82133ce5 __vm 1252 CPU 0/KVM 1440 ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11
1317 CPU 0/KVM 1440 ffffffff82133ce9 __vm 1253 CPU 0/KVM 1440 ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12
1318 CPU 0/KVM 1440 ffffffff82133ced __vm 1254 CPU 0/KVM 1440 ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13
1319 CPU 0/KVM 1440 ffffffff82133cf1 __vm 1255 CPU 0/KVM 1440 ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14
1320 CPU 0/KVM 1440 ffffffff82133cf5 __vm 1256 CPU 0/KVM 1440 ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15
1321 CPU 0/KVM 1440 ffffffff82133cf9 __vm 1257 CPU 0/KVM 1440 ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax
1322 CPU 0/KVM 1440 ffffffff82133cfc __vm 1258 CPU 0/KVM 1440 ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40
1323 CPU 0/KVM 1440 ffffffff82133c40 vmx_ 1259 CPU 0/KVM 1440 ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46
1324 CPU 0/KVM 1440 ffffffff82133c42 vmx_ 1260 CPU 0/KVM 1440 ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.11 (50/445)
1325 :1440 1440 ffffffffbb678b06 nati 1261 :1440 1440 ffffffffbb678b06 native_write_msr+0x6 ([guest.kernel.kallsyms]) nopl %eax, (%rax,%rax,1)
1326 :1440 1440 ffffffffbb678b0b nati 1262 :1440 1440 ffffffffbb678b0b native_write_msr+0xb ([guest.kernel.kallsyms]) retq IPC: 0.04 (2/41)
1327 :1440 1440 ffffffffbb666646 lapi 1263 :1440 1440 ffffffffbb666646 lapic_next_deadline+0x26 ([guest.kernel.kallsyms]) data16 nop
1328 :1440 1440 ffffffffbb666648 lapi 1264 :1440 1440 ffffffffbb666648 lapic_next_deadline+0x28 ([guest.kernel.kallsyms]) xor %eax, %eax
1329 :1440 1440 ffffffffbb66664a lapi 1265 :1440 1440 ffffffffbb66664a lapic_next_deadline+0x2a ([guest.kernel.kallsyms]) popq %rbp
1330 :1440 1440 ffffffffbb66664b lapi 1266 :1440 1440 ffffffffbb66664b lapic_next_deadline+0x2b ([guest.kernel.kallsyms]) retq IPC: 0.16 (4/25)
1331 :1440 1440 ffffffffbb74607f cloc 1267 :1440 1440 ffffffffbb74607f clockevents_program_event+0x8f ([guest.kernel.kallsyms]) test %eax, %eax
1332 :1440 1440 ffffffffbb746081 cloc 1268 :1440 1440 ffffffffbb746081 clockevents_program_event+0x91 ([guest.kernel.kallsyms]) jz 0xffffffffbb74603c IPC: 0.06 (2/30)
1333 :1440 1440 ffffffffbb74603c cloc 1269 :1440 1440 ffffffffbb74603c clockevents_program_event+0x4c ([guest.kernel.kallsyms]) popq %rbx
1334 :1440 1440 ffffffffbb74603d cloc 1270 :1440 1440 ffffffffbb74603d clockevents_program_event+0x4d ([guest.kernel.kallsyms]) popq %r12
1335 1271
1336 Example using VM Time Correlation 1272 Example using VM Time Correlation
1337 1273
1338 Start VM 1274 Start VM
1339 1275
1340 $ sudo virsh start kubuntu20.04 1276 $ sudo virsh start kubuntu20.04
1341 Domain kubuntu20.04 started 1277 Domain kubuntu20.04 started
1342 1278
1343 Mount the guest file system. Note sshfs need 1279 Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore.
1344 1280
1345 $ mkdir -p vm0 1281 $ mkdir -p vm0
1346 $ sshfs -o direct_io root@vm0:/ vm0 1282 $ sshfs -o direct_io root@vm0:/ vm0
1347 1283
1348 Copy the guest /proc/kallsyms, /proc/modules 1284 Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore
1349 1285
1350 $ perf buildid-cache -v --kcore vm0/proc/kco 1286 $ perf buildid-cache -v --kcore vm0/proc/kcore
1351 same kcore found in /home/user/.debug/[kerne 1287 same kcore found in /home/user/.debug/[kernel.kcore]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777
1352 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\ 1288 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777/kallsyms
1353 1289
1354 Find the VM process 1290 Find the VM process
1355 1291
1356 $ ps -eLl | grep 'KVM\|PID' 1292 $ ps -eLl | grep 'KVM\|PID'
1357 F S UID PID PPID LWP C PRI NI 1293 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD
1358 3 S 64055 16998 1 17005 13 80 0 1294 3 S 64055 16998 1 17005 13 80 0 - 1818189 - ? 00:00:16 CPU 0/KVM
1359 3 S 64055 16998 1 17006 4 80 0 1295 3 S 64055 16998 1 17006 4 80 0 - 1818189 - ? 00:00:05 CPU 1/KVM
1360 3 S 64055 16998 1 17007 3 80 0 1296 3 S 64055 16998 1 17007 3 80 0 - 1818189 - ? 00:00:04 CPU 2/KVM
1361 3 S 64055 16998 1 17008 4 80 0 1297 3 S 64055 16998 1 17008 4 80 0 - 1818189 - ? 00:00:05 CPU 3/KVM
1362 1298
1363 Start an open-ended perf record, tracing the 1299 Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop.
1364 IPC can be determined, hence cyc=1 can be add 1300 IPC can be determined, hence cyc=1 can be added.
1365 Only kernel decoding is supported, so 'k' mus 1301 Only kernel decoding is supported, so 'k' must be specified.
1366 Intel PT traces both the host and the guest s 1302 Intel PT traces both the host and the guest so --guest and --host need to be specified.
1367 1303
1368 $ sudo perf kvm --guest --host --guestkallsy 1304 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/cyc=1/k -p 16998
1369 ^C[ perf record: Woken up 1 times to write d 1305 ^C[ perf record: Woken up 1 times to write data ]
1370 [ perf record: Captured and wrote 9.041 MB p 1306 [ perf record: Captured and wrote 9.041 MB perf.data.kvm ]
1371 1307
1372 Now 'perf inject' can be used to determine th 1308 Now 'perf inject' can be used to determine the VMX TCS Offset. Note, Intel PT TSC packets are
1373 only 7-bytes, so the TSC Offset might differ 1309 only 7-bytes, so the TSC Offset might differ from the actual value in the 8th byte. That will
1374 have no effect i.e. the resulting timestamps 1310 have no effect i.e. the resulting timestamps will be correct anyway.
1375 1311
1376 $ perf inject -i perf.data.kvm --vm-time-cor 1312 $ perf inject -i perf.data.kvm --vm-time-correlation=dry-run
1377 ERROR: Unknown TSC Offset for VMCS 0x1bff6a 1313 ERROR: Unknown TSC Offset for VMCS 0x1bff6a
1378 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c4 1314 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c41
1379 ERROR: Unknown TSC Offset for VMCS 0x1cbc08 1315 ERROR: Unknown TSC Offset for VMCS 0x1cbc08
1380 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c4 1316 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c41
1381 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8 1317 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8
1382 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c4 1318 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c41
1383 ERROR: Unknown TSC Offset for VMCS 0x1cbce9 1319 ERROR: Unknown TSC Offset for VMCS 0x1cbce9
1384 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c4 1320 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c41
1385 1321
1386 Each virtual CPU has a different Virtual Mach 1322 Each virtual CPU has a different Virtual Machine Control Structure (VMCS)
1387 shown above with the calculated TSC Offset. F 1323 shown above with the calculated TSC Offset. For an unchanging TSC Offset
1388 they should all be the same for the same virt 1324 they should all be the same for the same virtual machine.
1389 1325
1390 Now that the TSC Offset is known, it can be p 1326 Now that the TSC Offset is known, it can be provided to 'perf inject'
1391 1327
1392 $ perf inject -i perf.data.kvm --vm-time-cor 1328 $ perf inject -i perf.data.kvm --vm-time-correlation="dry-run 0xffffe42722c64c41"
1393 1329
1394 Note the options for 'perf inject' --vm-time- 1330 Note the options for 'perf inject' --vm-time-correlation are:
1395 1331
1396 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <V 1332 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <VMCS> ]... ] ]...
1397 1333
1398 So it is possible to specify different TSC Of 1334 So it is possible to specify different TSC Offsets for different VMCS.
1399 The option "dry-run" will cause the file to b 1335 The option "dry-run" will cause the file to be processed but without updating it.
1400 Note it is also possible to get a intel_pt.lo 1336 Note it is also possible to get a intel_pt.log file by adding option --itrace=d
1401 1337
1402 There were no errors so, do it for real 1338 There were no errors so, do it for real
1403 1339
1404 $ perf inject -i perf.data.kvm --vm-time-cor 1340 $ perf inject -i perf.data.kvm --vm-time-correlation=0xffffe42722c64c41 --force
1405 1341
1406 'perf script' can be used to see if there are 1342 'perf script' can be used to see if there are any decoder errors
1407 1343
1408 $ perf script -i perf.data.kvm --guestkallsy 1344 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --itrace=e-o
1409 1345
1410 There were none. 1346 There were none.
1411 1347
1412 'perf script' can be used to provide an instr 1348 'perf script' can be used to provide an instruction trace showing timestamps
1413 1349
1414 $ perf script -i perf.data.kvm --guestkallsy !! 1350 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21
1415 CPU 1/KVM 17006 [001] 11500.262865593: 1351 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9
1416 CPU 1/KVM 17006 [001] 11500.262865593: 1352 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10
1417 CPU 1/KVM 17006 [001] 11500.262865593: 1353 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11
1418 CPU 1/KVM 17006 [001] 11500.262865593: 1354 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12
1419 CPU 1/KVM 17006 [001] 11500.262865593: 1355 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13
1420 CPU 1/KVM 17006 [001] 11500.262865593: 1356 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14
1421 CPU 1/KVM 17006 [001] 11500.262865593: 1357 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15
1422 CPU 1/KVM 17006 [001] 11500.262865593: 1358 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax
1423 CPU 1/KVM 17006 [001] 11500.262865593: 1359 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40
1424 CPU 1/KVM 17006 [001] 11500.262865593: 1360 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46
1425 CPU 1/KVM 17006 [001] 11500.262866075: 1361 CPU 1/KVM 17006 [001] 11500.262866075: ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.05 (40/769)
1426 :17006 17006 [001] 11500.262869216: 1362 :17006 17006 [001] 11500.262869216: ffffffff82200cb0 asm_sysvec_apic_timer_interrupt+0x0 ([guest.kernel.kallsyms]) clac
1427 :17006 17006 [001] 11500.262869216: 1363 :17006 17006 [001] 11500.262869216: ffffffff82200cb3 asm_sysvec_apic_timer_interrupt+0x3 ([guest.kernel.kallsyms]) pushq $0xffffffffffffffff
1428 :17006 17006 [001] 11500.262869216: 1364 :17006 17006 [001] 11500.262869216: ffffffff82200cb5 asm_sysvec_apic_timer_interrupt+0x5 ([guest.kernel.kallsyms]) callq 0xffffffff82201160
1429 :17006 17006 [001] 11500.262869216: 1365 :17006 17006 [001] 11500.262869216: ffffffff82201160 error_entry+0x0 ([guest.kernel.kallsyms]) cld
1430 :17006 17006 [001] 11500.262869216: 1366 :17006 17006 [001] 11500.262869216: ffffffff82201161 error_entry+0x1 ([guest.kernel.kallsyms]) pushq %rsi
1431 :17006 17006 [001] 11500.262869216: 1367 :17006 17006 [001] 11500.262869216: ffffffff82201162 error_entry+0x2 ([guest.kernel.kallsyms]) movq 0x8(%rsp), %rsi
1432 :17006 17006 [001] 11500.262869216: 1368 :17006 17006 [001] 11500.262869216: ffffffff82201167 error_entry+0x7 ([guest.kernel.kallsyms]) movq %rdi, 0x8(%rsp)
1433 :17006 17006 [001] 11500.262869216: 1369 :17006 17006 [001] 11500.262869216: ffffffff8220116c error_entry+0xc ([guest.kernel.kallsyms]) pushq %rdx
1434 :17006 17006 [001] 11500.262869216: 1370 :17006 17006 [001] 11500.262869216: ffffffff8220116d error_entry+0xd ([guest.kernel.kallsyms]) pushq %rcx
1435 :17006 17006 [001] 11500.262869216: 1371 :17006 17006 [001] 11500.262869216: ffffffff8220116e error_entry+0xe ([guest.kernel.kallsyms]) pushq %rax
1436 1372
1437 <<
1438 Tracing Virtual Machines (including user spac <<
1439 --------------------------------------------- <<
1440 <<
1441 It is possible to use perf record to record s <<
1442 Sideband events from the guest perf.data file <<
1443 <<
1444 Here is an example of the steps needed: <<
1445 <<
1446 On the guest machine: <<
1447 <<
1448 Check that no-kvmclock kernel command line op <<
1449 <<
1450 Note, this is essential to enable time correl <<
1451 <<
1452 $ cat /proc/cmdline <<
1453 BOOT_IMAGE=/boot/vmlinuz-5.10.0-16-amd64 roo <<
1454 <<
1455 There is no BPF support at present so, if pos <<
1456 <<
1457 $ echo 0 | sudo tee /proc/sys/net/core/bpf_j <<
1458 0 <<
1459 <<
1460 Start perf record to collect sideband events: <<
1461 <<
1462 $ sudo perf record -o guest-sideband-testing <<
1463 <<
1464 On the host machine: <<
1465 <<
1466 Start perf record to collect Intel PT trace: <<
1467 <<
1468 Note, the host trace will get very big, very <<
1469 <<
1470 $ sudo perf record -o guest-sideband-testing <<
1471 <<
1472 On the guest machine: <<
1473 <<
1474 Run a small test case, just 'uname' in this e <<
1475 <<
1476 $ uname <<
1477 Linux <<
1478 <<
1479 On the host machine: <<
1480 <<
1481 Stop the Intel PT trace: <<
1482 <<
1483 ^C <<
1484 [ perf record: Woken up 1 times to write dat <<
1485 [ perf record: Captured and wrote 76.122 MB <<
1486 <<
1487 On the guest machine: <<
1488 <<
1489 Stop the Intel PT trace: <<
1490 <<
1491 ^C <<
1492 [ perf record: Woken up 1 times to write dat <<
1493 [ perf record: Captured and wrote 1.247 MB g <<
1494 <<
1495 And then copy guest-sideband-testing-guest-pe <<
1496 <<
1497 On the host machine: <<
1498 <<
1499 With the 2 perf.data recordings, and with the <<
1500 <<
1501 Identify the TSC Offset: <<
1502 <<
1503 $ perf inject -i guest-sideband-testing-host <<
1504 VMCS: 0x103fc6 TSC Offset 0xfffffa6ae070cb2 <<
1505 VMCS: 0x103ff2 TSC Offset 0xfffffa6ae070cb2 <<
1506 VMCS: 0x10fdaa TSC Offset 0xfffffa6ae070cb2 <<
1507 VMCS: 0x24d57c TSC Offset 0xfffffa6ae070cb2 <<
1508 <<
1509 Correct Intel PT TSC timestamps for the guest <<
1510 <<
1511 $ perf inject -i guest-sideband-testing-host <<
1512 <<
1513 Identify the guest machine PID: <<
1514 <<
1515 $ perf script -i guest-sideband-testing-host <<
1516 CPU 0/KVM 0 [000] 0.000000: PE <<
1517 CPU 1/KVM 0 [000] 0.000000: PE <<
1518 CPU 2/KVM 0 [000] 0.000000: PE <<
1519 CPU 3/KVM 0 [000] 0.000000: PE <<
1520 <<
1521 Note, the QEMU option -name debug-threads=on <<
1522 can be used to determine which thread is runn <<
1523 <<
1524 Create a guestmount, assuming the guest machi <<
1525 <<
1526 $ mkdir -p ~/guestmount/13376 <<
1527 $ sshfs -o direct_io vm_to_test:/ ~/guestmou <<
1528 <<
1529 Inject the guest perf.data file into the host <<
1530 <<
1531 Note, due to the guestmount option, guest obj <<
1532 If needed, VDSO can be copied manually in a f <<
1533 <<
1534 $ perf inject -i guest-sideband-testing-host <<
1535 <<
1536 Show an excerpt from the result. In this cas <<
1537 <<
1538 Notes: <<
1539 <<
1540 - the CPU displayed, [002] in this ca <<
1541 - events happening in the virtual mac <<
1542 - only calls and errors are displayed <<
1543 - branches entering and exiting the v <<
1544 <<
1545 $ perf script -i inj --itrace=ce -F+machine_ <<
1546 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1547 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1548 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1549 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1550 VM:13376 VCPU:003 uname 3404/340 <<
1551 VM:13376 VCPU:003 uname 3404/340 <<
1552 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1553 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1554 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1555 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1556 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1557 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1558 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1559 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1560 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1561 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1562 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1563 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1564 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1565 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1566 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1567 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1568 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1569 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1570 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1571 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1572 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1573 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1574 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1575 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1576 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1577 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1578 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1579 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1580 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1581 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1582 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1583 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1584 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1585 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1586 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1587 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1588 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1589 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1590 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1591 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1592 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1593 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1594 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1595 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1596 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1597 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1598 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1599 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1600 CPU 3/KVM 13376/13384 [002] 7919.4088 <<
1601 VM:13376 VCPU:003 uname 3404/340 <<
1602 VM:13376 VCPU:003 uname 3404/340 <<
1603 VM:13376 VCPU:003 uname 3404/340 <<
1604 VM:13376 VCPU:003 uname 3404/340 <<
1605 VM:13376 VCPU:003 uname 3404/340 <<
1606 VM:13376 VCPU:003 uname 3404/340 <<
1607 VM:13376 VCPU:003 uname 3404/340 <<
1608 VM:13376 VCPU:003 uname 3404/340 <<
1609 <<
1610 <<
1611 Tracing Virtual Machines - Guest Code <<
1612 ------------------------------------- <<
1613 <<
1614 A common case for KVM test programs is that t <<
1615 hypervisor, creating, running and destroying <<
1616 providing the guest object code from its own <<
1617 the VM is not running an OS, but only the fun <<
1618 hypervisor test program, and conveniently, lo <<
1619 addresses. To support that, option "--guest-c <<
1620 and perf kvm report. <<
1621 <<
1622 Here is an example tracing a test program fro <<
1623 <<
1624 # perf record --kcore -e intel_pt/cyc/ -- to <<
1625 [ perf record: Woken up 1 times to write dat <<
1626 [ perf record: Captured and wrote 0.280 MB p <<
1627 # perf script --guest-code --itrace=bep --ns <<
1628 [SNIP] <<
1629 tsc_msrs_test 18436 [007] 10897.962087733: <<
1630 tsc_msrs_test 18436 [007] 10897.962087733: <<
1631 tsc_msrs_test 18436 [007] 10897.962087733: <<
1632 tsc_msrs_test 18436 [007] 10897.962087836: <<
1633 [guest/18436] 18436 [007] 10897.962087836: <<
1634 [guest/18436] 18436 [007] 10897.962087836: <<
1635 [guest/18436] 18436 [007] 10897.962088248: <<
1636 tsc_msrs_test 18436 [007] 10897.962088248: <<
1637 tsc_msrs_test 18436 [007] 10897.962088248: <<
1638 tsc_msrs_test 18436 [007] 10897.962088256: <<
1639 tsc_msrs_test 18436 [007] 10897.962088270: <<
1640 [SNIP] <<
1641 tsc_msrs_test 18436 [007] 10897.962089321: <<
1642 tsc_msrs_test 18436 [007] 10897.962089321: <<
1643 tsc_msrs_test 18436 [007] 10897.962089321: <<
1644 tsc_msrs_test 18436 [007] 10897.962089424: <<
1645 [guest/18436] 18436 [007] 10897.962089424: <<
1646 [guest/18436] 18436 [007] 10897.962089701: <<
1647 [guest/18436] 18436 [007] 10897.962089701: <<
1648 [guest/18436] 18436 [007] 10897.962089701: <<
1649 [guest/18436] 18436 [007] 10897.962089701: <<
1650 [guest/18436] 18436 [007] 10897.962089878: <<
1651 tsc_msrs_test 18436 [007] 10897.962089878: <<
1652 tsc_msrs_test 18436 [007] 10897.962089878: <<
1653 tsc_msrs_test 18436 [007] 10897.962089887: <<
1654 tsc_msrs_test 18436 [007] 10897.962089901: <<
1655 [SNIP] <<
1656 <<
1657 # perf kvm --guest-code --guest --host repor <<
1658 <<
1659 # To display the perf.data header info, plea <<
1660 # <<
1661 # <<
1662 # Total Lost Samples: 0 <<
1663 # <<
1664 # Samples: 12 of event 'instructions' <<
1665 # Event count (approx.): 2274583 <<
1666 # <<
1667 # Children Self Command Shared <<
1668 # ........ ........ ............. ....... <<
1669 # <<
1670 54.70% 0.00% tsc_msrs_test [kernel. <<
1671 | <<
1672 ---entry_SYSCALL_64_after_hwframe <<
1673 do_syscall_64 <<
1674 | <<
1675 |--29.44%--syscall_exit_to_use <<
1676 | exit_to_user_mode_p <<
1677 | task_work_run <<
1678 | __fput <<
1679 <<
1680 <<
1681 Event Trace <<
1682 ----------- <<
1683 <<
1684 Event Trace records information about asynchr <<
1685 faults, VM exits and entries. The informatio <<
1686 and also the Interrupt Flag is recorded on th <<
1687 contains a type field to identify one of the <<
1688 <<
1689 1 INTR interrupt, fa <<
1690 2 IRET interrupt ret <<
1691 3 SMI system manage <<
1692 4 RSM resume from s <<
1693 5 SIPI startup inter <<
1694 6 INIT INIT signal <<
1695 7 VMENTRY VM-Entry <<
1696 8 VMEXIT VM-Entry <<
1697 9 VMEXIT_INTR VM-Exit due t <<
1698 10 SHUTDOWN Shutdown <<
1699 <<
1700 For more details, refer to the Intel 64 and I <<
1701 Developer Manuals (version 076 or later). <<
1702 <<
1703 The capability to do Event Trace is indicated <<
1704 /sys/bus/event_source/devices/intel_pt/caps/e <<
1705 <<
1706 Event trace is selected for recording using t <<
1707 <<
1708 perf record -e intel_pt/event/u uname <<
1709 <<
1710 Event trace events are output using the --itr <<
1711 <<
1712 perf script --itrace=Ie <<
1713 <<
1714 perf script displays events containing CFE ty <<
1715 in the form: <<
1716 <<
1717 evt: hw int (t) cfe: <<
1718 <<
1719 The IP flag indicates if the event binds to a <<
1720 flow control packet generation is enabled, as <<
1721 set. <<
1722 <<
1723 perf script displays events containing change <<
1724 <<
1725 iflag: t IFLAG <<
1726 <<
1727 where "via branch" indicates a branch (interr <<
1728 "non branch" indicates an instruction such as <<
1729 <<
1730 In addition, the current state of the interru <<
1731 or absence of the "D" (interrupt disabled) pe <<
1732 flag is changed, then the "t" flag is also in <<
1733 <<
1734 no flag, interrupts enabled I <<
1735 t interrupts become disabled IF <<
1736 D interrupts are disabled IF=0 <<
1737 Dt interrupts become enabled IF <<
1738 <<
1739 The intel-pt-events.py script illustrates how <<
1740 using a Python script. <<
1741 <<
1742 <<
1743 TNT Disable <<
1744 ----------- <<
1745 <<
1746 TNT packets are disabled using the "notnt" co <<
1747 <<
1748 perf record -e intel_pt/notnt/u uname <<
1749 <<
1750 In that case the --itrace q option is forced <<
1751 to reconstruct the control flow is not possib <<
1752 <<
1753 <<
1754 Emulated PTWRITE <<
1755 ---------------- <<
1756 <<
1757 Later perf tools support a method to emulate <<
1758 can be useful if hardware does not support th <<
1759 <<
1760 Instead of using the ptwrite instruction, a f <<
1761 a trace that encodes the payload data into TN <<
1762 of the function: <<
1763 <<
1764 #include <stdint.h> <<
1765 <<
1766 void perf_emulate_ptwrite(uint64_t x) <<
1767 __attribute__((externally_visible, noipa, no <<
1768 <<
1769 #define PERF_EMULATE_PTWRITE_8_BITS \ <<
1770 "1: shl %rax\n" \ <<
1771 " jc 1f\n" \ <<
1772 "1: shl %rax\n" \ <<
1773 " jc 1f\n" \ <<
1774 "1: shl %rax\n" \ <<
1775 " jc 1f\n" \ <<
1776 "1: shl %rax\n" \ <<
1777 " jc 1f\n" \ <<
1778 "1: shl %rax\n" \ <<
1779 " jc 1f\n" \ <<
1780 "1: shl %rax\n" \ <<
1781 " jc 1f\n" \ <<
1782 "1: shl %rax\n" \ <<
1783 " jc 1f\n" \ <<
1784 "1: shl %rax\n" \ <<
1785 " jc 1f\n" <<
1786 <<
1787 /* Undefined instruction */ <<
1788 #define PERF_EMULATE_PTWRITE_UD2 ".by <<
1789 <<
1790 #define PERF_EMULATE_PTWRITE_MAGIC PE <<
1791 <<
1792 void perf_emulate_ptwrite(uint64_t x __attri <<
1793 { <<
1794 /* Assumes SysV ABI : x passed in r <<
1795 __asm__ volatile ( <<
1796 "jmp 1f\n" <<
1797 PERF_EMULATE_PTWRITE_MAGIC <<
1798 "1: mov %rdi, %rax\n" <<
1799 PERF_EMULATE_PTWRITE_8_BITS <<
1800 PERF_EMULATE_PTWRITE_8_BITS <<
1801 PERF_EMULATE_PTWRITE_8_BITS <<
1802 PERF_EMULATE_PTWRITE_8_BITS <<
1803 PERF_EMULATE_PTWRITE_8_BITS <<
1804 PERF_EMULATE_PTWRITE_8_BITS <<
1805 PERF_EMULATE_PTWRITE_8_BITS <<
1806 PERF_EMULATE_PTWRITE_8_BITS <<
1807 "1: ret\n" <<
1808 ); <<
1809 } <<
1810 <<
1811 For example, a test program with the function <<
1812 <<
1813 #include <stdio.h> <<
1814 #include <stdint.h> <<
1815 #include <stdlib.h> <<
1816 <<
1817 #include "perf_emulate_ptwrite.h" <<
1818 <<
1819 int main(int argc, char *argv[]) <<
1820 { <<
1821 uint64_t x = 0; <<
1822 <<
1823 if (argc > 1) <<
1824 x = strtoull(argv[1], NULL, <<
1825 perf_emulate_ptwrite(x); <<
1826 return 0; <<
1827 } <<
1828 <<
1829 Can be compiled and traced: <<
1830 <<
1831 $ gcc -Wall -Wextra -O3 -g -o eg_ptw eg_ptw. <<
1832 $ perf record -e intel_pt//u ./eg_ptw 0x1234 <<
1833 [ perf record: Woken up 1 times to write dat <<
1834 [ perf record: Captured and wrote 0.017 MB p <<
1835 $ perf script --itrace=ew <<
1836 eg_ptw 19875 [007] 8061.235912: <<
1837 $ <<
1838 <<
1839 <<
1840 Pipe mode <<
1841 --------- <<
1842 Pipe mode is a problem for Intel PT and possi <<
1843 It's not recommended to use a pipe as data ou <<
1844 of the following reason. <<
1845 <<
1846 Essentially the auxtrace buffers do not behav <<
1847 event buffers. That is because the head and <<
1848 software, but in the auxtrace case the data i <<
1849 So the head and tail do not get updated as da <<
1850 <<
1851 In the Intel PT case, the head and tail are u <<
1852 is disabled by software, for example: <<
1853 - full-trace, system wide : when buffer p <<
1854 - full-trace, not system-wide : when buff <<
1855 context s <<
1856 - snapshot mode : as above but also when <<
1857 - sample mode : as above but also when a <<
1858 <<
1859 That means finished-round ordering doesn't wo <<
1860 can turn up that has data that extends back i <<
1861 very beginning of tracing. <<
1862 <<
1863 For a perf.data file, that problem is solved <<
1864 and queuing up the auxtrace buffers in advanc <<
1865 <<
1866 For pipe mode, the order of events and timest <<
1867 be messed up. <<
1868 <<
1869 <<
1870 EXAMPLE <<
1871 ------- <<
1872 <<
1873 Examples can be found on perf wiki page "Perf <<
1874 <<
1875 https://perf.wiki.kernel.org/index.php/Perf_t <<
1876 1373
1877 1374
1878 SEE ALSO 1375 SEE ALSO
1879 -------- 1376 --------
1880 1377
1881 linkperf:perf-record[1], linkperf:perf-script 1378 linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1],
1882 linkperf:perf-inject[1] 1379 linkperf:perf-inject[1]
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.