1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Copyright(C) 2015 Linaro Limited. All right 3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@li 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 */ 5 */
6 6
7 #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__ 7 #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__
8 #define INCLUDE__UTIL_PERF_CS_ETM_H__ 8 #define INCLUDE__UTIL_PERF_CS_ETM_H__
9 9
10 #include "debug.h" <<
11 #include "util/event.h" 10 #include "util/event.h"
12 #include <linux/bits.h> 11 #include <linux/bits.h>
13 12
14 struct perf_session; 13 struct perf_session;
15 struct perf_pmu; <<
16 14
17 /* 15 /*
18 * Versioning header in case things need to ch 16 * Versioning header in case things need to change in the future. That way
19 * decoding of old snapshot is still possible. 17 * decoding of old snapshot is still possible.
20 */ 18 */
21 enum { 19 enum {
22 /* Starting with 0x0 */ 20 /* Starting with 0x0 */
23 CS_HEADER_VERSION, 21 CS_HEADER_VERSION,
24 /* PMU->type (32 bit), total # of CPUs 22 /* PMU->type (32 bit), total # of CPUs (32 bit) */
25 CS_PMU_TYPE_CPUS, 23 CS_PMU_TYPE_CPUS,
26 CS_ETM_SNAPSHOT, 24 CS_ETM_SNAPSHOT,
27 CS_HEADER_VERSION_MAX, 25 CS_HEADER_VERSION_MAX,
28 }; 26 };
29 27
30 /* 28 /*
31 * Update the version for new format. 29 * Update the version for new format.
32 * 30 *
33 * Version 1: format adds a param count to the !! 31 * New version 1 format adds a param count to the per cpu metadata.
34 * This allows easy adding of new metadata par 32 * This allows easy adding of new metadata parameters.
35 * Requires that new params always added after 33 * Requires that new params always added after current ones.
36 * Also allows client reader to handle file ve 34 * Also allows client reader to handle file versions that are different by
37 * checking the number of params in the file v 35 * checking the number of params in the file vs the number expected.
38 * <<
39 * Version 2: Drivers will use PERF_RECORD_AUX <<
40 * CoreSight Trace ID. ...TRACEIDR metadata wi <<
41 * but with addition flags. <<
42 */ 36 */
43 #define CS_HEADER_CURRENT_VERSION 2 !! 37 #define CS_HEADER_CURRENT_VERSION 1
44 38
45 /* Beginning of header common to both ETMv3 an 39 /* Beginning of header common to both ETMv3 and V4 */
46 enum { 40 enum {
47 CS_ETM_MAGIC, 41 CS_ETM_MAGIC,
48 CS_ETM_CPU, 42 CS_ETM_CPU,
49 /* Number of trace config params in fo 43 /* Number of trace config params in following ETM specific block */
50 CS_ETM_NR_TRC_PARAMS, 44 CS_ETM_NR_TRC_PARAMS,
51 CS_ETM_COMMON_BLK_MAX_V1, 45 CS_ETM_COMMON_BLK_MAX_V1,
52 }; 46 };
53 47
54 /* ETMv3/PTM metadata */ 48 /* ETMv3/PTM metadata */
55 enum { 49 enum {
56 /* Dynamic, configurable parameters */ 50 /* Dynamic, configurable parameters */
57 CS_ETM_ETMCR = CS_ETM_COMMON_BLK_MAX_V 51 CS_ETM_ETMCR = CS_ETM_COMMON_BLK_MAX_V1,
58 CS_ETM_ETMTRACEIDR, 52 CS_ETM_ETMTRACEIDR,
59 /* RO, taken from sysFS */ 53 /* RO, taken from sysFS */
60 CS_ETM_ETMCCER, 54 CS_ETM_ETMCCER,
61 CS_ETM_ETMIDR, 55 CS_ETM_ETMIDR,
62 CS_ETM_PRIV_MAX, 56 CS_ETM_PRIV_MAX,
63 }; 57 };
64 58
65 /* define fixed version 0 length - allow new f 59 /* define fixed version 0 length - allow new format reader to read old files. */
66 #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR 60 #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR - CS_ETM_ETMCR + 1)
67 61
68 /* ETMv4 metadata */ 62 /* ETMv4 metadata */
69 enum { 63 enum {
70 /* Dynamic, configurable parameters */ 64 /* Dynamic, configurable parameters */
71 CS_ETMV4_TRCCONFIGR = CS_ETM_COMMON_BL 65 CS_ETMV4_TRCCONFIGR = CS_ETM_COMMON_BLK_MAX_V1,
72 CS_ETMV4_TRCTRACEIDR, 66 CS_ETMV4_TRCTRACEIDR,
73 /* RO, taken from sysFS */ 67 /* RO, taken from sysFS */
74 CS_ETMV4_TRCIDR0, 68 CS_ETMV4_TRCIDR0,
75 CS_ETMV4_TRCIDR1, 69 CS_ETMV4_TRCIDR1,
76 CS_ETMV4_TRCIDR2, 70 CS_ETMV4_TRCIDR2,
77 CS_ETMV4_TRCIDR8, 71 CS_ETMV4_TRCIDR8,
78 CS_ETMV4_TRCAUTHSTATUS, 72 CS_ETMV4_TRCAUTHSTATUS,
79 CS_ETMV4_TS_SOURCE, <<
80 CS_ETMV4_PRIV_MAX, 73 CS_ETMV4_PRIV_MAX,
81 }; 74 };
82 75
83 /* define fixed version 0 length - allow new f 76 /* define fixed version 0 length - allow new format reader to read old files. */
84 #define CS_ETMV4_NR_TRC_PARAMS_V0 (CS_ETMV4_TR 77 #define CS_ETMV4_NR_TRC_PARAMS_V0 (CS_ETMV4_TRCAUTHSTATUS - CS_ETMV4_TRCCONFIGR + 1)
85 78
86 /* 79 /*
87 * ETE metadata is ETMv4 plus TRCDEVARCH regis 80 * ETE metadata is ETMv4 plus TRCDEVARCH register and doesn't support header V0 since it was
88 * added in header V1 81 * added in header V1
89 */ 82 */
90 enum { 83 enum {
91 /* Dynamic, configurable parameters */ !! 84 CS_ETE_TRCDEVARCH = CS_ETMV4_PRIV_MAX,
92 CS_ETE_TRCCONFIGR = CS_ETM_COMMON_BLK_ <<
93 CS_ETE_TRCTRACEIDR, <<
94 /* RO, taken from sysFS */ <<
95 CS_ETE_TRCIDR0, <<
96 CS_ETE_TRCIDR1, <<
97 CS_ETE_TRCIDR2, <<
98 CS_ETE_TRCIDR8, <<
99 CS_ETE_TRCAUTHSTATUS, <<
100 CS_ETE_TRCDEVARCH, <<
101 CS_ETE_TS_SOURCE, <<
102 CS_ETE_PRIV_MAX 85 CS_ETE_PRIV_MAX
103 }; 86 };
104 87
105 /* 88 /*
106 * Check for valid CoreSight trace ID. If an i <<
107 * then IDs are present in the hardware ID pac <<
108 */ <<
109 #define CS_IS_VALID_TRACE_ID(id) ((id > 0) && <<
110 <<
111 /* <<
112 * ETMv3 exception encoding number: 89 * ETMv3 exception encoding number:
113 * See Embedded Trace Macrocell specification 90 * See Embedded Trace Macrocell specification (ARM IHI 0014Q)
114 * table 7-12 Encoding of Exception[3:0] for n 91 * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors.
115 */ 92 */
116 enum { 93 enum {
117 CS_ETMV3_EXC_NONE = 0, 94 CS_ETMV3_EXC_NONE = 0,
118 CS_ETMV3_EXC_DEBUG_HALT = 1, 95 CS_ETMV3_EXC_DEBUG_HALT = 1,
119 CS_ETMV3_EXC_SMC = 2, 96 CS_ETMV3_EXC_SMC = 2,
120 CS_ETMV3_EXC_HYP = 3, 97 CS_ETMV3_EXC_HYP = 3,
121 CS_ETMV3_EXC_ASYNC_DATA_ABORT = 4, 98 CS_ETMV3_EXC_ASYNC_DATA_ABORT = 4,
122 CS_ETMV3_EXC_JAZELLE_THUMBEE = 5, 99 CS_ETMV3_EXC_JAZELLE_THUMBEE = 5,
123 CS_ETMV3_EXC_PE_RESET = 8, 100 CS_ETMV3_EXC_PE_RESET = 8,
124 CS_ETMV3_EXC_UNDEFINED_INSTR = 9, 101 CS_ETMV3_EXC_UNDEFINED_INSTR = 9,
125 CS_ETMV3_EXC_SVC = 10, 102 CS_ETMV3_EXC_SVC = 10,
126 CS_ETMV3_EXC_PREFETCH_ABORT = 11, 103 CS_ETMV3_EXC_PREFETCH_ABORT = 11,
127 CS_ETMV3_EXC_DATA_FAULT = 12, 104 CS_ETMV3_EXC_DATA_FAULT = 12,
128 CS_ETMV3_EXC_GENERIC = 13, 105 CS_ETMV3_EXC_GENERIC = 13,
129 CS_ETMV3_EXC_IRQ = 14, 106 CS_ETMV3_EXC_IRQ = 14,
130 CS_ETMV3_EXC_FIQ = 15, 107 CS_ETMV3_EXC_FIQ = 15,
131 }; 108 };
132 109
133 /* 110 /*
134 * ETMv4 exception encoding number: 111 * ETMv4 exception encoding number:
135 * See ARM Embedded Trace Macrocell Architectu 112 * See ARM Embedded Trace Macrocell Architecture Specification (ARM IHI 0064D)
136 * table 6-12 Possible values for the TYPE fie 113 * table 6-12 Possible values for the TYPE field in an Exception instruction
137 * trace packet, for ARMv7-A/R and ARMv8-A/R P 114 * trace packet, for ARMv7-A/R and ARMv8-A/R PEs.
138 */ 115 */
139 enum { 116 enum {
140 CS_ETMV4_EXC_RESET = 0, 117 CS_ETMV4_EXC_RESET = 0,
141 CS_ETMV4_EXC_DEBUG_HALT = 1, 118 CS_ETMV4_EXC_DEBUG_HALT = 1,
142 CS_ETMV4_EXC_CALL = 2, 119 CS_ETMV4_EXC_CALL = 2,
143 CS_ETMV4_EXC_TRAP = 3, 120 CS_ETMV4_EXC_TRAP = 3,
144 CS_ETMV4_EXC_SYSTEM_ERROR = 4, 121 CS_ETMV4_EXC_SYSTEM_ERROR = 4,
145 CS_ETMV4_EXC_INST_DEBUG = 6, 122 CS_ETMV4_EXC_INST_DEBUG = 6,
146 CS_ETMV4_EXC_DATA_DEBUG = 7, 123 CS_ETMV4_EXC_DATA_DEBUG = 7,
147 CS_ETMV4_EXC_ALIGNMENT = 10, 124 CS_ETMV4_EXC_ALIGNMENT = 10,
148 CS_ETMV4_EXC_INST_FAULT = 11, 125 CS_ETMV4_EXC_INST_FAULT = 11,
149 CS_ETMV4_EXC_DATA_FAULT = 12, 126 CS_ETMV4_EXC_DATA_FAULT = 12,
150 CS_ETMV4_EXC_IRQ = 14, 127 CS_ETMV4_EXC_IRQ = 14,
151 CS_ETMV4_EXC_FIQ = 15, 128 CS_ETMV4_EXC_FIQ = 15,
152 CS_ETMV4_EXC_END = 31, 129 CS_ETMV4_EXC_END = 31,
153 }; 130 };
154 131
155 enum cs_etm_sample_type { 132 enum cs_etm_sample_type {
156 CS_ETM_EMPTY, 133 CS_ETM_EMPTY,
157 CS_ETM_RANGE, 134 CS_ETM_RANGE,
158 CS_ETM_DISCONTINUITY, 135 CS_ETM_DISCONTINUITY,
159 CS_ETM_EXCEPTION, 136 CS_ETM_EXCEPTION,
160 CS_ETM_EXCEPTION_RET, 137 CS_ETM_EXCEPTION_RET,
161 }; 138 };
162 139
163 enum cs_etm_isa { 140 enum cs_etm_isa {
164 CS_ETM_ISA_UNKNOWN, 141 CS_ETM_ISA_UNKNOWN,
165 CS_ETM_ISA_A64, 142 CS_ETM_ISA_A64,
166 CS_ETM_ISA_A32, 143 CS_ETM_ISA_A32,
167 CS_ETM_ISA_T32, 144 CS_ETM_ISA_T32,
168 }; 145 };
169 146
170 struct cs_etm_queue; 147 struct cs_etm_queue;
171 148
172 struct cs_etm_packet { 149 struct cs_etm_packet {
173 enum cs_etm_sample_type sample_type; 150 enum cs_etm_sample_type sample_type;
174 enum cs_etm_isa isa; 151 enum cs_etm_isa isa;
175 u64 start_addr; 152 u64 start_addr;
176 u64 end_addr; 153 u64 end_addr;
177 u32 instr_count; 154 u32 instr_count;
178 u32 last_instr_type; 155 u32 last_instr_type;
179 u32 last_instr_subtype; 156 u32 last_instr_subtype;
180 u32 flags; 157 u32 flags;
181 u32 exception_number; 158 u32 exception_number;
182 bool last_instr_cond; !! 159 u8 last_instr_cond;
183 bool last_instr_taken_branch; !! 160 u8 last_instr_taken_branch;
184 u8 last_instr_size; 161 u8 last_instr_size;
185 u8 trace_chan_id; 162 u8 trace_chan_id;
186 int cpu; 163 int cpu;
187 }; 164 };
188 165
189 #define CS_ETM_PACKET_MAX_BUFFER 1024 166 #define CS_ETM_PACKET_MAX_BUFFER 1024
190 167
191 /* 168 /*
192 * When working with per-thread scenarios the 169 * When working with per-thread scenarios the process under trace can
193 * be scheduled on any CPU and as such, more t 170 * be scheduled on any CPU and as such, more than one traceID may be
194 * associated with the same process. Since a 171 * associated with the same process. Since a traceID of '' is illegal
195 * as per the CoreSight architecture, use that 172 * as per the CoreSight architecture, use that specific value to
196 * identify the queue where all packets (with 173 * identify the queue where all packets (with any traceID) are
197 * aggregated. 174 * aggregated.
198 */ 175 */
199 #define CS_ETM_PER_THREAD_TRACEID 0 176 #define CS_ETM_PER_THREAD_TRACEID 0
200 177
201 struct cs_etm_packet_queue { 178 struct cs_etm_packet_queue {
202 u32 packet_count; 179 u32 packet_count;
203 u32 head; 180 u32 head;
204 u32 tail; 181 u32 tail;
205 u32 instr_count; 182 u32 instr_count;
206 u64 cs_timestamp; /* Timestamp from tr !! 183 u64 cs_timestamp;
207 u64 next_cs_timestamp; 184 u64 next_cs_timestamp;
208 struct cs_etm_packet packet_buffer[CS_ 185 struct cs_etm_packet packet_buffer[CS_ETM_PACKET_MAX_BUFFER];
209 }; 186 };
210 187
211 #define KiB(x) ((x) * 1024) 188 #define KiB(x) ((x) * 1024)
212 #define MiB(x) ((x) * 1024 * 1024) 189 #define MiB(x) ((x) * 1024 * 1024)
213 190
214 #define CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL 191 #define CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL
215 192
216 #define BMVAL(val, lsb, msb) ((val & GENMAS 193 #define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb)
217 194
218 #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_ 195 #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_MAX * sizeof(u64))
219 196
220 #define __perf_cs_etmv3_magic 0x30303030303030 197 #define __perf_cs_etmv3_magic 0x3030303030303030ULL
221 #define __perf_cs_etmv4_magic 0x40404040404040 198 #define __perf_cs_etmv4_magic 0x4040404040404040ULL
222 #define __perf_cs_ete_magic 0x50505050505050 199 #define __perf_cs_ete_magic 0x5050505050505050ULL
223 #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * 200 #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64))
224 #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX 201 #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64))
225 #define CS_ETE_PRIV_SIZE (CS_ETE_PRIV_MAX * si 202 #define CS_ETE_PRIV_SIZE (CS_ETE_PRIV_MAX * sizeof(u64))
226 203
227 #define INFO_HEADER_SIZE (sizeof(((struct perf !! 204 #ifdef HAVE_CSTRACE_SUPPORT
228 sizeof(((struct perf <<
229 <<
230 /* CoreSight trace ID is currently the bottom <<
231 #define CORESIGHT_TRACE_ID_VAL_MASK GENMAS <<
232 <<
233 int cs_etm__process_auxtrace_info(union perf_e 205 int cs_etm__process_auxtrace_info(union perf_event *event,
234 struct perf_ 206 struct perf_session *session);
235 void cs_etm_get_default_config(const struct pe !! 207 int cs_etm__get_cpu(u8 trace_chan_id, int *cpu);
236 !! 208 int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt);
237 enum cs_etm_pid_fmt { !! 209 int cs_etm__etmq_set_tid(struct cs_etm_queue *etmq,
238 CS_ETM_PIDFMT_NONE, !! 210 pid_t tid, u8 trace_chan_id);
239 CS_ETM_PIDFMT_CTXTID, <<
240 CS_ETM_PIDFMT_CTXTID2 <<
241 }; <<
242 <<
243 #ifdef HAVE_CSTRACE_SUPPORT <<
244 #include <opencsd/ocsd_if_types.h> <<
245 int cs_etm__get_cpu(struct cs_etm_queue *etmq, <<
246 enum cs_etm_pid_fmt cs_etm__get_pid_fmt(struct <<
247 int cs_etm__etmq_set_tid_el(struct cs_etm_queu <<
248 u8 trace_chan_id, <<
249 bool cs_etm__etmq_is_timeless(struct cs_etm_qu 211 bool cs_etm__etmq_is_timeless(struct cs_etm_queue *etmq);
250 void cs_etm__etmq_set_traceid_queue_timestamp( 212 void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq,
251 213 u8 trace_chan_id);
252 struct cs_etm_packet_queue 214 struct cs_etm_packet_queue
253 *cs_etm__etmq_get_packet_queue(struct cs_etm_q 215 *cs_etm__etmq_get_packet_queue(struct cs_etm_queue *etmq, u8 trace_chan_id);
254 int cs_etm__process_auxtrace_info_full(union p <<
255 struct <<
256 u64 cs_etm__convert_sample_time(struct cs_etm_ <<
257 #else 216 #else
258 static inline int 217 static inline int
259 cs_etm__process_auxtrace_info_full(union perf_ !! 218 cs_etm__process_auxtrace_info(union perf_event *event __maybe_unused,
260 struct perf !! 219 struct perf_session *session __maybe_unused)
>> 220 {
>> 221 return -1;
>> 222 }
>> 223
>> 224 static inline int cs_etm__get_cpu(u8 trace_chan_id __maybe_unused,
>> 225 int *cpu __maybe_unused)
261 { 226 {
262 pr_err("\nCS ETM Trace: OpenCSD is not <<
263 return -1; 227 return -1;
>> 228 }
>> 229
>> 230 static inline int cs_etm__etmq_set_tid(
>> 231 struct cs_etm_queue *etmq __maybe_unused,
>> 232 pid_t tid __maybe_unused,
>> 233 u8 trace_chan_id __maybe_unused)
>> 234 {
>> 235 return -1;
>> 236 }
>> 237
>> 238 static inline bool cs_etm__etmq_is_timeless(
>> 239 struct cs_etm_queue *etmq __maybe_unused)
>> 240 {
>> 241 /* What else to return? */
>> 242 return true;
>> 243 }
>> 244
>> 245 static inline void cs_etm__etmq_set_traceid_queue_timestamp(
>> 246 struct cs_etm_queue *etmq __maybe_unused,
>> 247 u8 trace_chan_id __maybe_unused) {}
>> 248
>> 249 static inline struct cs_etm_packet_queue *cs_etm__etmq_get_packet_queue(
>> 250 struct cs_etm_queue *etmq __maybe_unused,
>> 251 u8 trace_chan_id __maybe_unused)
>> 252 {
>> 253 return NULL;
264 } 254 }
265 #endif 255 #endif
266 256
267 #endif 257 #endif
268 258
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