1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright 2015, Michael Ellerman, IBM Corp. 2 * Copyright 2015, Michael Ellerman, IBM Corp.
>> 3 * Licensed under GPLv2.
4 */ 4 */
5 5
6 #ifndef _SELFTESTS_POWERPC_TM_TM_H 6 #ifndef _SELFTESTS_POWERPC_TM_TM_H
7 #define _SELFTESTS_POWERPC_TM_TM_H 7 #define _SELFTESTS_POWERPC_TM_TM_H
8 8
9 #include <stdbool.h> <<
10 #include <asm/tm.h> 9 #include <asm/tm.h>
>> 10 #include <asm/cputable.h>
>> 11 #include <stdbool.h>
11 12
12 #include "utils.h" 13 #include "utils.h"
13 #include "reg.h" <<
14 <<
15 #define TM_RETRIES 100 <<
16 14
17 static inline bool have_htm(void) 15 static inline bool have_htm(void)
18 { 16 {
19 #ifdef PPC_FEATURE2_HTM 17 #ifdef PPC_FEATURE2_HTM
20 return have_hwcap2(PPC_FEATURE2_HTM); 18 return have_hwcap2(PPC_FEATURE2_HTM);
21 #else 19 #else
22 printf("PPC_FEATURE2_HTM not defined, 20 printf("PPC_FEATURE2_HTM not defined, can't check AT_HWCAP2\n");
23 return false; 21 return false;
24 #endif 22 #endif
25 } 23 }
26 24
27 static inline bool have_htm_nosc(void) 25 static inline bool have_htm_nosc(void)
28 { 26 {
29 #ifdef PPC_FEATURE2_HTM_NOSC 27 #ifdef PPC_FEATURE2_HTM_NOSC
30 return have_hwcap2(PPC_FEATURE2_HTM_NO 28 return have_hwcap2(PPC_FEATURE2_HTM_NOSC);
31 #else 29 #else
32 printf("PPC_FEATURE2_HTM_NOSC not defi 30 printf("PPC_FEATURE2_HTM_NOSC not defined, can't check AT_HWCAP2\n");
33 return false; 31 return false;
34 #endif 32 #endif
35 } 33 }
36 34
37 /* <<
38 * Transactional Memory was removed in ISA 3.1 <<
39 * is provided on P10 for threads running in P <<
40 * synthetic implementation immediately fails <<
41 * Bit 7 (Failure Persistent) and Bit 15 (Impl <<
42 */ <<
43 static inline bool htm_is_synthetic(void) <<
44 { <<
45 int i; <<
46 <<
47 /* <<
48 * Per the ISA, the Failure Persistent <<
49 * times in case we got an Implementat <<
50 * v3.1 system. On these systems the I <<
51 * should not be persistent. <<
52 */ <<
53 for (i = 0; i < TM_RETRIES; i++) { <<
54 asm volatile( <<
55 "tbegin.;" <<
56 "beq 1f;" <<
57 "tend.;" <<
58 "1:" <<
59 : <<
60 : <<
61 : "memory"); <<
62 <<
63 if ((__builtin_get_texasr() & <<
64 (TEXASR_FP | TEXASR_IC)) <<
65 break; <<
66 } <<
67 return i == TM_RETRIES; <<
68 } <<
69 <<
70 static inline long failure_code(void) 35 static inline long failure_code(void)
71 { 36 {
72 return __builtin_get_texasru() >> 24; 37 return __builtin_get_texasru() >> 24;
73 } 38 }
74 39
75 static inline bool failure_is_persistent(void) 40 static inline bool failure_is_persistent(void)
76 { 41 {
77 return (failure_code() & TM_CAUSE_PERS 42 return (failure_code() & TM_CAUSE_PERSISTENT) == TM_CAUSE_PERSISTENT;
78 } 43 }
79 44
80 static inline bool failure_is_syscall(void) 45 static inline bool failure_is_syscall(void)
81 { 46 {
82 return (failure_code() & TM_CAUSE_SYSC 47 return (failure_code() & TM_CAUSE_SYSCALL) == TM_CAUSE_SYSCALL;
83 } 48 }
84 49
85 static inline bool failure_is_unavailable(void 50 static inline bool failure_is_unavailable(void)
86 { 51 {
87 return (failure_code() & TM_CAUSE_FAC_ 52 return (failure_code() & TM_CAUSE_FAC_UNAV) == TM_CAUSE_FAC_UNAV;
88 } 53 }
89 54
90 static inline bool failure_is_reschedule(void) 55 static inline bool failure_is_reschedule(void)
91 { 56 {
92 if ((failure_code() & TM_CAUSE_RESCHED 57 if ((failure_code() & TM_CAUSE_RESCHED) == TM_CAUSE_RESCHED ||
93 (failure_code() & TM_CAUSE_KVM_RES !! 58 (failure_code() & TM_CAUSE_KVM_RESCHED) == TM_CAUSE_KVM_RESCHED)
94 (failure_code() & TM_CAUSE_KVM_FAC <<
95 return true; 59 return true;
96 60
97 return false; 61 return false;
98 } 62 }
99 63
100 static inline bool failure_is_nesting(void) 64 static inline bool failure_is_nesting(void)
101 { 65 {
102 return (__builtin_get_texasru() & 0x40 66 return (__builtin_get_texasru() & 0x400000);
103 } 67 }
104 68
105 static inline int tcheck(void) 69 static inline int tcheck(void)
106 { 70 {
107 long cr; 71 long cr;
108 asm volatile ("tcheck 0" : "=r"(cr) : 72 asm volatile ("tcheck 0" : "=r"(cr) : : "cr0");
109 return (cr >> 28) & 4; 73 return (cr >> 28) & 4;
110 } 74 }
111 75
112 static inline bool tcheck_doomed(void) 76 static inline bool tcheck_doomed(void)
113 { 77 {
114 return tcheck() & 8; 78 return tcheck() & 8;
115 } 79 }
116 80
117 static inline bool tcheck_active(void) 81 static inline bool tcheck_active(void)
118 { 82 {
119 return tcheck() & 4; 83 return tcheck() & 4;
120 } 84 }
121 85
122 static inline bool tcheck_suspended(void) 86 static inline bool tcheck_suspended(void)
123 { 87 {
124 return tcheck() & 2; 88 return tcheck() & 2;
125 } 89 }
126 90
127 static inline bool tcheck_transactional(void) 91 static inline bool tcheck_transactional(void)
128 { 92 {
129 return tcheck() & 6; 93 return tcheck() & 6;
130 } 94 }
131 95
132 #endif /* _SELFTESTS_POWERPC_TM_TM_H */ 96 #endif /* _SELFTESTS_POWERPC_TM_TM_H */
133 97
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