1 What: /sys/devices/system/machinecheck/machinecheckX/ 2 Contact: Andi Kleen <ak@linux.intel.com> 3 Date: Feb, 2007 4 Description: 5 (X = CPU number) 6 7 Machine checks report internal hardware error conditions 8 detected by the CPU. Uncorrected errors typically cause a 9 machine check (often with panic), corrected ones cause a 10 machine check log entry. 11 12 For more details about the x86 machine check architecture 13 see the Intel and AMD architecture manuals from their 14 developer websites. 15 16 For more details about the architecture 17 see http://one.firstfloor.org/~andi/mce.pdf 18 19 Each CPU has its own directory. 20 21 What: /sys/devices/system/machinecheck/machinecheckX/bank<Y> 22 Contact: Andi Kleen <ak@linux.intel.com> 23 Date: Feb, 2007 24 Description: 25 (Y bank number) 26 27 64bit Hex bitmask enabling/disabling specific subevents for 28 bank Y. 29 30 When a bit in the bitmask is zero then the respective 31 subevent will not be reported. 32 33 By default all events are enabled. 34 35 Note that BIOS maintain another mask to disable specific events 36 per bank. This is not visible here 37 38 What: /sys/devices/system/machinecheck/machinecheckX/check_interval 39 Contact: Andi Kleen <ak@linux.intel.com> 40 Date: Feb, 2007 41 Description: 42 The entries appear for each CPU, but they are truly shared 43 between all CPUs. 44 45 How often to poll for corrected machine check errors, in 46 seconds (Note output is hexadecimal). Default 5 minutes. 47 When the poller finds MCEs it triggers an exponential speedup 48 (poll more often) on the polling interval. When the poller 49 stops finding MCEs, it triggers an exponential backoff 50 (poll less often) on the polling interval. The check_interval 51 variable is both the initial and maximum polling interval. 52 0 means no polling for corrected machine check errors 53 (but some corrected errors might be still reported 54 in other ways) 55 56 What: /sys/devices/system/machinecheck/machinecheckX/trigger 57 Contact: Andi Kleen <ak@linux.intel.com> 58 Date: Feb, 2007 59 Description: 60 The entries appear for each CPU, but they are truly shared 61 between all CPUs. 62 63 Program to run when a machine check event is detected. 64 This is an alternative to running mcelog regularly from cron 65 and allows to detect events faster. 66 67 What: /sys/devices/system/machinecheck/machinecheckX/monarch_timeout 68 Contact: Andi Kleen <ak@linux.intel.com> 69 Date: Feb, 2007 70 Description: 71 How long to wait for the other CPUs to machine check too on a 72 exception. 0 to disable waiting for other CPUs. 73 74 Unit: us 75 76 What: /sys/devices/system/machinecheck/machinecheckX/ignore_ce 77 Contact: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> 78 Date: Jun 2009 79 Description: 80 Disables polling and CMCI for corrected errors. 81 All corrected events are not cleared and kept in bank MSRs. 82 83 What: /sys/devices/system/machinecheck/machinecheckX/dont_log_ce 84 Contact: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> 85 Date: Jun 2009 86 Description: 87 Disables logging for corrected errors. 88 All reported corrected errors will be cleared silently. 89 90 This option will be useful if you never care about corrected 91 errors. 92 93 What: /sys/devices/system/machinecheck/machinecheckX/cmci_disabled 94 Contact: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> 95 Date: Jun 2009 96 Description: 97 Disables the CMCI feature.
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