1 ========================================================== 2 Interface between kernel and boot loaders on Exynos boards 3 ========================================================== 4 5 Author: Krzysztof Kozlowski 6 7 Date : 6 June 2015 8 9 The document tries to describe currently used interface between Linux kernel 10 and boot loaders on Samsung Exynos based boards. This is not a definition 11 of interface but rather a description of existing state, a reference 12 for information purpose only. 13 14 In the document "boot loader" means any of following: U-boot, proprietary 15 SBOOT or any other firmware for ARMv7 and ARMv8 initializing the board before 16 executing kernel. 17 18 19 1. Non-Secure mode 20 21 Address: sysram_ns_base_addr 22 23 ============= ============================================ ================== 24 Offset Value Purpose 25 ============= ============================================ ================== 26 0x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend 27 0x0c 0x00000bad (Magic cookie) System suspend 28 0x1c exynos4_secondary_startup Secondary CPU boot 29 0x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 30 0x20 0xfcba0d10 (Magic cookie) AFTR 31 0x24 exynos_cpu_resume_ns AFTR 32 0x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR 33 0x28 0x0 or last value during resume (Exynos542x) System suspend 34 ============= ============================================ ================== 35 36 37 2. Secure mode 38 39 Address: sysram_base_addr 40 41 ============= ============================================ ================== 42 Offset Value Purpose 43 ============= ============================================ ================== 44 0x00 exynos4_secondary_startup Secondary CPU boot 45 0x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot 46 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 47 0x20 exynos_cpu_resume (Exynos4210 r1.0) AFTR 48 0x24 0xfcba0d10 (Magic cookie, Exynos4210 r1.0) AFTR 49 ============= ============================================ ================== 50 51 Address: pmu_base_addr 52 53 ============= ============================================ ================== 54 Offset Value Purpose 55 ============= ============================================ ================== 56 0x0800 exynos_cpu_resume AFTR, suspend 57 0x0800 mcpm_entry_point (Exynos542x with MCPM) AFTR, suspend 58 0x0804 0xfcba0d10 (Magic cookie) AFTR 59 0x0804 0x00000bad (Magic cookie) System suspend 60 0x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot 61 0x0818 0xfcba0d10 (Magic cookie, Exynos4210 r1.1) AFTR 62 0x081C exynos_cpu_resume (Exynos4210 r1.1) AFTR 63 ============= ============================================ ================== 64 65 3. Other (regardless of secure/non-secure mode) 66 67 Address: pmu_base_addr 68 69 ============= =============================== =============================== 70 Offset Value Purpose 71 ============= =============================== =============================== 72 0x0908 Non-zero Secondary CPU boot up indicator 73 on Exynos3250 and Exynos542x 74 ============= =============================== =============================== 75 76 77 4. Glossary 78 79 AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other 80 modules are power gated, except the TOP modules 81 MCPM - Multi-Cluster Power Management
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