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TOMOYO Linux Cross Reference
Linux/Documentation/arch/powerpc/isa-versions.rst

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Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 ==========================
  2 CPU to ISA Version Mapping
  3 ==========================
  4 
  5 Mapping of some CPU versions to relevant ISA versions.
  6 
  7 Note Power4 and Power4+ are not supported.
  8 
  9 ========= ====================================================================
 10 CPU       Architecture version
 11 ========= ====================================================================
 12 Power10   Power ISA v3.1
 13 Power9    Power ISA v3.0B
 14 Power8    Power ISA v2.07
 15 e6500     Power ISA v2.06 with some exceptions
 16 e5500     Power ISA v2.06 with some exceptions, no Altivec
 17 Power7    Power ISA v2.06
 18 Power6    Power ISA v2.05
 19 PA6T      Power ISA v2.04
 20 Cell PPU  - Power ISA v2.02 with some minor exceptions
 21           - Plus Altivec/VMX ~= 2.03
 22 Power5++  Power ISA v2.04 (no VMX)
 23 Power5+   Power ISA v2.03
 24 Power5    - PowerPC User Instruction Set Architecture Book I v2.02
 25           - PowerPC Virtual Environment Architecture Book II v2.02
 26           - PowerPC Operating Environment Architecture Book III v2.02
 27 PPC970    - PowerPC User Instruction Set Architecture Book I v2.01
 28           - PowerPC Virtual Environment Architecture Book II v2.01
 29           - PowerPC Operating Environment Architecture Book III v2.01
 30           - Plus Altivec/VMX ~= 2.03
 31 Power4+   - PowerPC User Instruction Set Architecture Book I v2.01
 32           - PowerPC Virtual Environment Architecture Book II v2.01
 33           - PowerPC Operating Environment Architecture Book III v2.01
 34 Power4    - PowerPC User Instruction Set Architecture Book I v2.00
 35           - PowerPC Virtual Environment Architecture Book II v2.00
 36           - PowerPC Operating Environment Architecture Book III v2.00
 37 ========= ====================================================================
 38 
 39 
 40 Key Features
 41 ------------
 42 
 43 ========== ==================
 44 CPU        VMX (aka. Altivec)
 45 ========== ==================
 46 Power10    Yes
 47 Power9     Yes
 48 Power8     Yes
 49 e6500      Yes
 50 e5500      No
 51 Power7     Yes
 52 Power6     Yes
 53 PA6T       Yes
 54 Cell PPU   Yes
 55 Power5++   No
 56 Power5+    No
 57 Power5     No
 58 PPC970     Yes
 59 Power4+    No
 60 Power4     No
 61 ========== ==================
 62 
 63 ========== ====
 64 CPU        VSX
 65 ========== ====
 66 Power10    Yes
 67 Power9     Yes
 68 Power8     Yes
 69 e6500      No
 70 e5500      No
 71 Power7     Yes
 72 Power6     No
 73 PA6T       No
 74 Cell PPU   No
 75 Power5++   No
 76 Power5+    No
 77 Power5     No
 78 PPC970     No
 79 Power4+    No
 80 Power4     No
 81 ========== ====
 82 
 83 ========== ====================================
 84 CPU        Transactional Memory
 85 ========== ====================================
 86 Power10    No  (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture")
 87 Power9     Yes (* see transactional_memory.txt)
 88 Power8     Yes
 89 e6500      No
 90 e5500      No
 91 Power7     No
 92 Power6     No
 93 PA6T       No
 94 Cell PPU   No
 95 Power5++   No
 96 Power5+    No
 97 Power5     No
 98 PPC970     No
 99 Power4+    No
100 Power4     No
101 ========== ====================================

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