~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 ========================================================
  2 Secondary CPU enable-method "al,alpine-smp" binding
  3 ========================================================
  4 
  5 This document describes the "al,alpine-smp" method for
  6 enabling secondary CPUs. To apply to all CPUs, a single
  7 "al,alpine-smp" enable method should be defined in the
  8 "cpus" node.
  9 
 10 Enable method name:     "al,alpine-smp"
 11 Compatible machines:    "al,alpine"
 12 Compatible CPUs:        "arm,cortex-a15"
 13 Related properties:     (none)
 14 
 15 Note:
 16 This enable method requires valid nodes compatible with
 17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
 18 
 19 
 20 * Alpine CPU resume registers
 21 
 22 The CPU resume register are used to define required resume address after
 23 reset.
 24 
 25 Properties:
 26 - compatible : Should contain "al,alpine-cpu-resume".
 27 - reg : Offset and length of the register set for the device
 28 
 29 
 30 Example:
 31 
 32 cpus {
 33         #address-cells = <1>;
 34         #size-cells = <0>;
 35         enable-method = "al,alpine-smp";
 36 
 37         cpu@0 {
 38                 compatible = "arm,cortex-a15";
 39                 device_type = "cpu";
 40                 reg = <0>;
 41         };
 42 
 43         cpu@1 {
 44                 compatible = "arm,cortex-a15";
 45                 device_type = "cpu";
 46                 reg = <1>;
 47         };
 48 
 49         cpu@2 {
 50                 compatible = "arm,cortex-a15";
 51                 device_type = "cpu";
 52                 reg = <2>;
 53         };
 54 
 55         cpu@3 {
 56                 compatible = "arm,cortex-a15";
 57                 device_type = "cpu";
 58                 reg = <3>;
 59         };
 60 };
 61 
 62 cpu_resume {
 63         compatible = "al,alpine-cpu-resume";
 64         reg = <0xfbff5ed0 0x30>;
 65 };
 66 
 67 nb_service {
 68         compatible = "al,alpine-sysfabric-service", "syscon";
 69         reg = <0xfb070000 0x10000>;
 70 };

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php