1 ST-Ericsson Ux500 boards
2 ------------------------
3
4 Required properties (in root node) one of these:
5 compatible = "st-ericsson,mop500" (legacy)
6 compatible = "st-ericsson,u8500"
7
8 Required node (under root node):
9
10 soc: represents the system-on-chip and contains the chip
11 peripherals
12
13 Required property of soc node, one of these:
14 compatible = "stericsson,db8500"
15
16 Required subnodes under soc node:
17
18 backupram: (used for CPU spin tables and for storing data
19 during retention, system won't boot without this):
20 compatible = "ste,dbx500-backupram"
21
22 scu:
23 see binding for arm/arm,scu.yaml
24
25 interrupt-controller:
26 see binding for interrupt-controller/arm,gic.txt
27
28 timer:
29 see binding for timer/arm,twd-timer.yaml
30
31 clocks:
32 see binding for clocks/ux500.txt
33
34 Example:
35
36 /dts-v1/;
37
38 / {
39 model = "ST-Ericsson HREF (pre-v60) and ST UIB";
40 compatible = "st-ericsson,mop500", "st-ericsson,u8500";
41
42 soc {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 compatible = "stericsson,db8500";
46 interrupt-parent = <&intc>;
47 ranges;
48
49 backupram@80150000 {
50 compatible = "ste,dbx500-backupram";
51 reg = <0x80150000 0x2000>;
52 };
53
54 intc: interrupt-controller@a0411000 {
55 compatible = "arm,cortex-a9-gic";
56 #interrupt-cells = <3>;
57 #address-cells = <1>;
58 interrupt-controller;
59 reg = <0xa0411000 0x1000>,
60 <0xa0410100 0x100>;
61 };
62
63 scu@a0410000 {
64 compatible = "arm,cortex-a9-scu";
65 reg = <0xa0410000 0x100>;
66 };
67
68 timer@a0410600 {
69 compatible = "arm,cortex-a9-twd-timer";
70 reg = <0xa0410600 0x20>;
71 interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
72 clocks = <&smp_twd_clk>;
73 };
74
75 clocks {
76 compatible = "stericsson,u8500-clks";
77
78 smp_twd_clk: smp-twd-clock {
79 #clock-cells = <0>;
80 };
81 };
82 };
83 };
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