1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Baikal-T1 SoC AHCI SATA controller
8
9 maintainers:
10 - Serge Semin <fancer.lancer@gmail.com>
11
12 description:
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
15
16 allOf:
17 - $ref: snps,dwc-ahci-common.yaml#
18
19 properties:
20 compatible:
21 const: baikal,bt1-ahci
22
23 clocks:
24 items:
25 - description: Peripheral APB bus clock
26 - description: Application AXI BIU clock
27 - description: SATA Ports reference clock
28
29 clock-names:
30 items:
31 - const: pclk
32 - const: aclk
33 - const: ref
34
35 resets:
36 items:
37 - description: Application AXI BIU domain reset
38 - description: SATA Ports clock domain reset
39
40 reset-names:
41 items:
42 - const: arst
43 - const: ref
44
45 ports-implemented:
46 maximum: 0x3
47
48 patternProperties:
49 "^sata-port@[0-1]$":
50 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
51
52 properties:
53 reg:
54 minimum: 0
55 maximum: 1
56
57 snps,tx-ts-max:
58 $ref: /schemas/types.yaml#/definitions/uint32
59 description:
60 Due to having AXI3 bus interface utilized the maximum Tx DMA
61 transaction size can't exceed 16 beats (AxLEN[3:0]).
62 enum: [ 1, 2, 4, 8, 16 ]
63
64 snps,rx-ts-max:
65 $ref: /schemas/types.yaml#/definitions/uint32
66 description:
67 Due to having AXI3 bus interface utilized the maximum Rx DMA
68 transaction size can't exceed 16 beats (AxLEN[3:0]).
69 enum: [ 1, 2, 4, 8, 16 ]
70
71 unevaluatedProperties: false
72
73 required:
74 - compatible
75 - reg
76 - interrupts
77 - clocks
78 - clock-names
79 - resets
80
81 unevaluatedProperties: false
82
83 examples:
84 - |
85 sata@1f050000 {
86 compatible = "baikal,bt1-ahci";
87 reg = <0x1f050000 0x2000>;
88 #address-cells = <1>;
89 #size-cells = <0>;
90
91 interrupts = <0 64 4>;
92
93 clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;
94 clock-names = "pclk", "aclk", "ref";
95
96 resets = <&ccu_axi 2>, <&ccu_sys 0>;
97 reset-names = "arst", "ref";
98
99 ports-implemented = <0x3>;
100
101 sata-port@0 {
102 reg = <0>;
103
104 snps,tx-ts-max = <4>;
105 snps,rx-ts-max = <4>;
106 };
107
108 sata-port@1 {
109 reg = <1>;
110
111 snps,tx-ts-max = <4>;
112 snps,rx-ts-max = <4>;
113 };
114 };
115 ...
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