1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NXP i.MX8MP AudioMIX Block Control
8
9 maintainers:
10 - Marek Vasut <marex@denx.de>
11
12 description: |
13 NXP i.MX8M Plus AudioMIX is dedicated clock muxing and gating IP
14 used to control Audio related clock on the SoC.
15
16 properties:
17 compatible:
18 const: fsl,imx8mp-audio-blk-ctrl
19
20 reg:
21 maxItems: 1
22
23 power-domains:
24 maxItems: 1
25
26 clocks:
27 minItems: 7
28 maxItems: 7
29
30 clock-names:
31 items:
32 - const: ahb
33 - const: sai1
34 - const: sai2
35 - const: sai3
36 - const: sai5
37 - const: sai6
38 - const: sai7
39
40 '#clock-cells':
41 const: 1
42 description:
43 The clock consumer should specify the desired clock by having the clock
44 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h
45 for the full list of i.MX8MP IMX8MP_CLK_AUDIOMIX_ clock IDs.
46
47 '#reset-cells':
48 const: 1
49
50 required:
51 - compatible
52 - reg
53 - clocks
54 - clock-names
55 - power-domains
56 - '#clock-cells'
57
58 additionalProperties: false
59
60 examples:
61 # Clock Control Module node:
62 - |
63 #include <dt-bindings/clock/imx8mp-clock.h>
64
65 clock-controller@30e20000 {
66 compatible = "fsl,imx8mp-audio-blk-ctrl";
67 reg = <0x30e20000 0x10000>;
68 #clock-cells = <1>;
69 clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
70 <&clk IMX8MP_CLK_SAI1>,
71 <&clk IMX8MP_CLK_SAI2>,
72 <&clk IMX8MP_CLK_SAI3>,
73 <&clk IMX8MP_CLK_SAI5>,
74 <&clk IMX8MP_CLK_SAI6>,
75 <&clk IMX8MP_CLK_SAI7>;
76 clock-names = "ahb",
77 "sai1", "sai2", "sai3",
78 "sai5", "sai6", "sai7";
79 power-domains = <&pgc_audio>;
80 };
81
82 ...
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