1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Microchip PolarFire Clock Control Module
8
9 maintainers:
10 - Daire McNamara <daire.mcnamara@microchip.com>
11
12 description: |
13 Microchip PolarFire clock control (CLKCFG) is an integrated clock controller,
14 which gates and enables all peripheral clocks.
15
16 This device tree binding describes 33 gate clocks. Clocks are referenced by
17 user nodes by the CLKCFG node phandle and the clock index in the group, from
18 0 to 32.
19
20 properties:
21 compatible:
22 const: microchip,mpfs-clkcfg
23
24 reg:
25 items:
26 - description: |
27 clock config registers:
28 These registers contain enable, reset & divider tables for the, cpu,
29 axi, ahb and rtc/mtimer reference clocks as well as enable and reset
30 for the peripheral clocks.
31 - description: |
32 mss pll dri registers:
33 Block of registers responsible for dynamic reconfiguration of the mss
34 pll
35
36 clocks:
37 maxItems: 1
38
39 '#clock-cells':
40 const: 1
41 description: |
42 The clock consumer should specify the desired clock by having the clock
43 ID in its "clocks" phandle cell.
44 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
45 PolarFire clock IDs.
46
47 resets:
48 maxItems: 1
49
50 '#reset-cells':
51 description:
52 The AHB/AXI peripherals on the PolarFire SoC have reset support, so from
53 CLK_ENVM to CLK_CFM. The reset consumer should specify the desired
54 peripheral via the clock ID in its "resets" phandle cell.
55 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
56 PolarFire clock IDs.
57 const: 1
58
59 required:
60 - compatible
61 - reg
62 - clocks
63 - '#clock-cells'
64
65 additionalProperties: false
66
67 examples:
68 # Clock Config node:
69 - |
70 #include <dt-bindings/clock/microchip,mpfs-clock.h>
71 soc {
72 #address-cells = <2>;
73 #size-cells = <2>;
74 clkcfg: clock-controller@20002000 {
75 compatible = "microchip,mpfs-clkcfg";
76 reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
77 clocks = <&ref>;
78 #clock-cells = <1>;
79 };
80 };
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