1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Global Clock & Reset Controller on QCS404
8
9 maintainers:
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
12
13 description: |
14 Qualcomm global clock control module provides the clocks, resets and power
15 domains on QCS404.
16
17 See also:: include/dt-bindings/clock/qcom,gcc-qcs404.h
18
19 properties:
20 compatible:
21 const: qcom,gcc-qcs404
22
23 clocks:
24 items:
25 - description: XO source
26 - description: Sleep clock source
27 - description: PCIe 0 PIPE clock (optional)
28 - description: DSI phy instance 0 dsi clock
29 - description: DSI phy instance 0 byte clock
30 - description: HDMI phy PLL clock
31
32 clock-names:
33 items:
34 - const: cxo
35 - const: sleep_clk
36 - const: pcie_0_pipe_clk_src
37 - const: dsi0pll
38 - const: dsi0pllbyte
39 - const: hdmi_pll
40
41 required:
42 - compatible
43 - '#power-domain-cells'
44
45 allOf:
46 - $ref: qcom,gcc.yaml#
47
48 unevaluatedProperties: false
49
50 examples:
51 - |
52 clock-controller@1800000 {
53 compatible = "qcom,gcc-qcs404";
54 reg = <0x01800000 0x80000>;
55 #clock-cells = <1>;
56 #reset-cells = <1>;
57 #power-domain-cells = <1>;
58 };
59 ...
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