1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Global Clock & Reset Controller on SM8250
8
9 maintainers:
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
12
13 description: |
14 Qualcomm global clock control module provides the clocks, resets and power
15 domains on SM8250.
16
17 See also:: include/dt-bindings/clock/qcom,gcc-sm8250.h
18
19 properties:
20 compatible:
21 const: qcom,gcc-sm8250
22
23 clocks:
24 items:
25 - description: Board XO source
26 - description: Board active XO source
27 - description: Sleep clock source
28
29 clock-names:
30 items:
31 - const: bi_tcxo
32 - const: bi_tcxo_ao
33 - const: sleep_clk
34
35 required:
36 - compatible
37 - clocks
38 - clock-names
39 - '#power-domain-cells'
40
41 allOf:
42 - $ref: qcom,gcc.yaml#
43
44 unevaluatedProperties: false
45
46 examples:
47 - |
48 #include <dt-bindings/clock/qcom,rpmh.h>
49 clock-controller@100000 {
50 compatible = "qcom,gcc-sm8250";
51 reg = <0x00100000 0x1f0000>;
52 clocks = <&rpmhcc RPMH_CXO_CLK>,
53 <&rpmhcc RPMH_CXO_CLK_A>,
54 <&sleep_clk>;
55 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
56 #clock-cells = <1>;
57 #reset-cells = <1>;
58 #power-domain-cells = <1>;
59 };
60 ...
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