1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Graphics Clock & Reset Controller on SDM630 and SDM660
8
9 maintainers:
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
11
12 description: |
13 Qualcomm graphics clock control module provides the clocks, resets and
14 power domains on SDM630 and SDM660.
15
16 See also dt-bindings/clock/qcom,gpucc-sdm660.h.
17
18 properties:
19 compatible:
20 enum:
21 - qcom,gpucc-sdm630
22 - qcom,gpucc-sdm660
23
24 clocks:
25 items:
26 - description: Board XO source
27 - description: GPLL0 main gpu branch
28 - description: GPLL0 divider gpu branch
29
30 clock-names:
31 items:
32 - const: xo
33 - const: gcc_gpu_gpll0_clk
34 - const: gcc_gpu_gpll0_div_clk
35
36 required:
37 - compatible
38 - clocks
39 - clock-names
40 - '#power-domain-cells'
41
42 allOf:
43 - $ref: qcom,gcc.yaml#
44
45 unevaluatedProperties: false
46
47 examples:
48 - |
49 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
50 #include <dt-bindings/clock/qcom,rpmcc.h>
51
52 clock-controller@5065000 {
53 compatible = "qcom,gpucc-sdm660";
54 reg = <0x05065000 0x9038>;
55 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
56 <&gcc GCC_GPU_GPLL0_CLK>,
57 <&gcc GCC_GPU_GPLL0_DIV_CLK>;
58 clock-names = "xo", "gcc_gpu_gpll0_clk",
59 "gcc_gpu_gpll0_div_clk";
60 #clock-cells = <1>;
61 #power-domain-cells = <1>;
62 #reset-cells = <1>;
63 };
64 ...
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