1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1
8
9 maintainers:
10 - Christian Marangi <ansuelsmth@gmail.com>
11
12 description:
13 The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
14 There is one ACC register region per CPU within the KPSS remapped region as
15 well as an alias register region that remaps accesses to the ACC associated
16 with the CPU accessing the region. ACC v1 is currently used as a
17 clock-controller for enabling the cpu and handling the aux clocks.
18
19 properties:
20 compatible:
21 const: qcom,kpss-acc-v1
22
23 reg:
24 items:
25 - description: Base address and size of the register region
26 - description: Optional base address and size of the alias register region
27 minItems: 1
28
29 clocks:
30 minItems: 2
31 maxItems: 2
32
33 clock-names:
34 items:
35 - const: pll8_vote
36 - const: pxo
37
38 clock-output-names:
39 description: Name of the aux clock. Krait can have at most 4 cpu.
40 enum:
41 - acpu0_aux
42 - acpu1_aux
43 - acpu2_aux
44 - acpu3_aux
45
46 '#clock-cells':
47 const: 0
48
49 required:
50 - compatible
51 - reg
52 - clocks
53 - clock-names
54 - clock-output-names
55 - '#clock-cells'
56
57 additionalProperties: false
58
59 examples:
60 - |
61 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
62
63 clock-controller@2088000 {
64 compatible = "qcom,kpss-acc-v1";
65 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
66 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
67 clock-names = "pll8_vote", "pxo";
68 clock-output-names = "acpu0_aux";
69 #clock-cells = <0>;
70 };
71
72 ...
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