1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Graphics Clock & Reset Controller on MSM8998
8
9 maintainers:
10 - Taniya Das <quic_tdas@quicinc.com>
11
12 description: |
13 Qualcomm graphics clock control module provides the clocks, resets and power
14 domains on MSM8998.
15
16 See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h
17
18 properties:
19 compatible:
20 const: qcom,msm8998-gpucc
21
22 clocks:
23 items:
24 - description: Board XO source
25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
26
27 clock-names:
28 items:
29 - const: xo
30 - const: gpll0
31
32 required:
33 - compatible
34 - clocks
35 - clock-names
36 - '#power-domain-cells'
37
38 allOf:
39 - $ref: qcom,gcc.yaml#
40
41 unevaluatedProperties: false
42
43 examples:
44 - |
45 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
46 #include <dt-bindings/clock/qcom,rpmcc.h>
47 clock-controller@5065000 {
48 compatible = "qcom,msm8998-gpucc";
49 #clock-cells = <1>;
50 #reset-cells = <1>;
51 #power-domain-cells = <1>;
52 reg = <0x05065000 0x9000>;
53 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0_OUT_MAIN>;
54 clock-names = "xo", "gpll0";
55 };
56 ...
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