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Linux/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Qualcomm Graphics Clock & Reset Controller on SM6115
  8 
  9 maintainers:
 10   - Konrad Dybcio <konradybcio@kernel.org>
 11 
 12 description: |
 13   Qualcomm graphics clock control module provides clocks, resets and power
 14   domains on Qualcomm SoCs.
 15 
 16   See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
 17 
 18 properties:
 19   compatible:
 20     enum:
 21       - qcom,sm6115-gpucc
 22 
 23   clocks:
 24     items:
 25       - description: Board XO source
 26       - description: GPLL0 main branch source
 27       - description: GPLL0 main div source
 28 
 29 required:
 30   - compatible
 31   - clocks
 32 
 33 allOf:
 34   - $ref: qcom,gcc.yaml#
 35 
 36 unevaluatedProperties: false
 37 
 38 examples:
 39   - |
 40     #include <dt-bindings/clock/qcom,gcc-sm6115.h>
 41     #include <dt-bindings/clock/qcom,rpmcc.h>
 42 
 43     soc {
 44         #address-cells = <1>;
 45         #size-cells = <1>;
 46 
 47         clock-controller@5990000 {
 48             compatible = "qcom,sm6115-gpucc";
 49             reg = <0x05990000 0x9000>;
 50             clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
 51                      <&gcc GCC_GPU_GPLL0_CLK_SRC>,
 52                      <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
 53             #clock-cells = <1>;
 54             #reset-cells = <1>;
 55             #power-domain-cells = <1>;
 56         };
 57     };
 58 ...

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