1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Display Clock & Reset Controller on SM6375
8
9 maintainers:
10 - Konrad Dybcio <konradybcio@kernel.org>
11
12 description: |
13 Qualcomm display clock control module provides the clocks, resets and power
14 domains on SM6375.
15
16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6375.h
17
18 allOf:
19 - $ref: qcom,gcc.yaml#
20
21 properties:
22 compatible:
23 const: qcom,sm6375-dispcc
24
25 clocks:
26 items:
27 - description: Board XO source
28 - description: GPLL0 source from GCC
29 - description: Byte clock from DSI PHY
30 - description: Pixel clock from DSI PHY
31
32 required:
33 - compatible
34 - clocks
35
36 unevaluatedProperties: false
37
38 examples:
39 - |
40 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
41 #include <dt-bindings/clock/qcom,rpmh.h>
42
43 clock-controller@5f00000 {
44 compatible = "qcom,sm6375-dispcc";
45 reg = <0x05f00000 0x20000>;
46 clocks = <&rpmhcc RPMH_CXO_CLK>,
47 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
48 <&dsi_phy 0>,
49 <&dsi_phy 1>;
50 #clock-cells = <1>;
51 #reset-cells = <1>;
52 #power-domain-cells = <1>;
53 };
54 ...
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