~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/clock/renesas,5p35023.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Renesas 5p35023 VersaClock 3 programmable I2C clock generator
  8 
  9 maintainers:
 10   - Biju Das <biju.das.jz@bp.renesas.com>
 11 
 12 description: |
 13   The 5P35023 is a VersaClock programmable clock generator and
 14   is designed for low-power, consumer, and high-performance PCI
 15   express applications. The 5P35023 device is a three PLL
 16   architecture design, and each PLL is individually programmable
 17   and allowing for up to 6 unique frequency outputs.
 18 
 19   An internal OTP memory allows the user to store the configuration
 20   in the device. After power up, the user can change the device register
 21   settings through the I2C interface when I2C mode is selected.
 22 
 23   The driver can read a full register map from the DT, and will use that
 24   register map to initialize the attached part (via I2C) when the system
 25   boots. Any configuration not supported by the common clock framework
 26   must be done via the full register map, including optimized settings.
 27 
 28   Link to datasheet:
 29   https://www.renesas.com/us/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-programmable-clock-generator
 30 
 31 properties:
 32   compatible:
 33     enum:
 34       - renesas,5p35023
 35 
 36   reg:
 37     maxItems: 1
 38 
 39   '#clock-cells':
 40     description:
 41       The index in the assigned-clocks is mapped to the output clock as below
 42       0 - REF, 1 - SE1, 2 - SE2, 3 - SE3, 4 - DIFF1, 5 - DIFF2.
 43     const: 1
 44 
 45   clocks:
 46     maxItems: 1
 47 
 48   renesas,settings:
 49     description: Optional, complete register map of the device.
 50       Optimized settings for the device must be provided in full
 51       and are written during initialization.
 52     $ref: /schemas/types.yaml#/definitions/uint8-array
 53     maxItems: 37
 54 
 55 required:
 56   - compatible
 57   - reg
 58   - '#clock-cells'
 59   - clocks
 60 
 61 additionalProperties: false
 62 
 63 examples:
 64   - |
 65     i2c {
 66         #address-cells = <1>;
 67         #size-cells = <0>;
 68 
 69         versa3: clock-generator@68 {
 70             compatible = "renesas,5p35023";
 71             reg = <0x68>;
 72             #clock-cells = <1>;
 73 
 74             clocks = <&x1>;
 75 
 76             renesas,settings = [
 77                 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
 78                 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
 79                 80 b0 45 c4 95
 80             ];
 81 
 82             assigned-clocks = <&versa3 0>, <&versa3 1>,
 83                               <&versa3 2>, <&versa3 3>,
 84                               <&versa3 4>, <&versa3 5>;
 85             assigned-clock-rates = <24000000>, <11289600>,
 86                                    <11289600>, <12000000>,
 87                                    <25000000>, <12288000>;
 88         };
 89     };

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php