1 Binding for TI DaVinci Power Sleep Controller (PSC)
2
3 The PSC provides power management, clock gating and reset functionality. It is
4 primarily used for clocking.
5
6 Required properties:
7 - compatible: shall be one of:
8 - "ti,da850-psc0" for PSC0 on DA850/OMAP-L138/AM18XX
9 - "ti,da850-psc1" for PSC1 on DA850/OMAP-L138/AM18XX
10 - reg: physical base address and size of the controller's register area
11 - #clock-cells: from common clock binding; shall be set to 1
12 - #power-domain-cells: from generic power domain binding; shall be set to 1.
13 - clocks: phandles to clocks corresponding to the clock-names property
14 - clock-names: list of parent clock names - depends on compatible value
15 - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2",
16 "pll0_sysclk4", "pll0_sysclk6", "async1"
17 - for "ti,da850-psc1", shall be "pll0_sysclk2", "pll0_sysclk4", "async3"
18
19 Optional properties:
20 - #reset-cells: from reset binding; shall be set to 1 - only applicable when
21 at least one local domain provides a local reset.
22
23 Consumers:
24
25 Clock, power domain and reset consumers shall use the local power domain
26 module ID (LPSC) as the index corresponding to the clock cell. Refer to
27 the device-specific datasheet to find these numbers. NB: Most local
28 domains only provide a clock/power domain and not a reset.
29
30 Examples:
31
32 psc0: clock-controller@10000 {
33 compatible = "ti,da850-psc0";
34 reg = <0x10000 0x1000>;
35 #clock-cells = <1>;
36 #power-domain-cells = <1>;
37 #reset-cells = <1>;
38 clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>,
39 <&pll0_sysclk 4>, <&pll0_sysclk 6>, <&async1_clk>;
40 clock_names = "pll0_sysclk1", "pll0_sysclk2",
41 "pll0_sysclk4", "pll0_sysclk6", "async1";
42 };
43 psc1: clock-controller@227000 {
44 compatible = "ti,da850-psc1";
45 reg = <0x227000 0x1000>;
46 #clock-cells = <1>;
47 #power-domain-cells = <1>;
48 clocks = <&pll0_sysclk 2>, <&pll0_sysclk 4>, <&async3_clk>;
49 clock_names = "pll0_sysclk2", "pll0_sysclk4", "async3";
50 };
51
52 /* consumer */
53 dsp: dsp@11800000 {
54 compatible = "ti,da850-dsp";
55 reg = <0x11800000 0x40000>,
56 <0x11e00000 0x8000>,
57 <0x11f00000 0x8000>,
58 <0x01c14044 0x4>,
59 <0x01c14174 0x8>;
60 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
61 interrupt-parent = <&intc>;
62 interrupts = <28>;
63 clocks = <&psc0 15>;
64 power-domains = <&psc0 15>;
65 resets = <&psc0 15>;
66 };
67
68 Also see:
69 - Documentation/devicetree/bindings/clock/clock-bindings.txt
70 - Documentation/devicetree/bindings/power/power-domain.yaml
71 - Documentation/devicetree/bindings/reset/reset.txt
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